aboutsummaryrefslogtreecommitdiffstats
path: root/testhal/STM32F1xx
diff options
context:
space:
mode:
authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2011-08-28 08:53:14 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2011-08-28 08:53:14 +0000
commitd2e9a52cf6b2997b9b6320434ea296bde79b3727 (patch)
treee7017f554396ca52581b07dcaca59e6fe4aed355 /testhal/STM32F1xx
parentfe0093f795b6c88db8f12e2f7e45e11355fc3340 (diff)
downloadChibiOS-d2e9a52cf6b2997b9b6320434ea296bde79b3727.tar.gz
ChibiOS-d2e9a52cf6b2997b9b6320434ea296bde79b3727.tar.bz2
ChibiOS-d2e9a52cf6b2997b9b6320434ea296bde79b3727.zip
New DMA helper driver for STM32F1xx and STM32L1xx.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3255 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'testhal/STM32F1xx')
-rw-r--r--testhal/STM32F1xx/ADC/chconf.h12
-rw-r--r--testhal/STM32F1xx/SDIO/chconf.h12
-rw-r--r--testhal/STM32F1xx/SPI/chconf.h12
-rw-r--r--testhal/STM32F1xx/SPI/mcuconf.h2
-rw-r--r--testhal/STM32F1xx/UART/chconf.h12
-rw-r--r--testhal/STM32F1xx/UART/main.c4
-rw-r--r--testhal/STM32F1xx/UART/mcuconf.h4
7 files changed, 28 insertions, 30 deletions
diff --git a/testhal/STM32F1xx/ADC/chconf.h b/testhal/STM32F1xx/ADC/chconf.h
index 9dd831c96..a5d129956 100644
--- a/testhal/STM32F1xx/ADC/chconf.h
+++ b/testhal/STM32F1xx/ADC/chconf.h
@@ -361,7 +361,7 @@
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__)
-#define CH_DBG_SYSTEM_STATE_CHECK FALSE
+#define CH_DBG_SYSTEM_STATE_CHECK TRUE
#endif
/**
@@ -372,7 +372,7 @@
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__)
-#define CH_DBG_ENABLE_CHECKS FALSE
+#define CH_DBG_ENABLE_CHECKS TRUE
#endif
/**
@@ -384,7 +384,7 @@
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__)
-#define CH_DBG_ENABLE_ASSERTS FALSE
+#define CH_DBG_ENABLE_ASSERTS TRUE
#endif
/**
@@ -395,7 +395,7 @@
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__)
-#define CH_DBG_ENABLE_TRACE FALSE
+#define CH_DBG_ENABLE_TRACE TRUE
#endif
/**
@@ -409,7 +409,7 @@
* @p panic_msg variable set to @p NULL.
*/
#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__)
-#define CH_DBG_ENABLE_STACK_CHECK FALSE
+#define CH_DBG_ENABLE_STACK_CHECK TRUE
#endif
/**
@@ -421,7 +421,7 @@
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__)
-#define CH_DBG_FILL_THREADS FALSE
+#define CH_DBG_FILL_THREADS TRUE
#endif
/**
diff --git a/testhal/STM32F1xx/SDIO/chconf.h b/testhal/STM32F1xx/SDIO/chconf.h
index 9dd831c96..a5d129956 100644
--- a/testhal/STM32F1xx/SDIO/chconf.h
+++ b/testhal/STM32F1xx/SDIO/chconf.h
@@ -361,7 +361,7 @@
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__)
-#define CH_DBG_SYSTEM_STATE_CHECK FALSE
+#define CH_DBG_SYSTEM_STATE_CHECK TRUE
#endif
/**
@@ -372,7 +372,7 @@
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__)
-#define CH_DBG_ENABLE_CHECKS FALSE
+#define CH_DBG_ENABLE_CHECKS TRUE
#endif
/**
@@ -384,7 +384,7 @@
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__)
-#define CH_DBG_ENABLE_ASSERTS FALSE
+#define CH_DBG_ENABLE_ASSERTS TRUE
#endif
/**
@@ -395,7 +395,7 @@
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__)
-#define CH_DBG_ENABLE_TRACE FALSE
+#define CH_DBG_ENABLE_TRACE TRUE
#endif
/**
@@ -409,7 +409,7 @@
* @p panic_msg variable set to @p NULL.
*/
#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__)
-#define CH_DBG_ENABLE_STACK_CHECK FALSE
+#define CH_DBG_ENABLE_STACK_CHECK TRUE
#endif
/**
@@ -421,7 +421,7 @@
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__)
-#define CH_DBG_FILL_THREADS FALSE
+#define CH_DBG_FILL_THREADS TRUE
#endif
/**
diff --git a/testhal/STM32F1xx/SPI/chconf.h b/testhal/STM32F1xx/SPI/chconf.h
index 9dd831c96..a5d129956 100644
--- a/testhal/STM32F1xx/SPI/chconf.h
+++ b/testhal/STM32F1xx/SPI/chconf.h
@@ -361,7 +361,7 @@
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__)
-#define CH_DBG_SYSTEM_STATE_CHECK FALSE
+#define CH_DBG_SYSTEM_STATE_CHECK TRUE
#endif
/**
@@ -372,7 +372,7 @@
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__)
-#define CH_DBG_ENABLE_CHECKS FALSE
+#define CH_DBG_ENABLE_CHECKS TRUE
#endif
/**
@@ -384,7 +384,7 @@
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__)
-#define CH_DBG_ENABLE_ASSERTS FALSE
+#define CH_DBG_ENABLE_ASSERTS TRUE
#endif
/**
@@ -395,7 +395,7 @@
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__)
-#define CH_DBG_ENABLE_TRACE FALSE
+#define CH_DBG_ENABLE_TRACE TRUE
#endif
/**
@@ -409,7 +409,7 @@
* @p panic_msg variable set to @p NULL.
*/
#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__)
-#define CH_DBG_ENABLE_STACK_CHECK FALSE
+#define CH_DBG_ENABLE_STACK_CHECK TRUE
#endif
/**
@@ -421,7 +421,7 @@
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__)
-#define CH_DBG_FILL_THREADS FALSE
+#define CH_DBG_FILL_THREADS TRUE
#endif
/**
diff --git a/testhal/STM32F1xx/SPI/mcuconf.h b/testhal/STM32F1xx/SPI/mcuconf.h
index ab96d8eef..558c0773d 100644
--- a/testhal/STM32F1xx/SPI/mcuconf.h
+++ b/testhal/STM32F1xx/SPI/mcuconf.h
@@ -127,7 +127,7 @@
* SPI driver system settings.
*/
#define STM32_SPI_USE_SPI1 TRUE
-#define STM32_SPI_USE_SPI2 FALSE
+#define STM32_SPI_USE_SPI2 TRUE
#define STM32_SPI_USE_SPI3 FALSE
#define STM32_SPI_SPI1_DMA_PRIORITY 1
#define STM32_SPI_SPI2_DMA_PRIORITY 1
diff --git a/testhal/STM32F1xx/UART/chconf.h b/testhal/STM32F1xx/UART/chconf.h
index 9dd831c96..a5d129956 100644
--- a/testhal/STM32F1xx/UART/chconf.h
+++ b/testhal/STM32F1xx/UART/chconf.h
@@ -361,7 +361,7 @@
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__)
-#define CH_DBG_SYSTEM_STATE_CHECK FALSE
+#define CH_DBG_SYSTEM_STATE_CHECK TRUE
#endif
/**
@@ -372,7 +372,7 @@
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__)
-#define CH_DBG_ENABLE_CHECKS FALSE
+#define CH_DBG_ENABLE_CHECKS TRUE
#endif
/**
@@ -384,7 +384,7 @@
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__)
-#define CH_DBG_ENABLE_ASSERTS FALSE
+#define CH_DBG_ENABLE_ASSERTS TRUE
#endif
/**
@@ -395,7 +395,7 @@
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__)
-#define CH_DBG_ENABLE_TRACE FALSE
+#define CH_DBG_ENABLE_TRACE TRUE
#endif
/**
@@ -409,7 +409,7 @@
* @p panic_msg variable set to @p NULL.
*/
#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__)
-#define CH_DBG_ENABLE_STACK_CHECK FALSE
+#define CH_DBG_ENABLE_STACK_CHECK TRUE
#endif
/**
@@ -421,7 +421,7 @@
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__)
-#define CH_DBG_FILL_THREADS FALSE
+#define CH_DBG_FILL_THREADS TRUE
#endif
/**
diff --git a/testhal/STM32F1xx/UART/main.c b/testhal/STM32F1xx/UART/main.c
index 924338a77..b3ccd35fd 100644
--- a/testhal/STM32F1xx/UART/main.c
+++ b/testhal/STM32F1xx/UART/main.c
@@ -26,9 +26,7 @@ static VirtualTimer vt1, vt2;
static void restart(void *p) {
(void)p;
- chSysLockFromIsr();
uartStartSendI(&UARTD2, 14, "Hello World!\r\n");
- chSysUnlockFromIsr();
}
static void ledoff(void *p) {
@@ -48,7 +46,7 @@ static void txend1(UARTDriver *uartp) {
}
/*
- * This callback is invoked when a transmission has phisically completed.
+ * This callback is invoked when a transmission has physically completed.
*/
static void txend2(UARTDriver *uartp) {
diff --git a/testhal/STM32F1xx/UART/mcuconf.h b/testhal/STM32F1xx/UART/mcuconf.h
index 558c0773d..c8dd60ca1 100644
--- a/testhal/STM32F1xx/UART/mcuconf.h
+++ b/testhal/STM32F1xx/UART/mcuconf.h
@@ -140,9 +140,9 @@
/*
* UART driver system settings.
*/
-#define STM32_UART_USE_USART1 FALSE
+#define STM32_UART_USE_USART1 TRUE
#define STM32_UART_USE_USART2 TRUE
-#define STM32_UART_USE_USART3 FALSE
+#define STM32_UART_USE_USART3 TRUE
#define STM32_UART_USART1_IRQ_PRIORITY 12
#define STM32_UART_USART2_IRQ_PRIORITY 12
#define STM32_UART_USART3_IRQ_PRIORITY 12