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authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2011-10-08 09:22:34 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2011-10-08 09:22:34 +0000
commit538f257a6710eebea358e12845ae241437d70031 (patch)
tree8af04ac75cdcef2ad9eed89ef14b9b6903192823 /testhal/STM32F1xx/UART
parent1351fded5a9c460166637d276616a73be0b72392 (diff)
downloadChibiOS-538f257a6710eebea358e12845ae241437d70031.tar.gz
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New build system for GCC ARM ports.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3428 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'testhal/STM32F1xx/UART')
-rw-r--r--testhal/STM32F1xx/UART/Makefile6
1 files changed, 3 insertions, 3 deletions
diff --git a/testhal/STM32F1xx/UART/Makefile b/testhal/STM32F1xx/UART/Makefile
index 9ae228410..a225f325c 100644
--- a/testhal/STM32F1xx/UART/Makefile
+++ b/testhal/STM32F1xx/UART/Makefile
@@ -23,9 +23,9 @@ ifeq ($(USE_THUMB),)
USE_THUMB = yes
endif
-# Enable register caching optimization (read documentation).
-ifeq ($(USE_CURRP_CACHING),)
- USE_CURRP_CACHING = no
+# Enable this if you want to see the full log while compiling.
+ifeq ($(USE_VERBOSE_COMPILE),)
+ USE_VERBOSE_COMPILE = no
endif
#