FSMC. Files moved to

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7414 35acf78f-673a-0410-8e92-d51de3d6d3f4

18 files changed, 0 insertions, 4145 deletions

diff --git a/testhal/STM32/STM32F4xx/FSMC_NAND/.cproject b/testhal/STM32/STM32F4xx/FSMC_NAND/.cproject
deleted file mode 100644
index ba71b3f1b..000000000
--- a/testhal/STM32/STM32F4xx/FSMC_NAND/.cproject
+++ /dev/null
@@ -1,53 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no"?>
-<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
-	<storageModule moduleId="org.eclipse.cdt.core.settings">
-		<cconfiguration id="0.1570569554">
-			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="0.1570569554" moduleId="org.eclipse.cdt.core.settings" name="Default">
-				<externalSettings/>
-				<extensions>
-					<extension id="org.eclipse.cdt.core.VCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
-					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-					<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-				</extensions>
-			</storageModule>
-			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
-				<configuration artifactName="${ProjName}" buildProperties="" description="" id="0.1570569554" name="Default" parent="org.eclipse.cdt.build.core.prefbase.cfg">
-					<folderInfo id="0.1570569554." name="/" resourcePath="">
-						<toolChain id="org.eclipse.cdt.build.core.prefbase.toolchain.2051275125" name="No ToolChain" resourceTypeBasedDiscovery="false" superClass="org.eclipse.cdt.build.core.prefbase.toolchain">
-							<targetPlatform id="org.eclipse.cdt.build.core.prefbase.toolchain.2051275125.1235631892" name=""/>
-							<builder id="org.eclipse.cdt.build.core.settings.default.builder.681215945" keepEnvironmentInBuildfile="false" managedBuildOn="false" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="org.eclipse.cdt.build.core.settings.default.builder"/>
-							<tool id="org.eclipse.cdt.build.core.settings.holder.libs.1913618182" name="holder for library settings" superClass="org.eclipse.cdt.build.core.settings.holder.libs"/>
-							<tool id="org.eclipse.cdt.build.core.settings.holder.1359024970" name="Assembly" superClass="org.eclipse.cdt.build.core.settings.holder">
-								<option id="org.eclipse.cdt.build.core.settings.holder.incpaths.648690541" name="Include Paths" superClass="org.eclipse.cdt.build.core.settings.holder.incpaths" valueType="includePath"/>
-								<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.865562104" languageId="org.eclipse.cdt.core.assembly" languageName="Assembly" sourceContentType="org.eclipse.cdt.core.asmSource" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
-							</tool>
-							<tool id="org.eclipse.cdt.build.core.settings.holder.321395526" name="GNU C++" superClass="org.eclipse.cdt.build.core.settings.holder">
-								<option id="org.eclipse.cdt.build.core.settings.holder.incpaths.76286563" name="Include Paths" superClass="org.eclipse.cdt.build.core.settings.holder.incpaths" valueType="includePath"/>
-								<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.1168908150" languageId="org.eclipse.cdt.core.g++" languageName="GNU C++" sourceContentType="org.eclipse.cdt.core.cxxSource,org.eclipse.cdt.core.cxxHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
-							</tool>
-							<tool id="org.eclipse.cdt.build.core.settings.holder.1390938668" name="GNU C" superClass="org.eclipse.cdt.build.core.settings.holder">
-								<option id="org.eclipse.cdt.build.core.settings.holder.incpaths.684710851" name="Include Paths" superClass="org.eclipse.cdt.build.core.settings.holder.incpaths" valueType="includePath"/>
-								<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.645908401" languageId="org.eclipse.cdt.core.gcc" languageName="GNU C" sourceContentType="org.eclipse.cdt.core.cSource,org.eclipse.cdt.core.cHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
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-						</toolChain>
-					</folderInfo>
-				</configuration>
-			</storageModule>
-			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
-		</cconfiguration>
-	</storageModule>
-	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
-		<project id="STM32F4xx-GPT.null.188687308" name="STM32F4xx-GPT"/>
-	</storageModule>
-	<storageModule moduleId="scannerConfiguration">
-		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
-		<scannerConfigBuildInfo instanceId="0.1570569554">
-			<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile"/>
-		</scannerConfigBuildInfo>
-	</storageModule>
-	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
-	<storageModule moduleId="refreshScope"/>
-</cproject>
diff --git a/testhal/STM32/STM32F4xx/FSMC_NAND/.project b/testhal/STM32/STM32F4xx/FSMC_NAND/.project
deleted file mode 100644
index 4e4e72fea..000000000
--- a/testhal/STM32/STM32F4xx/FSMC_NAND/.project
+++ /dev/null
@@ -1,43 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<projectDescription>
-	<name>STM32F4xx-FSMC_NAND</name>
-	<comment></comment>
-	<projects>
-	</projects>
-	<buildSpec>
-		<buildCommand>
-			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
-			<triggers>clean,full,incremental,</triggers>
-			<arguments>
-			</arguments>
-		</buildCommand>
-		<buildCommand>
-			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
-			<triggers>full,incremental,</triggers>
-			<arguments>
-			</arguments>
-		</buildCommand>
-	</buildSpec>
-	<natures>
-		<nature>org.eclipse.cdt.core.cnature</nature>
-		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
-		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
-	</natures>
-	<linkedResources>
-		<link>
-			<name>os</name>
-			<type>2</type>
-			<locationURI>CHIBIOS1/os</locationURI>
-		</link>
-	</linkedResources>
-	<variableList>
-		<variable>
-			<name>CHIBIOS</name>
-			<value>file:/home/barthess/projects/chibios-svn</value>
-		</variable>
-		<variable>
-			<name>CHIBIOS1</name>
-			<value>$%7BPARENT-4-PROJECT_LOC%7D</value>
-		</variable>
-	</variableList>
-</projectDescription>
diff --git a/testhal/STM32/STM32F4xx/FSMC_NAND/Makefile b/testhal/STM32/STM32F4xx/FSMC_NAND/Makefile
deleted file mode 100644
index b01a387c4..000000000
--- a/testhal/STM32/STM32F4xx/FSMC_NAND/Makefile
+++ /dev/null
@@ -1,209 +0,0 @@
-##############################################################################
-# Build global options
-# NOTE: Can be overridden externally.
-#
-
-# Compiler options here.
-ifeq ($(USE_OPT),)
-  USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
-endif
-
-# C specific options here (added to USE_OPT).
-ifeq ($(USE_COPT),)
-  USE_COPT = 
-endif
-
-# C++ specific options here (added to USE_OPT).
-ifeq ($(USE_CPPOPT),)
-  USE_CPPOPT = -fno-rtti
-endif
-
-# Enable this if you want the linker to remove unused code and data
-ifeq ($(USE_LINK_GC),)
-  USE_LINK_GC = yes
-endif
-
-# Linker extra options here.
-ifeq ($(USE_LDOPT),)
-  USE_LDOPT = 
-endif
-
-# Enable this if you want link time optimizations (LTO)
-ifeq ($(USE_LTO),)
-  USE_LTO = yes
-endif
-
-# If enabled, this option allows to compile the application in THUMB mode.
-ifeq ($(USE_THUMB),)
-  USE_THUMB = yes
-endif
-
-# Enable this if you want to see the full log while compiling.
-ifeq ($(USE_VERBOSE_COMPILE),)
-  USE_VERBOSE_COMPILE = no
-endif
-
-#
-# Build global options
-##############################################################################
-
-##############################################################################
-# Architecture or project specific options
-#
-
-# Stack size to be allocated to the Cortex-M process stack. This stack is
-# the stack used by the main() thread.
-ifeq ($(USE_PROCESS_STACKSIZE),)
-  USE_PROCESS_STACKSIZE = 0x400
-endif
-
-# Stack size to the allocated to the Cortex-M main/exceptions stack. This
-# stack is used for processing interrupts and exceptions.
-ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
-  USE_EXCEPTIONS_STACKSIZE = 0x400
-endif
-
-# Enables the use of FPU on Cortex-M4 (no, softfp, hard).
-ifeq ($(USE_FPU),)
-  USE_FPU = no
-endif
-
-#
-# Architecture or project specific options
-##############################################################################
-
-##############################################################################
-# Project, sources and paths
-#
-
-# Define project name here
-PROJECT = ch
-
-# Imported source files and paths
-CHIBIOS = ../../../..
-include $(CHIBIOS)/os/hal/hal.mk
-include $(CHIBIOS)/os/hal/boards/NONSTANDARD_STM32F4_BARTHESS2/board.mk
-include $(CHIBIOS)/os/hal/ports/STM32/STM32F4xx/platform.mk
-include $(CHIBIOS)/os/hal/osal/rt/osal.mk
-include $(CHIBIOS)/os/rt/rt.mk
-include $(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/mk/port_stm32f4xx.mk
-include $(CHIBIOS)/test/rt/test.mk
-
-
-# Define linker script file here
-LDSCRIPT= $(PORTLD)/STM32F407xG.ld
-
-# C sources that can be compiled in ARM or THUMB mode depending on the global
-# setting.
-CSRC = $(PORTSRC) \
-       $(KERNSRC) \
-       $(TESTSRC) \
-       $(HALSRC) \
-       $(PLATFORMSRC) \
-       $(BOARDSRC) \
-       $(CHIBIOS)/os/various/chprintf.c \
-       dma_storm_adc.c \
-       dma_storm_spi.c \
-       dma_storm_uart.c \
-       main.c
-
-# C++ sources that can be compiled in ARM or THUMB mode depending on the global
-# setting.
-CPPSRC =
-
-# C sources to be compiled in ARM mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-#       option that results in lower performance and larger code size.
-ACSRC =
-
-# C++ sources to be compiled in ARM mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-#       option that results in lower performance and larger code size.
-ACPPSRC =
-
-# C sources to be compiled in THUMB mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-#       option that results in lower performance and larger code size.
-TCSRC =
-
-# C sources to be compiled in THUMB mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-#       option that results in lower performance and larger code size.
-TCPPSRC =
-
-# List ASM source files here
-ASMSRC = $(PORTASM)
-
-INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
-         $(HALINC) $(OSALINC) $(PLATFORMINC) $(BOARDINC) \
-         $(CHIBIOS)/os/various
-
-
-#
-# Project, sources and paths
-##############################################################################
-
-##############################################################################
-# Compiler settings
-#
-
-MCU  = cortex-m4
-
-#TRGT = arm-elf-
-TRGT = arm-none-eabi-
-CC   = $(TRGT)gcc
-CPPC = $(TRGT)g++
-# Enable loading with g++ only if you need C++ runtime support.
-# NOTE: You can use C++ even without C++ support if you are careful. C++
-#       runtime support makes code size explode.
-LD   = $(TRGT)gcc
-#LD   = $(TRGT)g++
-CP   = $(TRGT)objcopy
-AS   = $(TRGT)gcc -x assembler-with-cpp
-AR   = $(TRGT)ar
-OD   = $(TRGT)objdump
-SZ   = $(TRGT)size
-HEX  = $(CP) -O ihex
-BIN  = $(CP) -O binary
-
-# ARM-specific options here
-AOPT =
-
-# THUMB-specific options here
-TOPT = -mthumb -DTHUMB
-
-# Define C warning options here
-CWARN = -Wall -Wextra -Wstrict-prototypes
-
-# Define C++ warning options here
-CPPWARN = -Wall -Wextra
-
-#
-# Compiler settings
-##############################################################################
-
-##############################################################################
-# Start of user section
-#
-
-# List all user C define here, like -D_DEBUG=1
-UDEFS =
-
-# Define ASM defines here
-UADEFS =
-
-# List all user directories here
-UINCDIR =
-
-# List the user directory to look for the libraries here
-ULIBDIR =
-
-# List all user libraries here
-ULIBS =
-
-#
-# End of user defines
-##############################################################################
-
-RULESPATH = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC
-include $(RULESPATH)/rules.mk
diff --git a/testhal/STM32/STM32F4xx/FSMC_NAND/chconf.h b/testhal/STM32/STM32F4xx/FSMC_NAND/chconf.h
deleted file mode 100644
index b9838301a..000000000
--- a/testhal/STM32/STM32F4xx/FSMC_NAND/chconf.h
+++ /dev/null
@@ -1,498 +0,0 @@
-/*
-    ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-/**
- * @file    templates/chconf.h
- * @brief   Configuration file template.
- * @details A copy of this file must be placed in each project directory, it
- *          contains the application specific kernel settings.
- *
- * @addtogroup config
- * @details Kernel related settings and hooks.
- * @{
- */
-
-#ifndef _CHCONF_H_
-#define _CHCONF_H_
-
-/*===========================================================================*/
-/**
- * @name System timers settings
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   System time counter resolution.
- * @note    Allowed values are 16 or 32 bits.
- */
-#define CH_CFG_ST_RESOLUTION                32
-
-/**
- * @brief   System tick frequency.
- * @details Frequency of the system timer that drives the system ticks. This
- *          setting also defines the system tick time unit.
- */
-#define CH_CFG_ST_FREQUENCY                 10000
-
-/**
- * @brief   Time delta constant for the tick-less mode.
- * @note    If this value is zero then the system uses the classic
- *          periodic tick. This value represents the minimum number
- *          of ticks that is safe to specify in a timeout directive.
- *          The value one is not valid, timeouts are rounded up to
- *          this value.
- */
-#define CH_CFG_ST_TIMEDELTA                 2
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Kernel parameters and options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Round robin interval.
- * @details This constant is the number of system ticks allowed for the
- *          threads before preemption occurs. Setting this value to zero
- *          disables the preemption for threads with equal priority and the
- *          round robin becomes cooperative. Note that higher priority
- *          threads can still preempt, the kernel is always preemptive.
- * @note    Disabling the round robin preemption makes the kernel more compact
- *          and generally faster.
- * @note    The round robin preemption is not supported in tickless mode and
- *          must be set to zero in that case.
- */
-#define CH_CFG_TIME_QUANTUM                 0
-
-/**
- * @brief   Managed RAM size.
- * @details Size of the RAM area to be managed by the OS. If set to zero
- *          then the whole available RAM is used. The core memory is made
- *          available to the heap allocator and/or can be used directly through
- *          the simplified core memory allocator.
- *
- * @note    In order to let the OS manage the whole RAM the linker script must
- *          provide the @p __heap_base__ and @p __heap_end__ symbols.
- * @note    Requires @p CH_CFG_USE_MEMCORE.
- */
-#define CH_CFG_MEMCORE_SIZE                 0
-
-/**
- * @brief   Idle thread automatic spawn suppression.
- * @details When this option is activated the function @p chSysInit()
- *          does not spawn the idle thread. The application @p main()
- *          function becomes the idle thread and must implement an
- *          infinite loop. */
-#define CH_CFG_NO_IDLE_THREAD               FALSE
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Performance options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   OS optimization.
- * @details If enabled then time efficient rather than space efficient code
- *          is used when two possible implementations exist.
- *
- * @note    This is not related to the compiler optimization options.
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_OPTIMIZE_SPEED               TRUE
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Subsystem options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Time Measurement APIs.
- * @details If enabled then the time measurement APIs are included in
- *          the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_TM                       TRUE
-
-/**
- * @brief   Threads registry APIs.
- * @details If enabled then the registry APIs are included in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_REGISTRY                 TRUE
-
-/**
- * @brief   Threads synchronization APIs.
- * @details If enabled then the @p chThdWait() function is included in
- *          the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_WAITEXIT                 TRUE
-
-/**
- * @brief   Semaphores APIs.
- * @details If enabled then the Semaphores APIs are included in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_SEMAPHORES               TRUE
-
-/**
- * @brief   Semaphores queuing mode.
- * @details If enabled then the threads are enqueued on semaphores by
- *          priority rather than in FIFO order.
- *
- * @note    The default is @p FALSE. Enable this if you have special
- *          requirements.
- * @note    Requires @p CH_CFG_USE_SEMAPHORES.
- */
-#define CH_CFG_USE_SEMAPHORES_PRIORITY      FALSE
-
-/**
- * @brief   Mutexes APIs.
- * @details If enabled then the mutexes APIs are included in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_MUTEXES                  TRUE
-
-/**
- * @brief   Enables recursive behavior on mutexes.
- * @note    Recursive mutexes are heavier and have an increased
- *          memory footprint.
- *
- * @note    The default is @p FALSE.
- * @note    Requires @p CH_CFG_USE_MUTEXES.
- */
-#define CH_CFG_USE_MUTEXES_RECURSIVE        FALSE
-
-/**
- * @brief   Conditional Variables APIs.
- * @details If enabled then the conditional variables APIs are included
- *          in the kernel.
- *
- * @note    The default is @p TRUE.
- * @note    Requires @p CH_CFG_USE_MUTEXES.
- */
-#define CH_CFG_USE_CONDVARS                 TRUE
-
-/**
- * @brief   Conditional Variables APIs with timeout.
- * @details If enabled then the conditional variables APIs with timeout
- *          specification are included in the kernel.
- *
- * @note    The default is @p TRUE.
- * @note    Requires @p CH_CFG_USE_CONDVARS.
- */
-#define CH_CFG_USE_CONDVARS_TIMEOUT         TRUE
-
-/**
- * @brief   Events Flags APIs.
- * @details If enabled then the event flags APIs are included in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_EVENTS                   TRUE
-
-/**
- * @brief   Events Flags APIs with timeout.
- * @details If enabled then the events APIs with timeout specification
- *          are included in the kernel.
- *
- * @note    The default is @p TRUE.
- * @note    Requires @p CH_CFG_USE_EVENTS.
- */
-#define CH_CFG_USE_EVENTS_TIMEOUT           TRUE
-
-/**
- * @brief   Synchronous Messages APIs.
- * @details If enabled then the synchronous messages APIs are included
- *          in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_MESSAGES                 TRUE
-
-/**
- * @brief   Synchronous Messages queuing mode.
- * @details If enabled then messages are served by priority rather than in
- *          FIFO order.
- *
- * @note    The default is @p FALSE. Enable this if you have special
- *          requirements.
- * @note    Requires @p CH_CFG_USE_MESSAGES.
- */
-#define CH_CFG_USE_MESSAGES_PRIORITY        FALSE
-
-/**
- * @brief   Mailboxes APIs.
- * @details If enabled then the asynchronous messages (mailboxes) APIs are
- *          included in the kernel.
- *
- * @note    The default is @p TRUE.
- * @note    Requires @p CH_CFG_USE_SEMAPHORES.
- */
-#define CH_CFG_USE_MAILBOXES                TRUE
-
-/**
- * @brief   I/O Queues APIs.
- * @details If enabled then the I/O queues APIs are included in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_QUEUES                   TRUE
-
-/**
- * @brief   Core Memory Manager APIs.
- * @details If enabled then the core memory manager APIs are included
- *          in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_MEMCORE                  TRUE
-
-/**
- * @brief   Heap Allocator APIs.
- * @details If enabled then the memory heap allocator APIs are included
- *          in the kernel.
- *
- * @note    The default is @p TRUE.
- * @note    Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
- *          @p CH_CFG_USE_SEMAPHORES.
- * @note    Mutexes are recommended.
- */
-#define CH_CFG_USE_HEAP                     TRUE
-
-/**
- * @brief   Memory Pools Allocator APIs.
- * @details If enabled then the memory pools allocator APIs are included
- *          in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_MEMPOOLS                 TRUE
-
-/**
- * @brief   Dynamic Threads APIs.
- * @details If enabled then the dynamic threads creation APIs are included
- *          in the kernel.
- *
- * @note    The default is @p TRUE.
- * @note    Requires @p CH_CFG_USE_WAITEXIT.
- * @note    Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
- */
-#define CH_CFG_USE_DYNAMIC                  TRUE
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Debug options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Debug option, kernel statistics.
- *
- * @note    The default is @p FALSE.
- */
-#define CH_DBG_STATISTICS                   TRUE
-
-/**
- * @brief   Debug option, system state check.
- * @details If enabled the correct call protocol for system APIs is checked
- *          at runtime.
- *
- * @note    The default is @p FALSE.
- */
-#define CH_DBG_SYSTEM_STATE_CHECK           TRUE
-
-/**
- * @brief   Debug option, parameters checks.
- * @details If enabled then the checks on the API functions input
- *          parameters are activated.
- *
- * @note    The default is @p FALSE.
- */
-#define CH_DBG_ENABLE_CHECKS                TRUE
-
-/**
- * @brief   Debug option, consistency checks.
- * @details If enabled then all the assertions in the kernel code are
- *          activated. This includes consistency checks inside the kernel,
- *          runtime anomalies and port-defined checks.
- *
- * @note    The default is @p FALSE.
- */
-#define CH_DBG_ENABLE_ASSERTS               TRUE
-
-/**
- * @brief   Debug option, trace buffer.
- * @details If enabled then the context switch circular trace buffer is
- *          activated.
- *
- * @note    The default is @p FALSE.
- */
-#define CH_DBG_ENABLE_TRACE                 TRUE
-
-/**
- * @brief   Debug option, stack checks.
- * @details If enabled then a runtime stack check is performed.
- *
- * @note    The default is @p FALSE.
- * @note    The stack check is performed in a architecture/port dependent way.
- *          It may not be implemented or some ports.
- * @note    The default failure mode is to halt the system with the global
- *          @p panic_msg variable set to @p NULL.
- */
-#define CH_DBG_ENABLE_STACK_CHECK           TRUE
-
-/**
- * @brief   Debug option, stacks initialization.
- * @details If enabled then the threads working area is filled with a byte
- *          value when a thread is created. This can be useful for the
- *          runtime measurement of the used stack.
- *
- * @note    The default is @p FALSE.
- */
-#define CH_DBG_FILL_THREADS                 TRUE
-
-/**
- * @brief   Debug option, threads profiling.
- * @details If enabled then a field is added to the @p thread_t structure that
- *          counts the system ticks occurred while executing the thread.
- *
- * @note    The default is @p FALSE.
- * @note    This debug option is not currently compatible with the
- *          tickless mode.
- */
-#define CH_DBG_THREADS_PROFILING            FALSE
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Kernel hooks
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Threads descriptor structure extension.
- * @details User fields added to the end of the @p thread_t structure.
- */
-#define CH_CFG_THREAD_EXTRA_FIELDS                                          \
-  /* Add threads custom fields here.*/
-
-/**
- * @brief   Threads initialization hook.
- * @details User initialization code added to the @p chThdInit() API.
- *
- * @note    It is invoked from within @p chThdInit() and implicitly from all
- *          the threads creation APIs.
- */
-#define CH_CFG_THREAD_INIT_HOOK(tp) {                                       \
-  /* Add threads initialization code here.*/                                \
-}
-
-/**
- * @brief   Threads finalization hook.
- * @details User finalization code added to the @p chThdExit() API.
- *
- * @note    It is inserted into lock zone.
- * @note    It is also invoked when the threads simply return in order to
- *          terminate.
- */
-#define CH_CFG_THREAD_EXIT_HOOK(tp) {                                       \
-  /* Add threads finalization code here.*/                                  \
-}
-
-/**
- * @brief   Context switch hook.
- * @details This hook is invoked just before switching between threads.
- */
-#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) {                              \
-  /* System halt code here.*/                                               \
-}
-
-/**
- * @brief   Idle thread enter hook.
- * @note    This hook is invoked within a critical zone, no OS functions
- *          should be invoked from here.
- * @note    This macro can be used to activate a power saving mode.
- */
-#define CH_CFG_IDLE_ENTER_HOOK() {                                         \
-}
-
-/**
- * @brief   Idle thread leave hook.
- * @note    This hook is invoked within a critical zone, no OS functions
- *          should be invoked from here.
- * @note    This macro can be used to deactivate a power saving mode.
- */
-#define CH_CFG_IDLE_LEAVE_HOOK() {                                         \
-}
-
-/**
- * @brief   Idle Loop hook.
- * @details This hook is continuously invoked by the idle thread loop.
- */
-#define CH_CFG_IDLE_LOOP_HOOK() {                                           \
-  /* Idle loop code here.*/                                                 \
-}
-
-/**
- * @brief   System tick event hook.
- * @details This hook is invoked in the system tick handler immediately
- *          after processing the virtual timers queue.
- */
-#define CH_CFG_SYSTEM_TICK_HOOK() {                                         \
-  /* System tick event code here.*/                                         \
-}
-
-/**
- * @brief   System halt hook.
- * @details This hook is invoked in case to a system halting error before
- *          the system is halted.
- */
-#define CH_CFG_SYSTEM_HALT_HOOK(reason) {                                   \
-  /* System halt code here.*/                                               \
-}
-
-/** @} */
-
-/*===========================================================================*/
-/* Port-specific settings (override port settings defaulted in chcore.h).    */
-/*===========================================================================*/
-
-#endif  /* _CHCONF_H_ */
-
-/** @} */
diff --git a/testhal/STM32/STM32F4xx/FSMC_NAND/dma_storm.h b/testhal/STM32/STM32F4xx/FSMC_NAND/dma_storm.h
deleted file mode 100644
index 0be66ba82..000000000
--- a/testhal/STM32/STM32F4xx/FSMC_NAND/dma_storm.h
+++ /dev/null
@@ -1,17 +0,0 @@
-#ifndef DMA_STORM_H_
-#define DMA_STORM_H_
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-  void dma_storm_spi_start(void);
-  uint32_t dma_storm_spi_stop(void);
-  void dma_storm_adc_start(void);
-  uint32_t dma_storm_adc_stop(void);
-  void dma_storm_uart_start(void);
-  uint32_t dma_storm_uart_stop(void);
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* DMA_STORM_H_ */
diff --git a/testhal/STM32/STM32F4xx/FSMC_NAND/dma_storm_adc.c b/testhal/STM32/STM32F4xx/FSMC_NAND/dma_storm_adc.c
deleted file mode 100644
index 4e37b757c..000000000
--- a/testhal/STM32/STM32F4xx/FSMC_NAND/dma_storm_adc.c
+++ /dev/null
@@ -1,112 +0,0 @@
-/*
-    ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-/*
-   Concepts and parts of this file have been contributed by Uladzimir Pylinsky
-   aka barthess.
- */
-
-#include "ch.h"
-#include "hal.h"
-
-#define ADC_NUM_CHANNELS          6
-#define ADC_BUF_DEPTH             8
-
-/* human readable names */
-#define ADC_CURRENT_SENS          ADC_CHANNEL_IN10
-#define ADC_MAIN_SUPPLY           ADC_CHANNEL_IN11
-#define ADC_6V_SUPPLY             ADC_CHANNEL_IN12
-#define ADC_AN33_0                ADC_CHANNEL_IN13
-#define ADC_AN33_1                ADC_CHANNEL_IN14
-#define ADC_AN33_2                ADC_CHANNEL_IN15
-
-#define ADC_CURRENT_SENS_OFFSET   (ADC_CHANNEL_IN10 - 10)
-#define ADC_MAIN_VOLTAGE_OFFSET   (ADC_CHANNEL_IN11 - 10)
-#define ADC_6V_OFFSET             (ADC_CHANNEL_IN12 - 10)
-#define ADC_AN33_0_OFFSET         (ADC_CHANNEL_IN13 - 10)
-#define ADC_AN33_1_OFFSET         (ADC_CHANNEL_IN14 - 10)
-#define ADC_AN33_2_OFFSET         (ADC_CHANNEL_IN15 - 10)
-
-static void adcerrorcallback(ADCDriver *adcp, adcerror_t err);
-static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n);
-
-static adcsample_t samples[ADC_NUM_CHANNELS * ADC_BUF_DEPTH];
-
-static uint32_t ints = 0;
-static uint32_t errors = 0;
-
-static const ADCConversionGroup adccg = {
-  TRUE,
-  ADC_NUM_CHANNELS,
-  adccallback,
-  adcerrorcallback,
-  0,                        /* CR1 */
-  ADC_CR2_SWSTART,          /* CR2 */
-  ADC_SMPR1_SMP_AN10(ADC_SAMPLE_3) |
-    ADC_SMPR1_SMP_AN11(ADC_SAMPLE_3) |
-    ADC_SMPR1_SMP_AN12(ADC_SAMPLE_3) |
-    ADC_SMPR1_SMP_AN13(ADC_SAMPLE_3) |
-    ADC_SMPR1_SMP_AN14(ADC_SAMPLE_3) |
-    ADC_SMPR1_SMP_AN15(ADC_SAMPLE_3),
-  0,                        /* SMPR2 */
-  ADC_SQR1_NUM_CH(ADC_NUM_CHANNELS),
-  0,
-  ADC_SQR3_SQ6_N(ADC_AN33_2)          |
-    ADC_SQR3_SQ5_N(ADC_AN33_1)        |
-    ADC_SQR3_SQ4_N(ADC_AN33_0)        |
-    ADC_SQR3_SQ3_N(ADC_6V_SUPPLY)     |
-    ADC_SQR3_SQ2_N(ADC_MAIN_SUPPLY)   |
-    ADC_SQR3_SQ1_N(ADC_CURRENT_SENS)
-};
-
-static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) {
-  (void)adcp;
-  (void)err;
-
-  osalSysHalt("");
-}
-
-static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) {
-  (void)adcp;
-  (void)buffer;
-  (void)n;
-  ints++;
-}
-
-/*
- *
- */
-void dma_storm_adc_start(void){
-  ints = 0;
-  errors = 0;
-
-  /* Activates the ADC1 driver and the temperature sensor.*/
-  adcStart(&ADCD1, NULL);
-  adcSTM32EnableTSVREFE();
-
-  /* Starts an ADC continuous conversion.*/
-  adcStartConversion(&ADCD1, &adccg, samples, ADC_BUF_DEPTH);
-}
-
-/*
- *
- */
-uint32_t dma_storm_adc_stop(void){
-  adcStopConversion(&ADCD1);
-  adcSTM32DisableTSVREFE();
-  adcStop(&ADCD1);
-  return ints;
-}
-
diff --git a/testhal/STM32/STM32F4xx/FSMC_NAND/dma_storm_spi.c b/testhal/STM32/STM32F4xx/FSMC_NAND/dma_storm_spi.c
deleted file mode 100644
index 742eeab2b..000000000
--- a/testhal/STM32/STM32F4xx/FSMC_NAND/dma_storm_spi.c
+++ /dev/null
@@ -1,110 +0,0 @@
-/*
-    ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-/*
-   Concepts and parts of this file have been contributed by Uladzimir Pylinsky
-   aka barthess.
- */
-
-#include "ch.h"
-#include "hal.h"
-
-/*
- ******************************************************************************
- * DEFINES
- ******************************************************************************
- */
-#define SPI_BUF_SIZE    512
-
-/*
- ******************************************************************************
- * EXTERNS
- ******************************************************************************
- */
-
-/*
- ******************************************************************************
- * PROTOTYPES
- ******************************************************************************
- */
-static void spi_end_cb(SPIDriver *spip);
-
-/*
- ******************************************************************************
- * GLOBAL VARIABLES
- ******************************************************************************
- */
-static uint8_t testbuf_ram[SPI_BUF_SIZE];
-static const uint8_t testbuf_flash[SPI_BUF_SIZE];
-
-/*
- *
- */
-static const SPIConfig spicfg = {
-    spi_end_cb,
-    GPIOA,
-    GPIOA_SPI1_NSS,
-    0, //SPI_CR1_BR_1 | SPI_CR1_BR_0
-};
-
-static uint32_t ints;
-static binary_semaphore_t sem;
-static bool stop = false;
-
-/*
- ******************************************************************************
- ******************************************************************************
- * LOCAL FUNCTIONS
- ******************************************************************************
- ******************************************************************************
- */
-
-static void spi_end_cb(SPIDriver *spip){
-  ints++;
-
-  if (stop){
-    chSysLockFromISR();
-    chBSemSignalI(&sem);
-    chSysUnlockFromISR();
-    return;
-  }
-  else{
-    chSysLockFromISR();
-    spiStartExchangeI(spip, SPI_BUF_SIZE, testbuf_flash, testbuf_ram);
-    chSysUnlockFromISR();
-  }
-}
-
-/*
- ******************************************************************************
- * EXPORTED FUNCTIONS
- ******************************************************************************
- */
-
-void dma_storm_spi_start(void){
-  ints = 0;
-  stop = false;
-  chBSemObjectInit(&sem, true);
-  spiStart(&SPID1, &spicfg);
-  spiStartExchange(&SPID1, SPI_BUF_SIZE, testbuf_flash, testbuf_ram);
-}
-
-uint32_t dma_storm_spi_stop(void){
-  stop = true;
-  chBSemWait(&sem);
-  spiStop(&SPID1);
-  return ints;
-}
-
diff --git a/testhal/STM32/STM32F4xx/FSMC_NAND/dma_storm_uart.c b/testhal/STM32/STM32F4xx/FSMC_NAND/dma_storm_uart.c
deleted file mode 100644
index e82e6838c..000000000
--- a/testhal/STM32/STM32F4xx/FSMC_NAND/dma_storm_uart.c
+++ /dev/null
@@ -1,164 +0,0 @@
-/*
-    ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-/*
-   Concepts and parts of this file have been contributed by Uladzimir Pylinsky
-   aka barthess.
- */
-
-#include "ch.h"
-#include "hal.h"
-
-/*
- ******************************************************************************
- * DEFINES
- ******************************************************************************
- */
-#define UART_STORM_BAUDRATE     3000000
-#define STORM_BUF_LEN           256
-
-/*
- ******************************************************************************
- * EXTERNS
- ******************************************************************************
- */
-
-/*
- ******************************************************************************
- * PROTOTYPES
- ******************************************************************************
- */
-static void txend1(UARTDriver *uartp);
-static void txend2(UARTDriver *uartp);
-static void rxerr(UARTDriver *uartp, uartflags_t e);
-static void rxchar(UARTDriver *uartp, uint16_t c);
-static void rxend(UARTDriver *uartp);
-
-/*
- ******************************************************************************
- * GLOBAL VARIABLES
- ******************************************************************************
- */
-static uint8_t rxbuf[STORM_BUF_LEN];
-static uint8_t txbuf[STORM_BUF_LEN];
-
-/*
- * UART driver configuration structure.
- */
-static const UARTConfig uart_cfg = {
-  txend1,
-  txend2,
-  rxend,
-  rxchar,
-  rxerr,
-  UART_STORM_BAUDRATE,
-  0,
-  0,
-  0
-};
-
-static uint32_t ints;
-
-/*
- ******************************************************************************
- ******************************************************************************
- * LOCAL FUNCTIONS
- ******************************************************************************
- ******************************************************************************
- */
-/*
- * This callback is invoked when a transmission buffer has been completely
- * read by the driver.
- */
-static void txend1(UARTDriver *uartp) {
-
-  ints++;
-  chSysLockFromISR();
-  uartStartSendI(uartp, STORM_BUF_LEN, txbuf);
-  chSysUnlockFromISR();
-}
-
-/*
- * This callback is invoked when a transmission has physically completed.
- */
-static void txend2(UARTDriver *uartp) {
-  (void)uartp;
-
-  chSysLockFromISR();
-  chSysUnlockFromISR();
-}
-
-/*
- * This callback is invoked on a receive error, the errors mask is passed
- * as parameter.
- */
-static void rxerr(UARTDriver *uartp, uartflags_t e) {
-  (void)uartp;
-  (void)e;
-  osalSysHalt("");
-}
-
-/*
- * This callback is invoked when a character is received but the application
- * was not ready to receive it, the character is passed as parameter.
- */
-static void rxchar(UARTDriver *uartp, uint16_t c) {
-  (void)uartp;
-  (void)c;
-}
-
-/*
- * This callback is invoked when a receive buffer has been completely written.
- */
-static void rxend(UARTDriver *uartp) {
-  (void)uartp;
-
-  chSysLockFromISR();
-  uartStartReceiveI(&UARTD6, STORM_BUF_LEN, rxbuf);
-  chSysUnlockFromISR();
-}
-
-/*
- ******************************************************************************
- * EXPORTED FUNCTIONS
- ******************************************************************************
- */
-
-/**
- *
- */
-void dma_storm_uart_start(void){
-
-  uint32_t i;
-
-  for (i=0; i<STORM_BUF_LEN; i++){
-    txbuf[i] = 0x55;
-    rxbuf[i] = 0;
-  }
-
-  ints = 0;
-  uartStart(&UARTD6, &uart_cfg);
-  uartStartReceive(&UARTD6, STORM_BUF_LEN, rxbuf);
-  uartStartSend(&UARTD6, STORM_BUF_LEN, txbuf);
-}
-
-uint32_t dma_storm_uart_stop(void){
-
-  uartStopSend(&UARTD6);
-  uartStopReceive(&UARTD6);
-  uartStop(&UARTD6);
-
-  return ints;
-}
diff --git a/testhal/STM32/STM32F4xx/FSMC_NAND/halconf.h b/testhal/STM32/STM32F4xx/FSMC_NAND/halconf.h
deleted file mode 100644
index f73801d3a..000000000
--- a/testhal/STM32/STM32F4xx/FSMC_NAND/halconf.h
+++ /dev/null
@@ -1,339 +0,0 @@
-/*
-    ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-/**
- * @file    templates/halconf.h
- * @brief   HAL configuration header.
- * @details HAL configuration file, this file allows to enable or disable the
- *          various device drivers from your application. You may also use
- *          this file in order to override the device drivers default settings.
- *
- * @addtogroup HAL_CONF
- * @{
- */
-
-#ifndef _HALCONF_H_
-#define _HALCONF_H_
-
-#include "mcuconf.h"
-
-/**
- * @brief   Enables the PAL subsystem.
- */
-#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
-#define HAL_USE_PAL                 TRUE
-#endif
-
-/**
- * @brief   Enables the ADC subsystem.
- */
-#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
-#define HAL_USE_ADC                 TRUE
-#endif
-
-/**
- * @brief   Enables the CAN subsystem.
- */
-#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
-#define HAL_USE_CAN                 FALSE
-#endif
-
-/**
- * @brief   Enables the EXT subsystem.
- */
-#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
-#define HAL_USE_EXT                 TRUE
-#endif
-
-/**
- * @brief   Enables the GPT subsystem.
- */
-#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
-#define HAL_USE_GPT                 FALSE
-#endif
-
-/**
- * @brief   Enables the I2C subsystem.
- */
-#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
-#define HAL_USE_I2C                 FALSE
-#endif
-
-/**
- * @brief   Enables the I2S subsystem.
- */
-#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
-#define HAL_USE_I2S                 FALSE
-#endif
-
-/**
- * @brief   Enables the ICU subsystem.
- */
-#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
-#define HAL_USE_ICU                 FALSE
-#endif
-
-/**
- * @brief   Enables the MAC subsystem.
- */
-#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
-#define HAL_USE_MAC                 FALSE
-#endif
-
-/**
- * @brief   Enables the MMC_SPI subsystem.
- */
-#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
-#define HAL_USE_MMC_SPI             FALSE
-#endif
-
-/**
- * @brief   Enables the PWM subsystem.
- */
-#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
-#define HAL_USE_PWM                 FALSE
-#endif
-
-/**
- * @brief   Enables the RTC subsystem.
- */
-#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
-#define HAL_USE_RTC                 FALSE
-#endif
-
-/**
- * @brief   Enables the SDC subsystem.
- */
-#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
-#define HAL_USE_SDC                 FALSE
-#endif
-
-/**
- * @brief   Enables the SERIAL subsystem.
- */
-#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
-#define HAL_USE_SERIAL              FALSE
-#endif
-
-/**
- * @brief   Enables the SERIAL over USB subsystem.
- */
-#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
-#define HAL_USE_SERIAL_USB          FALSE
-#endif
-
-/**
- * @brief   Enables the SPI subsystem.
- */
-#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
-#define HAL_USE_SPI                 TRUE
-#endif
-
-/**
- * @brief   Enables the UART subsystem.
- */
-#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
-#define HAL_USE_UART                TRUE
-#endif
-
-/**
- * @brief   Enables the USB subsystem.
- */
-#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
-#define HAL_USE_USB                 FALSE
-#endif
-
-/**
- * @brief   Enables the NAND subsystem.
- */
-#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__)
-#define HAL_USE_NAND                TRUE
-#endif
-
-/*===========================================================================*/
-/* ADC driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables synchronous APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
-#define ADC_USE_WAIT                TRUE
-#endif
-
-/**
- * @brief   Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define ADC_USE_MUTUAL_EXCLUSION    TRUE
-#endif
-
-/*===========================================================================*/
-/* CAN driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Sleep mode related APIs inclusion switch.
- */
-#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
-#define CAN_USE_SLEEP_MODE          TRUE
-#endif
-
-/*===========================================================================*/
-/* I2C driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables the mutual exclusion APIs on the I2C bus.
- */
-#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define I2C_USE_MUTUAL_EXCLUSION    TRUE
-#endif
-
-/*===========================================================================*/
-/* MAC driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables an event sources for incoming packets.
- */
-#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
-#define MAC_USE_ZERO_COPY           FALSE
-#endif
-
-/**
- * @brief   Enables an event sources for incoming packets.
- */
-#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
-#define MAC_USE_EVENTS              TRUE
-#endif
-
-/*===========================================================================*/
-/* MMC_SPI driver related settings.                                          */
-/*===========================================================================*/
-
-/**
- * @brief   Delays insertions.
- * @details If enabled this options inserts delays into the MMC waiting
- *          routines releasing some extra CPU time for the threads with
- *          lower priority, this may slow down the driver a bit however.
- *          This option is recommended also if the SPI driver does not
- *          use a DMA channel and heavily loads the CPU.
- */
-#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
-#define MMC_NICE_WAITING            TRUE
-#endif
-
-/*===========================================================================*/
-/* SDC driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Number of initialization attempts before rejecting the card.
- * @note    Attempts are performed at 10mS intervals.
- */
-#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
-#define SDC_INIT_RETRY              100
-#endif
-
-/**
- * @brief   Include support for MMC cards.
- * @note    MMC support is not yet implemented so this option must be kept
- *          at @p FALSE.
- */
-#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
-#define SDC_MMC_SUPPORT             FALSE
-#endif
-
-/**
- * @brief   Delays insertions.
- * @details If enabled this options inserts delays into the MMC waiting
- *          routines releasing some extra CPU time for the threads with
- *          lower priority, this may slow down the driver a bit however.
- */
-#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
-#define SDC_NICE_WAITING            TRUE
-#endif
-
-/*===========================================================================*/
-/* SERIAL driver related settings.                                           */
-/*===========================================================================*/
-
-/**
- * @brief   Default bit rate.
- * @details Configuration parameter, this is the baud rate selected for the
- *          default configuration.
- */
-#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
-#define SERIAL_DEFAULT_BITRATE      38400
-#endif
-
-/**
- * @brief   Serial buffers size.
- * @details Configuration parameter, you can change the depth of the queue
- *          buffers depending on the requirements of your application.
- * @note    The default is 64 bytes for both the transmission and receive
- *          buffers.
- */
-#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
-#define SERIAL_BUFFERS_SIZE         16
-#endif
-
-/*===========================================================================*/
-/* SPI driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables synchronous APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
-#define SPI_USE_WAIT                TRUE
-#endif
-
-/**
- * @brief   Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define SPI_USE_MUTUAL_EXCLUSION    TRUE
-#endif
-
-/*===========================================================================*/
-/* EMCNAND driver related settings.                                          */
-/*===========================================================================*/
-
-/**
- * @brief   Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define NAND_USE_MUTUAL_EXCLUSION    TRUE
-#endif
-
-/**
- * @brief   Enables internal driver map for bad blocks.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(NAND_USE_BAD_MAP) || defined(__DOXYGEN__)
-#define NAND_USE_BAD_MAP             TRUE
-#endif
-
-#endif /* _HALCONF_H_ */
-
-/** @} */
diff --git a/testhal/STM32/STM32F4xx/FSMC_NAND/main.c b/testhal/STM32/STM32F4xx/FSMC_NAND/main.c
deleted file mode 100644
index e69589443..000000000
--- a/testhal/STM32/STM32F4xx/FSMC_NAND/main.c
+++ /dev/null
@@ -1,642 +0,0 @@
-/*
-    ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-/*
-   Concepts and parts of this file have been contributed by Uladzimir Pylinsky
-   aka barthess.
- */
-
-/*
- * Hardware notes.
- *
- * Use external pullup on ready/busy pin of NAND IC for a speed reason.
- *
- * Chose MCU with 140 (or more) pins package because 100 pins packages
- * has no dedicated interrupt pins for FSMC.
- *
- * If your hardware already done using 100 pin package than you have to:
- * 1) connect ready/busy pin to GPIOD6 (NWAIT in terms of STM32)
- * 2) set GPIOD6 pin as input with pullup and connect it to alternate
- * function0 (not function12)
- * 3) set up EXTI to catch raising edge on GPIOD6 and call NAND driver's
- * isr_handler() function from an EXTI callback.
- *
- * If you use MLC flash memory do NOT use ECC to detect/correct
- * errors because of its weakness. Use Rid-Solomon on BCH code instead.
- * Yes, you have to realize it in sowftware yourself.
- */
-
-/*
- * Software notes.
- *
- * For correct calculation of timing values you need AN2784 document
- * from STMicro.
- */
-
-#include "ch.h"
-#include "hal.h"
-
-#include "dma_storm.h"
-#include "string.h"
-#include "stdlib.h"
-
-/*
- ******************************************************************************
- * DEFINES
- ******************************************************************************
- */
-
-#define USE_KILL_BLOCK_TEST       FALSE
-
-#define FSMCNAND_TIME_SET         ((uint32_t) 2) //(8nS)
-#define FSMCNAND_TIME_WAIT        ((uint32_t) 6) //(30nS)
-#define FSMCNAND_TIME_HOLD        ((uint32_t) 1) //(5nS)
-#define FSMCNAND_TIME_HIZ         ((uint32_t) 4) //(20nS)
-
-#define NAND_BLOCKS_COUNT         8192
-#define NAND_PAGE_DATA_SIZE       2048
-#define NAND_PAGE_SPARE_SIZE      64
-#define NAND_PAGE_SIZE            (NAND_PAGE_SPARE_SIZE + NAND_PAGE_DATA_SIZE)
-#define NAND_PAGES_PER_BLOCK      64
-#define NAND_ROW_WRITE_CYCLES     3
-#define NAND_COL_WRITE_CYCLES     2
-
-#define NANF_TEST_START_BLOCK     1200
-#define NAND_TEST_END_BLOCK       1220
-
-#if USE_KILL_BLOCK_TEST
-#define NAND_TEST_KILL_BLOCK      8000
-#endif
-
-#if STM32_NAND_USE_FSMC_NAND1
-  #define NAND                    NANDD1
-#elif STM32_NAND_USE_FSMC_NAND2
-  #define NAND                    NANDD2
-#else
-#error "You should enable at least one NAND interface"
-#endif
-
-/*
- ******************************************************************************
- * EXTERNS
- ******************************************************************************
- */
-
-/*
- ******************************************************************************
- * PROTOTYPES
- ******************************************************************************
- */
-#if STM32_NAND_USE_EXT_INT
-static void ready_isr_enable(void);
-static void ready_isr_disable(void);
-static void nand_ready_cb(EXTDriver *extp, expchannel_t channel);
-#endif
-
-/*
- ******************************************************************************
- * GLOBAL VARIABLES
- ******************************************************************************
- */
-/*
- *
- */
-static uint8_t nand_buf[NAND_PAGE_SIZE];
-static uint8_t ref_buf[NAND_PAGE_SIZE];
-
-/*
- *
- */
-static time_measurement_t tmu_erase;
-static time_measurement_t tmu_write_data;
-static time_measurement_t tmu_write_spare;
-static time_measurement_t tmu_read_data;
-static time_measurement_t tmu_read_spare;
-
-#if NAND_USE_BAD_MAP
-static uint32_t badblock_map[NAND_BLOCKS_COUNT / 32];
-#endif
-
-/*
- *
- */
-static const NANDConfig nandcfg = {
-    &FSMCD1,
-    NAND_BLOCKS_COUNT,
-    NAND_PAGE_DATA_SIZE,
-    NAND_PAGE_SPARE_SIZE,
-    NAND_PAGES_PER_BLOCK,
-#if NAND_USE_BAD_MAP
-    badblock_map,
-#endif
-    NAND_ROW_WRITE_CYCLES,
-    NAND_COL_WRITE_CYCLES,
-    /* stm32 specific fields */
-    ((FSMCNAND_TIME_HIZ << 24) | (FSMCNAND_TIME_HOLD << 16) | \
-                                 (FSMCNAND_TIME_WAIT << 8) | FSMCNAND_TIME_SET),
-#if STM32_NAND_USE_EXT_INT
-    ready_isr_enable,
-    ready_isr_disable
-#endif
-};
-
-/**
- *
- */
-#if STM32_NAND_USE_EXT_INT
-static const EXTConfig extcfg = {
-  {
-    {EXT_CH_MODE_DISABLED, NULL},     //0
-    {EXT_CH_MODE_DISABLED, NULL},
-    {EXT_CH_MODE_DISABLED, NULL},
-    {EXT_CH_MODE_DISABLED, NULL},
-    {EXT_CH_MODE_DISABLED, NULL},     //4
-    {EXT_CH_MODE_DISABLED, NULL},
-    {EXT_CH_MODE_RISING_EDGE | EXT_MODE_GPIOD, nand_ready_cb},
-    {EXT_CH_MODE_DISABLED, NULL},
-    {EXT_CH_MODE_DISABLED, NULL},     //8
-    {EXT_CH_MODE_DISABLED, NULL},
-    {EXT_CH_MODE_DISABLED, NULL},
-    {EXT_CH_MODE_DISABLED, NULL},
-    {EXT_CH_MODE_DISABLED, NULL},     //12
-    {EXT_CH_MODE_DISABLED, NULL},
-    {EXT_CH_MODE_DISABLED, NULL},
-    {EXT_CH_MODE_DISABLED, NULL},
-    {EXT_CH_MODE_DISABLED, NULL},     //16
-    {EXT_CH_MODE_DISABLED, NULL},
-    {EXT_CH_MODE_DISABLED, NULL},
-    {EXT_CH_MODE_DISABLED, NULL},
-    {EXT_CH_MODE_DISABLED, NULL},     //20
-    {EXT_CH_MODE_DISABLED, NULL},
-    {EXT_CH_MODE_DISABLED, NULL},
-  }
-};
-#endif /* STM32_NAND_USE_EXT_INT */
-
-static uint32_t BackgroundThdCnt = 0;
-
-#if USE_KILL_BLOCK_TEST
-static uint32_t KillCycle = 0;
-#endif
-
-/*
- ******************************************************************************
- ******************************************************************************
- * LOCAL FUNCTIONS
- ******************************************************************************
- ******************************************************************************
- */
-static void nand_wp_assert(void)   {palClearPad(GPIOB, GPIOB_NAND_WP);}
-static void nand_wp_release(void)  {palSetPad(GPIOB, GPIOB_NAND_WP);}
-static void red_led_on(void)       {palSetPad(GPIOI, GPIOI_LED_R);}
-static void red_led_off(void)      {palClearPad(GPIOI, GPIOI_LED_R);}
-
-#if STM32_NAND_USE_EXT_INT
-static void nand_ready_cb(EXTDriver *extp, expchannel_t channel){
-  (void)extp;
-  (void)channel;
-
-  NAND.isr_handler(&NAND);
-}
-
-static void ready_isr_enable(void) {
-  extChannelEnable(&EXTD1, GPIOD_NAND_RB_NWAIT);
-}
-
-static void ready_isr_disable(void) {
-  extChannelDisable(&EXTD1, GPIOD_NAND_RB_NWAIT);
-}
-#endif /* STM32_NAND_USE_EXT_INT */
-
-/**
- *
- */
-static THD_WORKING_AREA(BackgroundThreadWA, 128);
-static THD_FUNCTION(BackgroundThread, arg) {
-  (void)arg;
-
-  while(true){
-    BackgroundThdCnt++;
-  }
-  return 0;
-}
-
-/*
- *
- */
-static bool is_erased(NANDDriver *dp, size_t block){
-  uint32_t page = 0;
-  size_t i = 0;
-
-  for (page=0; page<NAND.config->pages_per_block; page++){
-    nandReadPageData(dp, block, page, nand_buf, NAND.config->page_data_size, NULL);
-    nandReadPageSpare(dp, block, page, &nand_buf[2048], NAND.config->page_spare_size);
-    for (i=0; i<sizeof(nand_buf); i++) {
-      if (nand_buf[i] != 0xFF)
-        return false;
-    }
-  }
-
-  return true;
-}
-
-/*
- *
- */
-static void pattern_fill(void) {
-
-  size_t i;
-
-  srand(chSysGetRealtimeCounterX());
-
-  for(i=0; i<NAND_PAGE_SIZE; i++){
-    ref_buf[i] = rand() & 0xFF;
-  }
-
-  /* protect bad mark */
-  ref_buf[NAND_PAGE_DATA_SIZE]     = 0xFF;
-  ref_buf[NAND_PAGE_DATA_SIZE + 1] = 0xFF;
-  memcpy(nand_buf, ref_buf, NAND_PAGE_SIZE);
-
-  /* paranoid mode ON */
-  osalDbgCheck(0 == memcmp(ref_buf, nand_buf, NAND_PAGE_SIZE));
-}
-
-/*
- *
- */
-#if USE_KILL_BLOCK_TEST
-static void kill_block(NANDDriver *nandp, uint32_t block){
-
-  size_t i = 0;
-  size_t page = 0;
-  uint8_t op_status;
-
-  /* This test requires good block.*/
-  osalDbgCheck(!nandIsBad(nandp, block));
-
-  while(true){
-    op_status = nandErase(&NAND, block);
-    if (0 != (op_status & 1)){
-      if(!is_erased(nandp, block))
-        osalSysHalt("Block successfully killed");
-    }
-    if(!is_erased(nandp, block))
-      osalSysHalt("Block block not erased, but erase operation report success");
-
-    for (page=0; page<nandp->config->pages_per_block; page++){
-      memset(nand_buf, 0, NAND_PAGE_SIZE);
-      op_status = nandWritePageWhole(nandp, block, page, nand_buf, NAND_PAGE_SIZE);
-      if (0 != (op_status & 1)){
-        nandReadPageWhole(nandp, block, page, nand_buf, NAND_PAGE_SIZE);
-        for (i=0; i<NAND_PAGE_SIZE; i++){
-          if (nand_buf[i] != 0)
-            osalSysHalt("Block successfully killed");
-        }
-      }
-
-      nandReadPageWhole(nandp, block, page, nand_buf, NAND_PAGE_SIZE);
-      for (i=0; i<NAND_PAGE_SIZE; i++){
-        if (nand_buf[i] != 0)
-          osalSysHalt("Page write failed, but write operation report success");
-      }
-    }
-    KillCycle++;
-  }
-}
-#endif /* USE_KILL_BLOCK_TEST */
-
-/*
- *
- */
-typedef enum {
-  ECC_NO_ERROR = 0,
-  ECC_CORRECTABLE_ERROR = 1,
-  ECC_UNCORRECTABLE_ERROR = 2,
-  ECC_CORRUPTED = 3,
-} ecc_result_t;
-
-/*
- *
- */
-static ecc_result_t parse_ecc(uint32_t ecclen,
-                    uint32_t ecc1, uint32_t ecc2, uint32_t *corrupted){
-
-  size_t i = 0;
-  uint32_t corr = 0;
-  uint32_t e = 0;
-  uint32_t shift = (32 - ecclen);
-  uint32_t b0, b1;
-
-  ecc1 <<= shift;
-  ecc1 >>= shift;
-  ecc2 <<= shift;
-  ecc2 >>= shift;
-  e = ecc1 ^ ecc2;
-
-  if (0 == e){
-    return ECC_NO_ERROR;
-  }
-  else if (((e - 1) & e) == 0){
-    return ECC_CORRUPTED;
-  }
-  else {
-    for (i=0; i<ecclen/2; i++){
-      b0 = e & 1;
-      e >>= 1;
-      b1 = e & 1;
-      e >>= 1;
-      if ((b0 + b1) != 1)
-        return ECC_UNCORRECTABLE_ERROR;
-      corr |= b1 << i;
-    }
-    *corrupted = corr;
-    return ECC_CORRECTABLE_ERROR;
-  }
-}
-
-/*
- *
- */
-static void invert_bit(uint8_t *buf, uint32_t byte, uint32_t bit){
-  osalDbgCheck((byte < NAND_PAGE_DATA_SIZE) && (bit < 8));
-  buf[byte] ^= ((uint8_t)1) << bit;
-}
-
-/*
- *
- */
-static void ecc_test(NANDDriver *nandp, uint32_t block){
-
-  uint32_t corrupted;
-  uint32_t byte, bit;
-  const uint32_t ecclen = 28;
-  uint32_t ecc_ref, ecc_broken;
-  uint8_t op_status;
-  ecc_result_t ecc_result = ECC_NO_ERROR;
-
-  /* This test requires good block.*/
-  osalDbgCheck(!nandIsBad(nandp, block));
-  if (!is_erased(nandp, block))
-    nandErase(&NAND, block);
-
-  pattern_fill();
-
-  /*** Correctable errors ***/
-  op_status = nandWritePageData(nandp, block, 0,
-                nand_buf, nandp->config->page_data_size, &ecc_ref);
-  osalDbgCheck(0 == (op_status & 1)); /* operation failed */
-  nandReadPageData(nandp, block, 0,
-                  nand_buf, nandp->config->page_data_size, &ecc_broken);
-  ecc_result = parse_ecc(ecclen, ecc_ref, ecc_broken, &corrupted);
-  osalDbgCheck(ECC_NO_ERROR == ecc_result); /* unexpected error */
-
-  /**/
-  byte = 0;
-  bit = 7;
-  invert_bit(nand_buf, byte, bit);
-  op_status = nandWritePageData(nandp, block, 1,
-                nand_buf, nandp->config->page_data_size, &ecc_broken);
-  osalDbgCheck(0 == (op_status & 1)); /* operation failed */
-  invert_bit(nand_buf, byte, bit);
-  ecc_result = parse_ecc(ecclen, ecc_ref, ecc_broken, &corrupted);
-  osalDbgCheck(ECC_CORRECTABLE_ERROR == ecc_result); /* this error must be correctable */
-  osalDbgCheck(corrupted == (byte * 8 + bit)); /* wrong correction code */
-
-  /**/
-  byte = 2047;
-  bit = 0;
-  invert_bit(nand_buf, byte, bit);
-  op_status = nandWritePageData(nandp, block, 2,
-                nand_buf, nandp->config->page_data_size, &ecc_broken);
-  osalDbgCheck(0 == (op_status & 1)); /* operation failed */
-  invert_bit(nand_buf, byte, bit);
-  ecc_result = parse_ecc(ecclen, ecc_ref, ecc_broken, &corrupted);
-  osalDbgCheck(ECC_CORRECTABLE_ERROR == ecc_result); /* this error must be correctable */
-  osalDbgCheck(corrupted == (byte * 8 + bit)); /* wrong correction code */
-
-  /**/
-  byte = 1027;
-  bit = 3;
-  invert_bit(nand_buf, byte, bit);
-  op_status = nandWritePageData(nandp, block, 3,
-                nand_buf, nandp->config->page_data_size, &ecc_broken);
-  osalDbgCheck(0 == (op_status & 1)); /* operation failed */
-  invert_bit(nand_buf, byte, bit);
-  ecc_result = parse_ecc(ecclen, ecc_ref, ecc_broken, &corrupted);
-  osalDbgCheck(ECC_CORRECTABLE_ERROR == ecc_result); /* this error must be correctable */
-  osalDbgCheck(corrupted == (byte * 8 + bit)); /* wrong correction code */
-
-  /*** Uncorrectable error ***/
-  byte = 1027;
-  invert_bit(nand_buf, byte, 3);
-  invert_bit(nand_buf, byte, 4);
-  op_status = nandWritePageData(nandp, block, 4,
-                nand_buf, nandp->config->page_data_size, &ecc_broken);
-  osalDbgCheck(0 == (op_status & 1)); /* operation failed */
-  invert_bit(nand_buf, byte, 3);
-  invert_bit(nand_buf, byte, 4);
-  ecc_result = parse_ecc(28, ecc_ref, ecc_broken, &corrupted);
-  osalDbgCheck(ECC_UNCORRECTABLE_ERROR == ecc_result); /* This error must be NOT correctable */
-
-  /*** make clean ***/
-  nandErase(&NAND, block);
-}
-
-/*
- *
- */
-static void general_test (NANDDriver *nandp, size_t first,
-                                      size_t last, size_t read_rounds){
-
-  size_t block, page, round;
-  bool status;
-  uint8_t op_status;
-  uint32_t recc, wecc;
-
-  red_led_on();
-
-  /* initialize time measurement units */
-  chTMObjectInit(&tmu_erase);
-  chTMObjectInit(&tmu_write_data);
-  chTMObjectInit(&tmu_write_spare);
-  chTMObjectInit(&tmu_read_data);
-  chTMObjectInit(&tmu_read_spare);
-
-  /* perform basic checks */
-  for (block=first; block<last; block++){
-    if (!nandIsBad(nandp, block)){
-      if (!is_erased(nandp, block)){
-        op_status = nandErase(nandp, block);
-        osalDbgCheck(0 == (op_status & 1)); /* operation failed */
-      }
-    }
-  }
-
-  /* write block with pattern, read it back and compare */
-  for (block=first; block<last; block++){
-    if (!nandIsBad(nandp, block)){
-      for (page=0; page<nandp->config->pages_per_block; page++){
-        pattern_fill();
-
-        chTMStartMeasurementX(&tmu_write_data);
-        op_status = nandWritePageData(nandp, block, page,
-                      nand_buf, nandp->config->page_data_size, &wecc);
-        chTMStopMeasurementX(&tmu_write_data);
-        osalDbgCheck(0 == (op_status & 1)); /* operation failed */
-
-        chTMStartMeasurementX(&tmu_write_spare);
-        op_status = nandWritePageSpare(nandp, block, page,
-                      nand_buf + nandp->config->page_data_size,
-                      nandp->config->page_spare_size);
-        chTMStopMeasurementX(&tmu_write_spare);
-        osalDbgCheck(0 == (op_status & 1)); /* operation failed */
-
-        /* read back and compare */
-        for (round=0; round<read_rounds; round++){
-          memset(nand_buf, 0, NAND_PAGE_SIZE);
-
-          chTMStartMeasurementX(&tmu_read_data);
-          nandReadPageData(nandp, block, page,
-                      nand_buf, nandp->config->page_data_size, &recc);
-          chTMStopMeasurementX(&tmu_read_data);
-          osalDbgCheck(0 == (recc ^ wecc)); /* ECC error detected */
-
-          chTMStartMeasurementX(&tmu_read_spare);
-          nandReadPageSpare(nandp, block, page,
-                      nand_buf + nandp->config->page_data_size,
-                      nandp->config->page_spare_size);
-          chTMStopMeasurementX(&tmu_read_spare);
-
-          osalDbgCheck(0 == memcmp(ref_buf, nand_buf, NAND_PAGE_SIZE)); /* Read back failed */
-        }
-      }
-
-      /* make clean */
-      chTMStartMeasurementX(&tmu_erase);
-      op_status = nandErase(nandp, block);
-      chTMStopMeasurementX(&tmu_erase);
-      osalDbgCheck(0 == (op_status & 1)); /* operation failed */
-
-      status = is_erased(nandp, block);
-      osalDbgCheck(true == status); /* blocks was not erased successfully */
-    }/* if (!nandIsBad(nandp, block)){ */
-  }
-  red_led_off();
-}
-
-
-/*
- ******************************************************************************
- * EXPORTED FUNCTIONS
- ******************************************************************************
- */
-
-/*
- * Application entry point.
- */
-int main(void) {
-
-  /* performance counters */
-  int32_t adc_ints = 0;
-  int32_t spi_ints = 0;
-  int32_t uart_ints = 0;
-  int32_t adc_idle_ints = 0;
-  int32_t spi_idle_ints = 0;
-  int32_t uart_idle_ints = 0;
-  uint32_t background_cnt = 0;
-  systime_t T = 0;
-
-  /*
-   * System initializations.
-   * - HAL initialization, this also initializes the configured device drivers
-   *   and performs the board-specific initializations.
-   * - Kernel initialization, the main() function becomes a thread and the
-   *   RTOS is active.
-   */
-  halInit();
-  chSysInit();
-
-#if STM32_NAND_USE_EXT_INT
-  extStart(&EXTD1, &extcfg);
-#endif
-  nandStart(&NAND, &nandcfg);
-
-  chThdSleepMilliseconds(4000);
-
-  chThdCreateStatic(BackgroundThreadWA,
-        sizeof(BackgroundThreadWA),
-        NORMALPRIO - 20,
-        BackgroundThread,
-        NULL);
-
-  nand_wp_release();
-
-  /*
-   * run NAND test in parallel with DMA load and background thread
-   */
-  dma_storm_adc_start();
-  dma_storm_uart_start();
-  dma_storm_spi_start();
-  T = chVTGetSystemTimeX();
-  general_test(&NAND, NANF_TEST_START_BLOCK, NAND_TEST_END_BLOCK, 1);
-  T = chVTGetSystemTimeX() - T;
-  adc_ints = dma_storm_adc_stop();
-  uart_ints = dma_storm_uart_stop();
-  spi_ints = dma_storm_spi_stop();
-  chSysLock();
-  background_cnt = BackgroundThdCnt;
-  BackgroundThdCnt = 0;
-  chSysUnlock();
-
-  /*
-   * run DMA load and background thread _without_ NAND test
-   */
-  dma_storm_adc_start();
-  dma_storm_uart_start();
-  dma_storm_spi_start();
-  chThdSleep(T);
-  adc_idle_ints = dma_storm_adc_stop();
-  uart_idle_ints = dma_storm_uart_stop();
-  spi_idle_ints = dma_storm_spi_stop();
-
-  /*
-   * ensure that NAND code have negligible impact on other subsystems
-   */
-  osalDbgCheck(background_cnt > (BackgroundThdCnt / 4));
-  osalDbgCheck(abs(adc_ints - adc_idle_ints)   < (adc_idle_ints  / 20));
-  osalDbgCheck(abs(uart_ints - uart_idle_ints) < (uart_idle_ints / 20));
-  osalDbgCheck(abs(spi_ints - spi_idle_ints)   < (spi_idle_ints  / 10));
-
-  /*
-   * perform ECC calculation test
-   */
-  ecc_test(&NAND, NAND_TEST_END_BLOCK);
-
-#if USE_KILL_BLOCK_TEST
-  kill_block(&NAND, NAND_TEST_KILL_BLOCK);
-#endif
-
-  nand_wp_assert();
-
-  /*
-   * Normal main() thread activity, in this demo it does nothing.
-   */
-  while (TRUE) {
-    chThdSleepMilliseconds(500);
-  }
-}
-
-
diff --git a/testhal/STM32/STM32F4xx/FSMC_NAND/mcuconf.h b/testhal/STM32/STM32F4xx/FSMC_NAND/mcuconf.h
deleted file mode 100644
index 99bafd9f6..000000000
--- a/testhal/STM32/STM32F4xx/FSMC_NAND/mcuconf.h
+++ /dev/null
@@ -1,322 +0,0 @@
-/*
-    ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-/*
- * STM32F4xx drivers configuration.
- * The following settings override the default settings present in
- * the various device driver implementation headers.
- * Note that the settings for each driver only have effect if the whole
- * driver is enabled in halconf.h.
- *
- * IRQ priorities:
- * 15...0       Lowest...Highest.
- *
- * DMA priorities:
- * 0...3        Lowest...Highest.
- */
-
-#define STM32F4xx_MCUCONF
-
-/*
- * HAL driver system settings.
- */
-#define STM32_NO_INIT                       FALSE
-#define STM32_HSI_ENABLED                   TRUE
-#define STM32_LSI_ENABLED                   TRUE
-#define STM32_HSE_ENABLED                   TRUE
-#define STM32_LSE_ENABLED                   FALSE
-#define STM32_CLOCK48_REQUIRED              TRUE
-#define STM32_SW                            STM32_SW_PLL
-#define STM32_PLLSRC                        STM32_PLLSRC_HSE
-#define STM32_PLLM_VALUE                    12
-#define STM32_PLLN_VALUE                    336
-#define STM32_PLLP_VALUE                    2
-#define STM32_PLLQ_VALUE                    7
-#define STM32_HPRE                          STM32_HPRE_DIV1
-#define STM32_PPRE1                         STM32_PPRE1_DIV4
-#define STM32_PPRE2                         STM32_PPRE2_DIV2
-#define STM32_RTCSEL                        STM32_RTCSEL_LSI
-#define STM32_RTCPRE_VALUE                  8
-#define STM32_MCO1SEL                       STM32_MCO1SEL_HSI
-#define STM32_MCO1PRE                       STM32_MCO1PRE_DIV1
-#define STM32_MCO2SEL                       STM32_MCO2SEL_SYSCLK
-#define STM32_MCO2PRE                       STM32_MCO2PRE_DIV5
-#define STM32_I2SSRC                        STM32_I2SSRC_CKIN
-#define STM32_PLLI2SN_VALUE                 192
-#define STM32_PLLI2SR_VALUE                 5
-#define STM32_PVD_ENABLE                    FALSE
-#define STM32_PLS                           STM32_PLS_LEV0
-#define STM32_BKPRAM_ENABLE                 FALSE
-
-/*
- * ADC driver system settings.
- */
-#define STM32_ADC_ADCPRE                    ADC_CCR_ADCPRE_DIV4
-#define STM32_ADC_USE_ADC1                  TRUE
-#define STM32_ADC_USE_ADC2                  FALSE
-#define STM32_ADC_USE_ADC3                  FALSE
-#define STM32_ADC_ADC1_DMA_STREAM           STM32_DMA_STREAM_ID(2, 4)
-#define STM32_ADC_ADC2_DMA_STREAM           STM32_DMA_STREAM_ID(2, 2)
-#define STM32_ADC_ADC3_DMA_STREAM           STM32_DMA_STREAM_ID(2, 1)
-#define STM32_ADC_ADC1_DMA_PRIORITY         3
-#define STM32_ADC_ADC2_DMA_PRIORITY         2
-#define STM32_ADC_ADC3_DMA_PRIORITY         2
-#define STM32_ADC_IRQ_PRIORITY              6
-#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     6
-#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     6
-#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     6
-
-/*
- * CAN driver system settings.
- */
-#define STM32_CAN_USE_CAN1                  FALSE
-#define STM32_CAN_USE_CAN2                  FALSE
-#define STM32_CAN_CAN1_IRQ_PRIORITY         11
-#define STM32_CAN_CAN2_IRQ_PRIORITY         11
-
-/*
- * EXT driver system settings.
- */
-#define STM32_EXT_EXTI0_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI1_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI2_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI3_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI4_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI5_9_IRQ_PRIORITY      6
-#define STM32_EXT_EXTI10_15_IRQ_PRIORITY    6
-#define STM32_EXT_EXTI16_IRQ_PRIORITY       6
-#define STM32_EXT_EXTI17_IRQ_PRIORITY       15
-#define STM32_EXT_EXTI18_IRQ_PRIORITY       6
-#define STM32_EXT_EXTI19_IRQ_PRIORITY       6
-#define STM32_EXT_EXTI20_IRQ_PRIORITY       6
-#define STM32_EXT_EXTI21_IRQ_PRIORITY       15
-#define STM32_EXT_EXTI22_IRQ_PRIORITY       15
-
-/*
- * GPT driver system settings.
- */
-#define STM32_GPT_USE_TIM1                  FALSE
-#define STM32_GPT_USE_TIM2                  FALSE
-#define STM32_GPT_USE_TIM3                  FALSE
-#define STM32_GPT_USE_TIM4                  FALSE
-#define STM32_GPT_USE_TIM5                  FALSE
-#define STM32_GPT_USE_TIM6                  FALSE
-#define STM32_GPT_USE_TIM7                  FALSE
-#define STM32_GPT_USE_TIM8                  FALSE
-#define STM32_GPT_USE_TIM9                  FALSE
-#define STM32_GPT_USE_TIM11                 FALSE
-#define STM32_GPT_USE_TIM12                 FALSE
-#define STM32_GPT_USE_TIM14                 FALSE
-#define STM32_GPT_TIM1_IRQ_PRIORITY         7
-#define STM32_GPT_TIM2_IRQ_PRIORITY         7
-#define STM32_GPT_TIM3_IRQ_PRIORITY         7
-#define STM32_GPT_TIM4_IRQ_PRIORITY         7
-#define STM32_GPT_TIM5_IRQ_PRIORITY         7
-#define STM32_GPT_TIM6_IRQ_PRIORITY         7
-#define STM32_GPT_TIM7_IRQ_PRIORITY         7
-#define STM32_GPT_TIM8_IRQ_PRIORITY         7
-#define STM32_GPT_TIM9_IRQ_PRIORITY         7
-#define STM32_GPT_TIM11_IRQ_PRIORITY        7
-#define STM32_GPT_TIM12_IRQ_PRIORITY        7
-#define STM32_GPT_TIM14_IRQ_PRIORITY        7
-
-/*
- * I2C driver system settings.
- */
-#define STM32_I2C_USE_I2C1                  FALSE
-#define STM32_I2C_USE_I2C2                  FALSE
-#define STM32_I2C_USE_I2C3                  FALSE
-#define STM32_I2C_BUSY_TIMEOUT              50
-#define STM32_I2C_I2C1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 0)
-#define STM32_I2C_I2C1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 6)
-#define STM32_I2C_I2C2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)
-#define STM32_I2C_I2C2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)
-#define STM32_I2C_I2C3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)
-#define STM32_I2C_I2C3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)
-#define STM32_I2C_I2C1_IRQ_PRIORITY         5
-#define STM32_I2C_I2C2_IRQ_PRIORITY         5
-#define STM32_I2C_I2C3_IRQ_PRIORITY         5
-#define STM32_I2C_I2C1_DMA_PRIORITY         3
-#define STM32_I2C_I2C2_DMA_PRIORITY         3
-#define STM32_I2C_I2C3_DMA_PRIORITY         3
-#define STM32_I2C_DMA_ERROR_HOOK(i2cp)      osalSysHalt("DMA failure")
-
-/*
- * ICU driver system settings.
- */
-#define STM32_ICU_USE_TIM1                  FALSE
-#define STM32_ICU_USE_TIM2                  FALSE
-#define STM32_ICU_USE_TIM3                  FALSE
-#define STM32_ICU_USE_TIM4                  FALSE
-#define STM32_ICU_USE_TIM5                  FALSE
-#define STM32_ICU_USE_TIM8                  FALSE
-#define STM32_ICU_USE_TIM9                  FALSE
-#define STM32_ICU_TIM1_IRQ_PRIORITY         7
-#define STM32_ICU_TIM2_IRQ_PRIORITY         7
-#define STM32_ICU_TIM3_IRQ_PRIORITY         7
-#define STM32_ICU_TIM4_IRQ_PRIORITY         7
-#define STM32_ICU_TIM5_IRQ_PRIORITY         7
-#define STM32_ICU_TIM8_IRQ_PRIORITY         7
-#define STM32_ICU_TIM9_IRQ_PRIORITY         7
-
-/*
- * MAC driver system settings.
- */
-#define STM32_MAC_TRANSMIT_BUFFERS          2
-#define STM32_MAC_RECEIVE_BUFFERS           4
-#define STM32_MAC_BUFFERS_SIZE              1522
-#define STM32_MAC_PHY_TIMEOUT               100
-#define STM32_MAC_ETH1_CHANGE_PHY_STATE     TRUE
-#define STM32_MAC_ETH1_IRQ_PRIORITY         13
-#define STM32_MAC_IP_CHECKSUM_OFFLOAD       0
-
-/*
- * PWM driver system settings.
- */
-#define STM32_PWM_USE_ADVANCED              FALSE
-#define STM32_PWM_USE_TIM1                  FALSE
-#define STM32_PWM_USE_TIM2                  FALSE
-#define STM32_PWM_USE_TIM3                  FALSE
-#define STM32_PWM_USE_TIM4                  FALSE
-#define STM32_PWM_USE_TIM5                  FALSE
-#define STM32_PWM_USE_TIM8                  FALSE
-#define STM32_PWM_USE_TIM9                  FALSE
-#define STM32_PWM_TIM1_IRQ_PRIORITY         7
-#define STM32_PWM_TIM2_IRQ_PRIORITY         7
-#define STM32_PWM_TIM3_IRQ_PRIORITY         7
-#define STM32_PWM_TIM4_IRQ_PRIORITY         7
-#define STM32_PWM_TIM5_IRQ_PRIORITY         7
-#define STM32_PWM_TIM8_IRQ_PRIORITY         7
-#define STM32_PWM_TIM9_IRQ_PRIORITY         7
-
-/*
- * SDC driver system settings.
- */
-#define STM32_SDC_SDIO_DMA_PRIORITY         3
-#define STM32_SDC_SDIO_IRQ_PRIORITY         9
-#define STM32_SDC_WRITE_TIMEOUT_MS          250
-#define STM32_SDC_READ_TIMEOUT_MS           25
-#define STM32_SDC_CLOCK_ACTIVATION_DELAY    10
-#define STM32_SDC_SDIO_UNALIGNED_SUPPORT    TRUE
-#define STM32_SDC_SDIO_DMA_STREAM           STM32_DMA_STREAM_ID(2, 3)
-
-/*
- * SERIAL driver system settings.
- */
-#define STM32_SERIAL_USE_USART1             FALSE
-#define STM32_SERIAL_USE_USART2             FALSE
-#define STM32_SERIAL_USE_USART3             FALSE
-#define STM32_SERIAL_USE_UART4              FALSE
-#define STM32_SERIAL_USE_UART5              FALSE
-#define STM32_SERIAL_USE_USART6             FALSE
-#define STM32_SERIAL_USART1_PRIORITY        12
-#define STM32_SERIAL_USART2_PRIORITY        12
-#define STM32_SERIAL_USART3_PRIORITY        12
-#define STM32_SERIAL_UART4_PRIORITY         12
-#define STM32_SERIAL_UART5_PRIORITY         12
-#define STM32_SERIAL_USART6_PRIORITY        12
-
-/*
- * SPI driver system settings.
- */
-#define STM32_SPI_USE_SPI1                  TRUE
-#define STM32_SPI_USE_SPI2                  FALSE
-#define STM32_SPI_USE_SPI3                  FALSE
-#define STM32_SPI_SPI1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(2, 0)
-#define STM32_SPI_SPI1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(2, 3)
-#define STM32_SPI_SPI2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 3)
-#define STM32_SPI_SPI2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)
-#define STM32_SPI_SPI3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 0)
-#define STM32_SPI_SPI3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)
-#define STM32_SPI_SPI1_DMA_PRIORITY         1
-#define STM32_SPI_SPI2_DMA_PRIORITY         1
-#define STM32_SPI_SPI3_DMA_PRIORITY         1
-#define STM32_SPI_SPI1_IRQ_PRIORITY         10
-#define STM32_SPI_SPI2_IRQ_PRIORITY         10
-#define STM32_SPI_SPI3_IRQ_PRIORITY         10
-#define STM32_SPI_DMA_ERROR_HOOK(spip)      osalSysHalt("DMA failure")
-
-/*
- * ST driver system settings.
- */
-#define STM32_ST_IRQ_PRIORITY               8
-#define STM32_ST_USE_TIMER                  2
-
-/*
- * UART driver system settings.
- */
-#define STM32_UART_USE_USART1               FALSE
-#define STM32_UART_USE_USART2               FALSE
-#define STM32_UART_USE_USART3               FALSE
-#define STM32_UART_USE_UART4                FALSE
-#define STM32_UART_USE_UART5                FALSE
-#define STM32_UART_USE_USART6               TRUE
-#define STM32_UART_USART1_RX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 5)
-#define STM32_UART_USART1_TX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 7)
-#define STM32_UART_USART2_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 5)
-#define STM32_UART_USART2_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 6)
-#define STM32_UART_USART3_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 1)
-#define STM32_UART_USART3_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 3)
-#define STM32_UART_UART4_RX_DMA_STREAM      STM32_DMA_STREAM_ID(1, 2)
-#define STM32_UART_UART4_TX_DMA_STREAM      STM32_DMA_STREAM_ID(1, 4)
-#define STM32_UART_UART5_RX_DMA_STREAM      STM32_DMA_STREAM_ID(1, 0)
-#define STM32_UART_UART5_TX_DMA_STREAM      STM32_DMA_STREAM_ID(1, 7)
-#define STM32_UART_USART6_RX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 1)
-#define STM32_UART_USART6_TX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 6)
-#define STM32_UART_USART1_IRQ_PRIORITY      12
-#define STM32_UART_USART2_IRQ_PRIORITY      12
-#define STM32_UART_USART3_IRQ_PRIORITY      12
-#define STM32_UART_UART4_IRQ_PRIORITY       12
-#define STM32_UART_UART5_IRQ_PRIORITY       12
-#define STM32_UART_USART6_IRQ_PRIORITY      6
-#define STM32_UART_USART1_DMA_PRIORITY      0
-#define STM32_UART_USART2_DMA_PRIORITY      0
-#define STM32_UART_USART3_DMA_PRIORITY      0
-#define STM32_UART_UART4_DMA_PRIORITY       0
-#define STM32_UART_UART5_DMA_PRIORITY       0
-#define STM32_UART_USART6_DMA_PRIORITY      2
-#define STM32_UART_DMA_ERROR_HOOK(uartp)    osalSysHalt("DMA failure")
-
-/*
- * USB driver system settings.
- */
-#define STM32_USB_USE_OTG1                  FALSE
-#define STM32_USB_USE_OTG2                  FALSE
-#define STM32_USB_OTG1_IRQ_PRIORITY         14
-#define STM32_USB_OTG2_IRQ_PRIORITY         14
-#define STM32_USB_OTG1_RX_FIFO_SIZE         512
-#define STM32_USB_OTG2_RX_FIFO_SIZE         1024
-#define STM32_USB_OTG_THREAD_PRIO           LOWPRIO
-#define STM32_USB_OTG_THREAD_STACK_SIZE     128
-#define STM32_USB_OTGFIFO_FILL_BASEPRI      0
-
-/*
- * FSMC driver system settings.
- */
-#define STM32_FSMC_USE_FSMC1                TRUE
-#define STM32_FSMC_FSMC1_IRQ_PRIORITY       10
-
-#define STM32_NAND_USE_FSMC_NAND1           TRUE
-#define STM32_NAND_USE_EXT_INT              TRUE
-#define STM32_NAND_DMA_STREAM               STM32_DMA_STREAM_ID(2, 7)
-#define STM32_NAND_DMA_PRIORITY             0
-#define STM32_NAND_DMA_ERROR_HOOK(nandp)    osalSysHalt("DMA failure")
-
-/*
- * FSMC SRAM driver system settings.
- */
-#define STM32_USE_FSMC_SRAM                 FALSE
-#define STM32_SRAM_USE_FSMC_SRAM4           FALSE
diff --git a/testhal/STM32/STM32F4xx/FSMC_SRAM/.cproject b/testhal/STM32/STM32F4xx/FSMC_SRAM/.cproject
deleted file mode 100644
index ba71b3f1b..000000000
--- a/testhal/STM32/STM32F4xx/FSMC_SRAM/.cproject
+++ /dev/null
@@ -1,53 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no"?>
-<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
-	<storageModule moduleId="org.eclipse.cdt.core.settings">
-		<cconfiguration id="0.1570569554">
-			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="0.1570569554" moduleId="org.eclipse.cdt.core.settings" name="Default">
-				<externalSettings/>
-				<extensions>
-					<extension id="org.eclipse.cdt.core.VCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
-					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-					<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-				</extensions>
-			</storageModule>
-			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
-				<configuration artifactName="${ProjName}" buildProperties="" description="" id="0.1570569554" name="Default" parent="org.eclipse.cdt.build.core.prefbase.cfg">
-					<folderInfo id="0.1570569554." name="/" resourcePath="">
-						<toolChain id="org.eclipse.cdt.build.core.prefbase.toolchain.2051275125" name="No ToolChain" resourceTypeBasedDiscovery="false" superClass="org.eclipse.cdt.build.core.prefbase.toolchain">
-							<targetPlatform id="org.eclipse.cdt.build.core.prefbase.toolchain.2051275125.1235631892" name=""/>
-							<builder id="org.eclipse.cdt.build.core.settings.default.builder.681215945" keepEnvironmentInBuildfile="false" managedBuildOn="false" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="org.eclipse.cdt.build.core.settings.default.builder"/>
-							<tool id="org.eclipse.cdt.build.core.settings.holder.libs.1913618182" name="holder for library settings" superClass="org.eclipse.cdt.build.core.settings.holder.libs"/>
-							<tool id="org.eclipse.cdt.build.core.settings.holder.1359024970" name="Assembly" superClass="org.eclipse.cdt.build.core.settings.holder">
-								<option id="org.eclipse.cdt.build.core.settings.holder.incpaths.648690541" name="Include Paths" superClass="org.eclipse.cdt.build.core.settings.holder.incpaths" valueType="includePath"/>
-								<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.865562104" languageId="org.eclipse.cdt.core.assembly" languageName="Assembly" sourceContentType="org.eclipse.cdt.core.asmSource" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
-							</tool>
-							<tool id="org.eclipse.cdt.build.core.settings.holder.321395526" name="GNU C++" superClass="org.eclipse.cdt.build.core.settings.holder">
-								<option id="org.eclipse.cdt.build.core.settings.holder.incpaths.76286563" name="Include Paths" superClass="org.eclipse.cdt.build.core.settings.holder.incpaths" valueType="includePath"/>
-								<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.1168908150" languageId="org.eclipse.cdt.core.g++" languageName="GNU C++" sourceContentType="org.eclipse.cdt.core.cxxSource,org.eclipse.cdt.core.cxxHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
-							</tool>
-							<tool id="org.eclipse.cdt.build.core.settings.holder.1390938668" name="GNU C" superClass="org.eclipse.cdt.build.core.settings.holder">
-								<option id="org.eclipse.cdt.build.core.settings.holder.incpaths.684710851" name="Include Paths" superClass="org.eclipse.cdt.build.core.settings.holder.incpaths" valueType="includePath"/>
-								<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.645908401" languageId="org.eclipse.cdt.core.gcc" languageName="GNU C" sourceContentType="org.eclipse.cdt.core.cSource,org.eclipse.cdt.core.cHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
-							</tool>
-						</toolChain>
-					</folderInfo>
-				</configuration>
-			</storageModule>
-			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
-		</cconfiguration>
-	</storageModule>
-	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
-		<project id="STM32F4xx-GPT.null.188687308" name="STM32F4xx-GPT"/>
-	</storageModule>
-	<storageModule moduleId="scannerConfiguration">
-		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
-		<scannerConfigBuildInfo instanceId="0.1570569554">
-			<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile"/>
-		</scannerConfigBuildInfo>
-	</storageModule>
-	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
-	<storageModule moduleId="refreshScope"/>
-</cproject>
diff --git a/testhal/STM32/STM32F4xx/FSMC_SRAM/.project b/testhal/STM32/STM32F4xx/FSMC_SRAM/.project
deleted file mode 100644
index 6acca1150..000000000
--- a/testhal/STM32/STM32F4xx/FSMC_SRAM/.project
+++ /dev/null
@@ -1,43 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<projectDescription>
-	<name>STM32F4xx-FSMC_SRAM</name>
-	<comment></comment>
-	<projects>
-	</projects>
-	<buildSpec>
-		<buildCommand>
-			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
-			<triggers>clean,full,incremental,</triggers>
-			<arguments>
-			</arguments>
-		</buildCommand>
-		<buildCommand>
-			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
-			<triggers>full,incremental,</triggers>
-			<arguments>
-			</arguments>
-		</buildCommand>
-	</buildSpec>
-	<natures>
-		<nature>org.eclipse.cdt.core.cnature</nature>
-		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
-		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
-	</natures>
-	<linkedResources>
-		<link>
-			<name>os</name>
-			<type>2</type>
-			<locationURI>CHIBIOS1/os</locationURI>
-		</link>
-	</linkedResources>
-	<variableList>
-		<variable>
-			<name>CHIBIOS</name>
-			<value>file:/home/barthess/projects/chibios-svn</value>
-		</variable>
-		<variable>
-			<name>CHIBIOS1</name>
-			<value>$%7BPARENT-4-PROJECT_LOC%7D</value>
-		</variable>
-	</variableList>
-</projectDescription>
diff --git a/testhal/STM32/STM32F4xx/FSMC_SRAM/Makefile b/testhal/STM32/STM32F4xx/FSMC_SRAM/Makefile
deleted file mode 100644
index e09fda5ad..000000000
--- a/testhal/STM32/STM32F4xx/FSMC_SRAM/Makefile
+++ /dev/null
@@ -1,206 +0,0 @@
-##############################################################################
-# Build global options
-# NOTE: Can be overridden externally.
-#
-
-# Compiler options here.
-ifeq ($(USE_OPT),)
-  USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
-endif
-
-# C specific options here (added to USE_OPT).
-ifeq ($(USE_COPT),)
-  USE_COPT = 
-endif
-
-# C++ specific options here (added to USE_OPT).
-ifeq ($(USE_CPPOPT),)
-  USE_CPPOPT = -fno-rtti
-endif
-
-# Enable this if you want the linker to remove unused code and data
-ifeq ($(USE_LINK_GC),)
-  USE_LINK_GC = yes
-endif
-
-# Linker extra options here.
-ifeq ($(USE_LDOPT),)
-  USE_LDOPT = 
-endif
-
-# Enable this if you want link time optimizations (LTO)
-ifeq ($(USE_LTO),)
-  USE_LTO = yes
-endif
-
-# If enabled, this option allows to compile the application in THUMB mode.
-ifeq ($(USE_THUMB),)
-  USE_THUMB = yes
-endif
-
-# Enable this if you want to see the full log while compiling.
-ifeq ($(USE_VERBOSE_COMPILE),)
-  USE_VERBOSE_COMPILE = no
-endif
-
-#
-# Build global options
-##############################################################################
-
-##############################################################################
-# Architecture or project specific options
-#
-
-# Stack size to be allocated to the Cortex-M process stack. This stack is
-# the stack used by the main() thread.
-ifeq ($(USE_PROCESS_STACKSIZE),)
-  USE_PROCESS_STACKSIZE = 0x400
-endif
-
-# Stack size to the allocated to the Cortex-M main/exceptions stack. This
-# stack is used for processing interrupts and exceptions.
-ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
-  USE_EXCEPTIONS_STACKSIZE = 0x400
-endif
-
-# Enables the use of FPU on Cortex-M4 (no, softfp, hard).
-ifeq ($(USE_FPU),)
-  USE_FPU = no
-endif
-
-#
-# Architecture or project specific options
-##############################################################################
-
-##############################################################################
-# Project, sources and paths
-#
-
-# Define project name here
-PROJECT = ch
-
-# Imported source files and paths
-CHIBIOS = ../../../..
-include $(CHIBIOS)/os/hal/hal.mk
-include $(CHIBIOS)/os/hal/boards/NONSTANDARD_STM32F4_BARTHESS2/board.mk
-include $(CHIBIOS)/os/hal/ports/STM32/STM32F4xx/platform.mk
-include $(CHIBIOS)/os/hal/osal/rt/osal.mk
-include $(CHIBIOS)/os/rt/rt.mk
-include $(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/mk/port_stm32f4xx.mk
-include $(CHIBIOS)/test/rt/test.mk
-
-
-# Define linker script file here
-LDSCRIPT= $(PORTLD)/STM32F407xG.ld
-
-# C sources that can be compiled in ARM or THUMB mode depending on the global
-# setting.
-CSRC = $(PORTSRC) \
-       $(KERNSRC) \
-       $(TESTSRC) \
-       $(HALSRC) \
-       $(PLATFORMSRC) \
-       $(BOARDSRC) \
-       $(CHIBIOS)/os/various/chprintf.c \
-       main.c
-
-# C++ sources that can be compiled in ARM or THUMB mode depending on the global
-# setting.
-CPPSRC =
-
-# C sources to be compiled in ARM mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-#       option that results in lower performance and larger code size.
-ACSRC =
-
-# C++ sources to be compiled in ARM mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-#       option that results in lower performance and larger code size.
-ACPPSRC =
-
-# C sources to be compiled in THUMB mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-#       option that results in lower performance and larger code size.
-TCSRC =
-
-# C sources to be compiled in THUMB mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-#       option that results in lower performance and larger code size.
-TCPPSRC =
-
-# List ASM source files here
-ASMSRC = $(PORTASM)
-
-INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
-         $(HALINC) $(OSALINC) $(PLATFORMINC) $(BOARDINC) \
-         $(CHIBIOS)/os/various
-
-
-#
-# Project, sources and paths
-##############################################################################
-
-##############################################################################
-# Compiler settings
-#
-
-MCU  = cortex-m4
-
-#TRGT = arm-elf-
-TRGT = arm-none-eabi-
-CC   = $(TRGT)gcc
-CPPC = $(TRGT)g++
-# Enable loading with g++ only if you need C++ runtime support.
-# NOTE: You can use C++ even without C++ support if you are careful. C++
-#       runtime support makes code size explode.
-LD   = $(TRGT)gcc
-#LD   = $(TRGT)g++
-CP   = $(TRGT)objcopy
-AS   = $(TRGT)gcc -x assembler-with-cpp
-AR   = $(TRGT)ar
-OD   = $(TRGT)objdump
-SZ   = $(TRGT)size
-HEX  = $(CP) -O ihex
-BIN  = $(CP) -O binary
-
-# ARM-specific options here
-AOPT =
-
-# THUMB-specific options here
-TOPT = -mthumb -DTHUMB
-
-# Define C warning options here
-CWARN = -Wall -Wextra -Wstrict-prototypes
-
-# Define C++ warning options here
-CPPWARN = -Wall -Wextra
-
-#
-# Compiler settings
-##############################################################################
-
-##############################################################################
-# Start of user section
-#
-
-# List all user C define here, like -D_DEBUG=1
-UDEFS =
-
-# Define ASM defines here
-UADEFS =
-
-# List all user directories here
-UINCDIR =
-
-# List the user directory to look for the libraries here
-ULIBDIR =
-
-# List all user libraries here
-ULIBS =
-
-#
-# End of user defines
-##############################################################################
-
-RULESPATH = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC
-include $(RULESPATH)/rules.mk
diff --git a/testhal/STM32/STM32F4xx/FSMC_SRAM/chconf.h b/testhal/STM32/STM32F4xx/FSMC_SRAM/chconf.h
deleted file mode 100644
index b9838301a..000000000
--- a/testhal/STM32/STM32F4xx/FSMC_SRAM/chconf.h
+++ /dev/null
@@ -1,498 +0,0 @@
-/*
-    ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-/**
- * @file    templates/chconf.h
- * @brief   Configuration file template.
- * @details A copy of this file must be placed in each project directory, it
- *          contains the application specific kernel settings.
- *
- * @addtogroup config
- * @details Kernel related settings and hooks.
- * @{
- */
-
-#ifndef _CHCONF_H_
-#define _CHCONF_H_
-
-/*===========================================================================*/
-/**
- * @name System timers settings
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   System time counter resolution.
- * @note    Allowed values are 16 or 32 bits.
- */
-#define CH_CFG_ST_RESOLUTION                32
-
-/**
- * @brief   System tick frequency.
- * @details Frequency of the system timer that drives the system ticks. This
- *          setting also defines the system tick time unit.
- */
-#define CH_CFG_ST_FREQUENCY                 10000
-
-/**
- * @brief   Time delta constant for the tick-less mode.
- * @note    If this value is zero then the system uses the classic
- *          periodic tick. This value represents the minimum number
- *          of ticks that is safe to specify in a timeout directive.
- *          The value one is not valid, timeouts are rounded up to
- *          this value.
- */
-#define CH_CFG_ST_TIMEDELTA                 2
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Kernel parameters and options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Round robin interval.
- * @details This constant is the number of system ticks allowed for the
- *          threads before preemption occurs. Setting this value to zero
- *          disables the preemption for threads with equal priority and the
- *          round robin becomes cooperative. Note that higher priority
- *          threads can still preempt, the kernel is always preemptive.
- * @note    Disabling the round robin preemption makes the kernel more compact
- *          and generally faster.
- * @note    The round robin preemption is not supported in tickless mode and
- *          must be set to zero in that case.
- */
-#define CH_CFG_TIME_QUANTUM                 0
-
-/**
- * @brief   Managed RAM size.
- * @details Size of the RAM area to be managed by the OS. If set to zero
- *          then the whole available RAM is used. The core memory is made
- *          available to the heap allocator and/or can be used directly through
- *          the simplified core memory allocator.
- *
- * @note    In order to let the OS manage the whole RAM the linker script must
- *          provide the @p __heap_base__ and @p __heap_end__ symbols.
- * @note    Requires @p CH_CFG_USE_MEMCORE.
- */
-#define CH_CFG_MEMCORE_SIZE                 0
-
-/**
- * @brief   Idle thread automatic spawn suppression.
- * @details When this option is activated the function @p chSysInit()
- *          does not spawn the idle thread. The application @p main()
- *          function becomes the idle thread and must implement an
- *          infinite loop. */
-#define CH_CFG_NO_IDLE_THREAD               FALSE
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Performance options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   OS optimization.
- * @details If enabled then time efficient rather than space efficient code
- *          is used when two possible implementations exist.
- *
- * @note    This is not related to the compiler optimization options.
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_OPTIMIZE_SPEED               TRUE
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Subsystem options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Time Measurement APIs.
- * @details If enabled then the time measurement APIs are included in
- *          the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_TM                       TRUE
-
-/**
- * @brief   Threads registry APIs.
- * @details If enabled then the registry APIs are included in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_REGISTRY                 TRUE
-
-/**
- * @brief   Threads synchronization APIs.
- * @details If enabled then the @p chThdWait() function is included in
- *          the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_WAITEXIT                 TRUE
-
-/**
- * @brief   Semaphores APIs.
- * @details If enabled then the Semaphores APIs are included in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_SEMAPHORES               TRUE
-
-/**
- * @brief   Semaphores queuing mode.
- * @details If enabled then the threads are enqueued on semaphores by
- *          priority rather than in FIFO order.
- *
- * @note    The default is @p FALSE. Enable this if you have special
- *          requirements.
- * @note    Requires @p CH_CFG_USE_SEMAPHORES.
- */
-#define CH_CFG_USE_SEMAPHORES_PRIORITY      FALSE
-
-/**
- * @brief   Mutexes APIs.
- * @details If enabled then the mutexes APIs are included in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_MUTEXES                  TRUE
-
-/**
- * @brief   Enables recursive behavior on mutexes.
- * @note    Recursive mutexes are heavier and have an increased
- *          memory footprint.
- *
- * @note    The default is @p FALSE.
- * @note    Requires @p CH_CFG_USE_MUTEXES.
- */
-#define CH_CFG_USE_MUTEXES_RECURSIVE        FALSE
-
-/**
- * @brief   Conditional Variables APIs.
- * @details If enabled then the conditional variables APIs are included
- *          in the kernel.
- *
- * @note    The default is @p TRUE.
- * @note    Requires @p CH_CFG_USE_MUTEXES.
- */
-#define CH_CFG_USE_CONDVARS                 TRUE
-
-/**
- * @brief   Conditional Variables APIs with timeout.
- * @details If enabled then the conditional variables APIs with timeout
- *          specification are included in the kernel.
- *
- * @note    The default is @p TRUE.
- * @note    Requires @p CH_CFG_USE_CONDVARS.
- */
-#define CH_CFG_USE_CONDVARS_TIMEOUT         TRUE
-
-/**
- * @brief   Events Flags APIs.
- * @details If enabled then the event flags APIs are included in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_EVENTS                   TRUE
-
-/**
- * @brief   Events Flags APIs with timeout.
- * @details If enabled then the events APIs with timeout specification
- *          are included in the kernel.
- *
- * @note    The default is @p TRUE.
- * @note    Requires @p CH_CFG_USE_EVENTS.
- */
-#define CH_CFG_USE_EVENTS_TIMEOUT           TRUE
-
-/**
- * @brief   Synchronous Messages APIs.
- * @details If enabled then the synchronous messages APIs are included
- *          in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_MESSAGES                 TRUE
-
-/**
- * @brief   Synchronous Messages queuing mode.
- * @details If enabled then messages are served by priority rather than in
- *          FIFO order.
- *
- * @note    The default is @p FALSE. Enable this if you have special
- *          requirements.
- * @note    Requires @p CH_CFG_USE_MESSAGES.
- */
-#define CH_CFG_USE_MESSAGES_PRIORITY        FALSE
-
-/**
- * @brief   Mailboxes APIs.
- * @details If enabled then the asynchronous messages (mailboxes) APIs are
- *          included in the kernel.
- *
- * @note    The default is @p TRUE.
- * @note    Requires @p CH_CFG_USE_SEMAPHORES.
- */
-#define CH_CFG_USE_MAILBOXES                TRUE
-
-/**
- * @brief   I/O Queues APIs.
- * @details If enabled then the I/O queues APIs are included in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_QUEUES                   TRUE
-
-/**
- * @brief   Core Memory Manager APIs.
- * @details If enabled then the core memory manager APIs are included
- *          in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_MEMCORE                  TRUE
-
-/**
- * @brief   Heap Allocator APIs.
- * @details If enabled then the memory heap allocator APIs are included
- *          in the kernel.
- *
- * @note    The default is @p TRUE.
- * @note    Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
- *          @p CH_CFG_USE_SEMAPHORES.
- * @note    Mutexes are recommended.
- */
-#define CH_CFG_USE_HEAP                     TRUE
-
-/**
- * @brief   Memory Pools Allocator APIs.
- * @details If enabled then the memory pools allocator APIs are included
- *          in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_MEMPOOLS                 TRUE
-
-/**
- * @brief   Dynamic Threads APIs.
- * @details If enabled then the dynamic threads creation APIs are included
- *          in the kernel.
- *
- * @note    The default is @p TRUE.
- * @note    Requires @p CH_CFG_USE_WAITEXIT.
- * @note    Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
- */
-#define CH_CFG_USE_DYNAMIC                  TRUE
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Debug options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Debug option, kernel statistics.
- *
- * @note    The default is @p FALSE.
- */
-#define CH_DBG_STATISTICS                   TRUE
-
-/**
- * @brief   Debug option, system state check.
- * @details If enabled the correct call protocol for system APIs is checked
- *          at runtime.
- *
- * @note    The default is @p FALSE.
- */
-#define CH_DBG_SYSTEM_STATE_CHECK           TRUE
-
-/**
- * @brief   Debug option, parameters checks.
- * @details If enabled then the checks on the API functions input
- *          parameters are activated.
- *
- * @note    The default is @p FALSE.
- */
-#define CH_DBG_ENABLE_CHECKS                TRUE
-
-/**
- * @brief   Debug option, consistency checks.
- * @details If enabled then all the assertions in the kernel code are
- *          activated. This includes consistency checks inside the kernel,
- *          runtime anomalies and port-defined checks.
- *
- * @note    The default is @p FALSE.
- */
-#define CH_DBG_ENABLE_ASSERTS               TRUE
-
-/**
- * @brief   Debug option, trace buffer.
- * @details If enabled then the context switch circular trace buffer is
- *          activated.
- *
- * @note    The default is @p FALSE.
- */
-#define CH_DBG_ENABLE_TRACE                 TRUE
-
-/**
- * @brief   Debug option, stack checks.
- * @details If enabled then a runtime stack check is performed.
- *
- * @note    The default is @p FALSE.
- * @note    The stack check is performed in a architecture/port dependent way.
- *          It may not be implemented or some ports.
- * @note    The default failure mode is to halt the system with the global
- *          @p panic_msg variable set to @p NULL.
- */
-#define CH_DBG_ENABLE_STACK_CHECK           TRUE
-
-/**
- * @brief   Debug option, stacks initialization.
- * @details If enabled then the threads working area is filled with a byte
- *          value when a thread is created. This can be useful for the
- *          runtime measurement of the used stack.
- *
- * @note    The default is @p FALSE.
- */
-#define CH_DBG_FILL_THREADS                 TRUE
-
-/**
- * @brief   Debug option, threads profiling.
- * @details If enabled then a field is added to the @p thread_t structure that
- *          counts the system ticks occurred while executing the thread.
- *
- * @note    The default is @p FALSE.
- * @note    This debug option is not currently compatible with the
- *          tickless mode.
- */
-#define CH_DBG_THREADS_PROFILING            FALSE
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Kernel hooks
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Threads descriptor structure extension.
- * @details User fields added to the end of the @p thread_t structure.
- */
-#define CH_CFG_THREAD_EXTRA_FIELDS                                          \
-  /* Add threads custom fields here.*/
-
-/**
- * @brief   Threads initialization hook.
- * @details User initialization code added to the @p chThdInit() API.
- *
- * @note    It is invoked from within @p chThdInit() and implicitly from all
- *          the threads creation APIs.
- */
-#define CH_CFG_THREAD_INIT_HOOK(tp) {                                       \
-  /* Add threads initialization code here.*/                                \
-}
-
-/**
- * @brief   Threads finalization hook.
- * @details User finalization code added to the @p chThdExit() API.
- *
- * @note    It is inserted into lock zone.
- * @note    It is also invoked when the threads simply return in order to
- *          terminate.
- */
-#define CH_CFG_THREAD_EXIT_HOOK(tp) {                                       \
-  /* Add threads finalization code here.*/                                  \
-}
-
-/**
- * @brief   Context switch hook.
- * @details This hook is invoked just before switching between threads.
- */
-#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) {                              \
-  /* System halt code here.*/                                               \
-}
-
-/**
- * @brief   Idle thread enter hook.
- * @note    This hook is invoked within a critical zone, no OS functions
- *          should be invoked from here.
- * @note    This macro can be used to activate a power saving mode.
- */
-#define CH_CFG_IDLE_ENTER_HOOK() {                                         \
-}
-
-/**
- * @brief   Idle thread leave hook.
- * @note    This hook is invoked within a critical zone, no OS functions
- *          should be invoked from here.
- * @note    This macro can be used to deactivate a power saving mode.
- */
-#define CH_CFG_IDLE_LEAVE_HOOK() {                                         \
-}
-
-/**
- * @brief   Idle Loop hook.
- * @details This hook is continuously invoked by the idle thread loop.
- */
-#define CH_CFG_IDLE_LOOP_HOOK() {                                           \
-  /* Idle loop code here.*/                                                 \
-}
-
-/**
- * @brief   System tick event hook.
- * @details This hook is invoked in the system tick handler immediately
- *          after processing the virtual timers queue.
- */
-#define CH_CFG_SYSTEM_TICK_HOOK() {                                         \
-  /* System tick event code here.*/                                         \
-}
-
-/**
- * @brief   System halt hook.
- * @details This hook is invoked in case to a system halting error before
- *          the system is halted.
- */
-#define CH_CFG_SYSTEM_HALT_HOOK(reason) {                                   \
-  /* System halt code here.*/                                               \
-}
-
-/** @} */
-
-/*===========================================================================*/
-/* Port-specific settings (override port settings defaulted in chcore.h).    */
-/*===========================================================================*/
-
-#endif  /* _CHCONF_H_ */
-
-/** @} */
diff --git a/testhal/STM32/STM32F4xx/FSMC_SRAM/halconf.h b/testhal/STM32/STM32F4xx/FSMC_SRAM/halconf.h
deleted file mode 100644
index aa413e0b4..000000000
--- a/testhal/STM32/STM32F4xx/FSMC_SRAM/halconf.h
+++ /dev/null
@@ -1,339 +0,0 @@
-/*
-    ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-/**
- * @file    templates/halconf.h
- * @brief   HAL configuration header.
- * @details HAL configuration file, this file allows to enable or disable the
- *          various device drivers from your application. You may also use
- *          this file in order to override the device drivers default settings.
- *
- * @addtogroup HAL_CONF
- * @{
- */
-
-#ifndef _HALCONF_H_
-#define _HALCONF_H_
-
-#include "mcuconf.h"
-
-/**
- * @brief   Enables the PAL subsystem.
- */
-#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
-#define HAL_USE_PAL                 TRUE
-#endif
-
-/**
- * @brief   Enables the ADC subsystem.
- */
-#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
-#define HAL_USE_ADC                 TRUE
-#endif
-
-/**
- * @brief   Enables the CAN subsystem.
- */
-#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
-#define HAL_USE_CAN                 FALSE
-#endif
-
-/**
- * @brief   Enables the EXT subsystem.
- */
-#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
-#define HAL_USE_EXT                 TRUE
-#endif
-
-/**
- * @brief   Enables the GPT subsystem.
- */
-#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
-#define HAL_USE_GPT                 FALSE
-#endif
-
-/**
- * @brief   Enables the I2C subsystem.
- */
-#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
-#define HAL_USE_I2C                 FALSE
-#endif
-
-/**
- * @brief   Enables the I2S subsystem.
- */
-#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
-#define HAL_USE_I2S                 FALSE
-#endif
-
-/**
- * @brief   Enables the ICU subsystem.
- */
-#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
-#define HAL_USE_ICU                 FALSE
-#endif
-
-/**
- * @brief   Enables the MAC subsystem.
- */
-#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
-#define HAL_USE_MAC                 FALSE
-#endif
-
-/**
- * @brief   Enables the MMC_SPI subsystem.
- */
-#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
-#define HAL_USE_MMC_SPI             FALSE
-#endif
-
-/**
- * @brief   Enables the PWM subsystem.
- */
-#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
-#define HAL_USE_PWM                 FALSE
-#endif
-
-/**
- * @brief   Enables the RTC subsystem.
- */
-#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
-#define HAL_USE_RTC                 FALSE
-#endif
-
-/**
- * @brief   Enables the SDC subsystem.
- */
-#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
-#define HAL_USE_SDC                 FALSE
-#endif
-
-/**
- * @brief   Enables the SERIAL subsystem.
- */
-#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
-#define HAL_USE_SERIAL              FALSE
-#endif
-
-/**
- * @brief   Enables the SERIAL over USB subsystem.
- */
-#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
-#define HAL_USE_SERIAL_USB          FALSE
-#endif
-
-/**
- * @brief   Enables the SPI subsystem.
- */
-#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
-#define HAL_USE_SPI                 TRUE
-#endif
-
-/**
- * @brief   Enables the UART subsystem.
- */
-#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
-#define HAL_USE_UART                TRUE
-#endif
-
-/**
- * @brief   Enables the USB subsystem.
- */
-#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
-#define HAL_USE_USB                 FALSE
-#endif
-
-/**
- * @brief   Enables the NAND subsystem.
- */
-#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__)
-#define HAL_USE_NAND                FALSE
-#endif
-
-/*===========================================================================*/
-/* ADC driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables synchronous APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
-#define ADC_USE_WAIT                TRUE
-#endif
-
-/**
- * @brief   Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define ADC_USE_MUTUAL_EXCLUSION    TRUE
-#endif
-
-/*===========================================================================*/
-/* CAN driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Sleep mode related APIs inclusion switch.
- */
-#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
-#define CAN_USE_SLEEP_MODE          TRUE
-#endif
-
-/*===========================================================================*/
-/* I2C driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables the mutual exclusion APIs on the I2C bus.
- */
-#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define I2C_USE_MUTUAL_EXCLUSION    TRUE
-#endif
-
-/*===========================================================================*/
-/* MAC driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables an event sources for incoming packets.
- */
-#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
-#define MAC_USE_ZERO_COPY           FALSE
-#endif
-
-/**
- * @brief   Enables an event sources for incoming packets.
- */
-#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
-#define MAC_USE_EVENTS              TRUE
-#endif
-
-/*===========================================================================*/
-/* MMC_SPI driver related settings.                                          */
-/*===========================================================================*/
-
-/**
- * @brief   Delays insertions.
- * @details If enabled this options inserts delays into the MMC waiting
- *          routines releasing some extra CPU time for the threads with
- *          lower priority, this may slow down the driver a bit however.
- *          This option is recommended also if the SPI driver does not
- *          use a DMA channel and heavily loads the CPU.
- */
-#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
-#define MMC_NICE_WAITING            TRUE
-#endif
-
-/*===========================================================================*/
-/* SDC driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Number of initialization attempts before rejecting the card.
- * @note    Attempts are performed at 10mS intervals.
- */
-#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
-#define SDC_INIT_RETRY              100
-#endif
-
-/**
- * @brief   Include support for MMC cards.
- * @note    MMC support is not yet implemented so this option must be kept
- *          at @p FALSE.
- */
-#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
-#define SDC_MMC_SUPPORT             FALSE
-#endif
-
-/**
- * @brief   Delays insertions.
- * @details If enabled this options inserts delays into the MMC waiting
- *          routines releasing some extra CPU time for the threads with
- *          lower priority, this may slow down the driver a bit however.
- */
-#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
-#define SDC_NICE_WAITING            TRUE
-#endif
-
-/*===========================================================================*/
-/* SERIAL driver related settings.                                           */
-/*===========================================================================*/
-
-/**
- * @brief   Default bit rate.
- * @details Configuration parameter, this is the baud rate selected for the
- *          default configuration.
- */
-#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
-#define SERIAL_DEFAULT_BITRATE      38400
-#endif
-
-/**
- * @brief   Serial buffers size.
- * @details Configuration parameter, you can change the depth of the queue
- *          buffers depending on the requirements of your application.
- * @note    The default is 64 bytes for both the transmission and receive
- *          buffers.
- */
-#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
-#define SERIAL_BUFFERS_SIZE         16
-#endif
-
-/*===========================================================================*/
-/* SPI driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables synchronous APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
-#define SPI_USE_WAIT                TRUE
-#endif
-
-/**
- * @brief   Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define SPI_USE_MUTUAL_EXCLUSION    TRUE
-#endif
-
-/*===========================================================================*/
-/* EMCNAND driver related settings.                                          */
-/*===========================================================================*/
-
-/**
- * @brief   Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define NAND_USE_MUTUAL_EXCLUSION    TRUE
-#endif
-
-/**
- * @brief   Enables internal driver map for bad blocks.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(NAND_USE_BAD_MAP) || defined(__DOXYGEN__)
-#define NAND_USE_BAD_MAP             TRUE
-#endif
-
-#endif /* _HALCONF_H_ */
-
-/** @} */
diff --git a/testhal/STM32/STM32F4xx/FSMC_SRAM/main.c b/testhal/STM32/STM32F4xx/FSMC_SRAM/main.c
deleted file mode 100644
index ba5c28d89..000000000
--- a/testhal/STM32/STM32F4xx/FSMC_SRAM/main.c
+++ /dev/null
@@ -1,171 +0,0 @@
-/*
-    ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-/*
-   Concepts and parts of this file have been contributed by Uladzimir Pylinsky
-   aka barthess.
- */
-
-/*
-TODO:
-write memtest function using ideas from http://www.memtest86.com/technical.htm
-*/
-
-#include "ch.h"
-#include "hal.h"
-
-#include "string.h"
-
-#include "fsmc_sram.h"
-
-/*
- ******************************************************************************
- * DEFINES
- ******************************************************************************
- */
-#define USE_INFINITE_MEMTEST        FALSE
-
-/*
- ******************************************************************************
- * EXTERNS
- ******************************************************************************
- */
-
-/*
- ******************************************************************************
- * PROTOTYPES
- ******************************************************************************
- */
-
-/*
- ******************************************************************************
- * GLOBAL VARIABLES
- ******************************************************************************
- */
-static uint32_t sram_check_buf[16 * 1024];
-static uint32_t *sram_start = (uint32_t *)FSMC_Bank1_4_MAP;
-static const size_t sram_size = 524288;
-
-/*
- * SRAM driver configuration structure.
- */
-static const SRAMConfig sram_cfg = {
-    .btr = 2 << 8
-};
-
-/* benchmarking results in MiB/S */
-double memset_speed_ext;
-double memset_speed_int;
-double memcpy_speed_ext2int;
-double memcpy_speed_int2ext;
-
-/*
- ******************************************************************************
- ******************************************************************************
- * LOCAL FUNCTIONS
- ******************************************************************************
- ******************************************************************************
- */
-/**
- *
- */
-static void sram_benchmark(void){
-
-  size_t i=0;
-  time_measurement_t mem_tmu;
-
-  /* memset speed ext */
-  chTMObjectInit(&mem_tmu);
-  chTMStartMeasurementX(&mem_tmu);
-  memset(sram_start, 0x55, sram_size);
-  memset(sram_start, 0x00, sram_size);
-  chTMStopMeasurementX(&mem_tmu);
-  memset_speed_ext = 1 / (mem_tmu.cumulative / (double)STM32_SYSCLK);
-
-  /* memset speed int */
-  chTMObjectInit(&mem_tmu);
-  chTMStartMeasurementX(&mem_tmu);
-  for (i=0; i<16; i++)
-    memset(sram_check_buf, i, sizeof(sram_check_buf));
-  chTMStopMeasurementX(&mem_tmu);
-  memset_speed_int = 1 / (mem_tmu.cumulative / (double)STM32_SYSCLK);
-
-  /* memcpy ext2int */
-  chTMObjectInit(&mem_tmu);
-  chTMStartMeasurementX(&mem_tmu);
-  for (i=0; i<16; i++)
-    memcpy(sram_check_buf, sram_start+ i * sizeof(sram_check_buf), sizeof(sram_check_buf));
-  chTMStopMeasurementX(&mem_tmu);
-  memcpy_speed_ext2int = 1 / (mem_tmu.cumulative / (double)STM32_SYSCLK);
-
-  /* memcpy int2ext */
-  chTMObjectInit(&mem_tmu);
-  memset(sram_check_buf, 0xAA, sizeof(sram_check_buf));
-  chTMStartMeasurementX(&mem_tmu);
-  for (i=0; i<16; i++)
-    memcpy(sram_start + i * sizeof(sram_check_buf), sram_check_buf, sizeof(sram_check_buf));
-  chTMStopMeasurementX(&mem_tmu);
-  memcpy_speed_int2ext = 1 / (mem_tmu.cumulative / (double)STM32_SYSCLK);
-}
-
-/**
- *
- */
-#if USE_INFINITE_MEMTEST
-static void memstest(void){
-  while (true) {
-    ;
-  }
-}
-#endif /* USE_INFINITE_MEMTEST */
-
-/*
- ******************************************************************************
- * EXPORTED FUNCTIONS
- ******************************************************************************
- */
-
-/*
- * Application entry point.
- */
-int main(void) {
-
-  /*
-   * System initializations.
-   * - HAL initialization, this also initializes the configured device drivers
-   *   and performs the board-specific initializations.
-   * - Kernel initialization, the main() function becomes a thread and the
-   *   RTOS is active.
-   */
-  halInit();
-  chSysInit();
-
-  fsmcSramInit();
-  fsmcSramStart(&SRAMD4, &sram_cfg);
-  sram_benchmark();
-
-#if USE_INFINITE_MEMTEST
-  memtest();
-#endif
-
-  /*
-   * Normal main() thread activity, in this demo it does nothing.
-   */
-  while (TRUE) {
-    chThdSleepMilliseconds(500);
-  }
-}
-
-
diff --git a/testhal/STM32/STM32F4xx/FSMC_SRAM/mcuconf.h b/testhal/STM32/STM32F4xx/FSMC_SRAM/mcuconf.h
deleted file mode 100644
index e9ac951e9..000000000
--- a/testhal/STM32/STM32F4xx/FSMC_SRAM/mcuconf.h
+++ /dev/null
@@ -1,326 +0,0 @@
-/*
-    ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-/*
- * STM32F4xx drivers configuration.
- * The following settings override the default settings present in
- * the various device driver implementation headers.
- * Note that the settings for each driver only have effect if the whole
- * driver is enabled in halconf.h.
- *
- * IRQ priorities:
- * 15...0       Lowest...Highest.
- *
- * DMA priorities:
- * 0...3        Lowest...Highest.
- */
-
-#define STM32F4xx_MCUCONF
-
-/*
- * HAL driver system settings.
- */
-#define STM32_NO_INIT                       FALSE
-#define STM32_HSI_ENABLED                   TRUE
-#define STM32_LSI_ENABLED                   TRUE
-#define STM32_HSE_ENABLED                   TRUE
-#define STM32_LSE_ENABLED                   FALSE
-#define STM32_CLOCK48_REQUIRED              TRUE
-#define STM32_SW                            STM32_SW_PLL
-#define STM32_PLLSRC                        STM32_PLLSRC_HSE
-#define STM32_PLLM_VALUE                    12
-#define STM32_PLLN_VALUE                    336
-#define STM32_PLLP_VALUE                    2
-#define STM32_PLLQ_VALUE                    7
-#define STM32_HPRE                          STM32_HPRE_DIV1
-#define STM32_PPRE1                         STM32_PPRE1_DIV4
-#define STM32_PPRE2                         STM32_PPRE2_DIV2
-#define STM32_RTCSEL                        STM32_RTCSEL_LSI
-#define STM32_RTCPRE_VALUE                  8
-#define STM32_MCO1SEL                       STM32_MCO1SEL_HSI
-#define STM32_MCO1PRE                       STM32_MCO1PRE_DIV1
-#define STM32_MCO2SEL                       STM32_MCO2SEL_SYSCLK
-#define STM32_MCO2PRE                       STM32_MCO2PRE_DIV5
-#define STM32_I2SSRC                        STM32_I2SSRC_CKIN
-#define STM32_PLLI2SN_VALUE                 192
-#define STM32_PLLI2SR_VALUE                 5
-#define STM32_PVD_ENABLE                    FALSE
-#define STM32_PLS                           STM32_PLS_LEV0
-#define STM32_BKPRAM_ENABLE                 FALSE
-
-/*
- * ADC driver system settings.
- */
-#define STM32_ADC_ADCPRE                    ADC_CCR_ADCPRE_DIV4
-#define STM32_ADC_USE_ADC1                  TRUE
-#define STM32_ADC_USE_ADC2                  FALSE
-#define STM32_ADC_USE_ADC3                  FALSE
-#define STM32_ADC_ADC1_DMA_STREAM           STM32_DMA_STREAM_ID(2, 4)
-#define STM32_ADC_ADC2_DMA_STREAM           STM32_DMA_STREAM_ID(2, 2)
-#define STM32_ADC_ADC3_DMA_STREAM           STM32_DMA_STREAM_ID(2, 1)
-#define STM32_ADC_ADC1_DMA_PRIORITY         3
-#define STM32_ADC_ADC2_DMA_PRIORITY         2
-#define STM32_ADC_ADC3_DMA_PRIORITY         2
-#define STM32_ADC_IRQ_PRIORITY              6
-#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     6
-#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     6
-#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     6
-
-/*
- * CAN driver system settings.
- */
-#define STM32_CAN_USE_CAN1                  FALSE
-#define STM32_CAN_USE_CAN2                  FALSE
-#define STM32_CAN_CAN1_IRQ_PRIORITY         11
-#define STM32_CAN_CAN2_IRQ_PRIORITY         11
-
-/*
- * EXT driver system settings.
- */
-#define STM32_EXT_EXTI0_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI1_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI2_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI3_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI4_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI5_9_IRQ_PRIORITY      6
-#define STM32_EXT_EXTI10_15_IRQ_PRIORITY    6
-#define STM32_EXT_EXTI16_IRQ_PRIORITY       6
-#define STM32_EXT_EXTI17_IRQ_PRIORITY       15
-#define STM32_EXT_EXTI18_IRQ_PRIORITY       6
-#define STM32_EXT_EXTI19_IRQ_PRIORITY       6
-#define STM32_EXT_EXTI20_IRQ_PRIORITY       6
-#define STM32_EXT_EXTI21_IRQ_PRIORITY       15
-#define STM32_EXT_EXTI22_IRQ_PRIORITY       15
-
-/*
- * GPT driver system settings.
- */
-#define STM32_GPT_USE_TIM1                  FALSE
-#define STM32_GPT_USE_TIM2                  FALSE
-#define STM32_GPT_USE_TIM3                  FALSE
-#define STM32_GPT_USE_TIM4                  FALSE
-#define STM32_GPT_USE_TIM5                  FALSE
-#define STM32_GPT_USE_TIM6                  FALSE
-#define STM32_GPT_USE_TIM7                  FALSE
-#define STM32_GPT_USE_TIM8                  FALSE
-#define STM32_GPT_USE_TIM9                  FALSE
-#define STM32_GPT_USE_TIM11                 FALSE
-#define STM32_GPT_USE_TIM12                 FALSE
-#define STM32_GPT_USE_TIM14                 FALSE
-#define STM32_GPT_TIM1_IRQ_PRIORITY         7
-#define STM32_GPT_TIM2_IRQ_PRIORITY         7
-#define STM32_GPT_TIM3_IRQ_PRIORITY         7
-#define STM32_GPT_TIM4_IRQ_PRIORITY         7
-#define STM32_GPT_TIM5_IRQ_PRIORITY         7
-#define STM32_GPT_TIM6_IRQ_PRIORITY         7
-#define STM32_GPT_TIM7_IRQ_PRIORITY         7
-#define STM32_GPT_TIM8_IRQ_PRIORITY         7
-#define STM32_GPT_TIM9_IRQ_PRIORITY         7
-#define STM32_GPT_TIM11_IRQ_PRIORITY        7
-#define STM32_GPT_TIM12_IRQ_PRIORITY        7
-#define STM32_GPT_TIM14_IRQ_PRIORITY        7
-
-/*
- * I2C driver system settings.
- */
-#define STM32_I2C_USE_I2C1                  FALSE
-#define STM32_I2C_USE_I2C2                  FALSE
-#define STM32_I2C_USE_I2C3                  FALSE
-#define STM32_I2C_BUSY_TIMEOUT              50
-#define STM32_I2C_I2C1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 0)
-#define STM32_I2C_I2C1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 6)
-#define STM32_I2C_I2C2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)
-#define STM32_I2C_I2C2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)
-#define STM32_I2C_I2C3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)
-#define STM32_I2C_I2C3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)
-#define STM32_I2C_I2C1_IRQ_PRIORITY         5
-#define STM32_I2C_I2C2_IRQ_PRIORITY         5
-#define STM32_I2C_I2C3_IRQ_PRIORITY         5
-#define STM32_I2C_I2C1_DMA_PRIORITY         3
-#define STM32_I2C_I2C2_DMA_PRIORITY         3
-#define STM32_I2C_I2C3_DMA_PRIORITY         3
-#define STM32_I2C_DMA_ERROR_HOOK(i2cp)      osalSysHalt("DMA failure")
-
-/*
- * ICU driver system settings.
- */
-#define STM32_ICU_USE_TIM1                  FALSE
-#define STM32_ICU_USE_TIM2                  FALSE
-#define STM32_ICU_USE_TIM3                  FALSE
-#define STM32_ICU_USE_TIM4                  FALSE
-#define STM32_ICU_USE_TIM5                  FALSE
-#define STM32_ICU_USE_TIM8                  FALSE
-#define STM32_ICU_USE_TIM9                  FALSE
-#define STM32_ICU_TIM1_IRQ_PRIORITY         7
-#define STM32_ICU_TIM2_IRQ_PRIORITY         7
-#define STM32_ICU_TIM3_IRQ_PRIORITY         7
-#define STM32_ICU_TIM4_IRQ_PRIORITY         7
-#define STM32_ICU_TIM5_IRQ_PRIORITY         7
-#define STM32_ICU_TIM8_IRQ_PRIORITY         7
-#define STM32_ICU_TIM9_IRQ_PRIORITY         7
-
-/*
- * MAC driver system settings.
- */
-#define STM32_MAC_TRANSMIT_BUFFERS          2
-#define STM32_MAC_RECEIVE_BUFFERS           4
-#define STM32_MAC_BUFFERS_SIZE              1522
-#define STM32_MAC_PHY_TIMEOUT               100
-#define STM32_MAC_ETH1_CHANGE_PHY_STATE     TRUE
-#define STM32_MAC_ETH1_IRQ_PRIORITY         13
-#define STM32_MAC_IP_CHECKSUM_OFFLOAD       0
-
-/*
- * PWM driver system settings.
- */
-#define STM32_PWM_USE_ADVANCED              FALSE
-#define STM32_PWM_USE_TIM1                  FALSE
-#define STM32_PWM_USE_TIM2                  FALSE
-#define STM32_PWM_USE_TIM3                  FALSE
-#define STM32_PWM_USE_TIM4                  FALSE
-#define STM32_PWM_USE_TIM5                  FALSE
-#define STM32_PWM_USE_TIM8                  FALSE
-#define STM32_PWM_USE_TIM9                  FALSE
-#define STM32_PWM_TIM1_IRQ_PRIORITY         7
-#define STM32_PWM_TIM2_IRQ_PRIORITY         7
-#define STM32_PWM_TIM3_IRQ_PRIORITY         7
-#define STM32_PWM_TIM4_IRQ_PRIORITY         7
-#define STM32_PWM_TIM5_IRQ_PRIORITY         7
-#define STM32_PWM_TIM8_IRQ_PRIORITY         7
-#define STM32_PWM_TIM9_IRQ_PRIORITY         7
-
-/*
- * SDC driver system settings.
- */
-#define STM32_SDC_SDIO_DMA_PRIORITY         3
-#define STM32_SDC_SDIO_IRQ_PRIORITY         9
-#define STM32_SDC_WRITE_TIMEOUT_MS          250
-#define STM32_SDC_READ_TIMEOUT_MS           25
-#define STM32_SDC_CLOCK_ACTIVATION_DELAY    10
-#define STM32_SDC_SDIO_UNALIGNED_SUPPORT    TRUE
-#define STM32_SDC_SDIO_DMA_STREAM           STM32_DMA_STREAM_ID(2, 3)
-
-/*
- * SERIAL driver system settings.
- */
-#define STM32_SERIAL_USE_USART1             FALSE
-#define STM32_SERIAL_USE_USART2             FALSE
-#define STM32_SERIAL_USE_USART3             FALSE
-#define STM32_SERIAL_USE_UART4              FALSE
-#define STM32_SERIAL_USE_UART5              FALSE
-#define STM32_SERIAL_USE_USART6             FALSE
-#define STM32_SERIAL_USART1_PRIORITY        12
-#define STM32_SERIAL_USART2_PRIORITY        12
-#define STM32_SERIAL_USART3_PRIORITY        12
-#define STM32_SERIAL_UART4_PRIORITY         12
-#define STM32_SERIAL_UART5_PRIORITY         12
-#define STM32_SERIAL_USART6_PRIORITY        12
-
-/*
- * SPI driver system settings.
- */
-#define STM32_SPI_USE_SPI1                  TRUE
-#define STM32_SPI_USE_SPI2                  FALSE
-#define STM32_SPI_USE_SPI3                  FALSE
-#define STM32_SPI_SPI1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(2, 0)
-#define STM32_SPI_SPI1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(2, 3)
-#define STM32_SPI_SPI2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 3)
-#define STM32_SPI_SPI2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)
-#define STM32_SPI_SPI3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 0)
-#define STM32_SPI_SPI3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)
-#define STM32_SPI_SPI1_DMA_PRIORITY         1
-#define STM32_SPI_SPI2_DMA_PRIORITY         1
-#define STM32_SPI_SPI3_DMA_PRIORITY         1
-#define STM32_SPI_SPI1_IRQ_PRIORITY         10
-#define STM32_SPI_SPI2_IRQ_PRIORITY         10
-#define STM32_SPI_SPI3_IRQ_PRIORITY         10
-#define STM32_SPI_DMA_ERROR_HOOK(spip)      osalSysHalt("DMA failure")
-
-/*
- * ST driver system settings.
- */
-#define STM32_ST_IRQ_PRIORITY               8
-#define STM32_ST_USE_TIMER                  2
-
-/*
- * UART driver system settings.
- */
-#define STM32_UART_USE_USART1               FALSE
-#define STM32_UART_USE_USART2               FALSE
-#define STM32_UART_USE_USART3               FALSE
-#define STM32_UART_USE_UART4                FALSE
-#define STM32_UART_USE_UART5                FALSE
-#define STM32_UART_USE_USART6               TRUE
-#define STM32_UART_USART1_RX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 5)
-#define STM32_UART_USART1_TX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 7)
-#define STM32_UART_USART2_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 5)
-#define STM32_UART_USART2_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 6)
-#define STM32_UART_USART3_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 1)
-#define STM32_UART_USART3_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 3)
-#define STM32_UART_UART4_RX_DMA_STREAM      STM32_DMA_STREAM_ID(1, 2)
-#define STM32_UART_UART4_TX_DMA_STREAM      STM32_DMA_STREAM_ID(1, 4)
-#define STM32_UART_UART5_RX_DMA_STREAM      STM32_DMA_STREAM_ID(1, 0)
-#define STM32_UART_UART5_TX_DMA_STREAM      STM32_DMA_STREAM_ID(1, 7)
-#define STM32_UART_USART6_RX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 1)
-#define STM32_UART_USART6_TX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 6)
-#define STM32_UART_USART1_IRQ_PRIORITY      12
-#define STM32_UART_USART2_IRQ_PRIORITY      12
-#define STM32_UART_USART3_IRQ_PRIORITY      12
-#define STM32_UART_UART4_IRQ_PRIORITY       12
-#define STM32_UART_UART5_IRQ_PRIORITY       12
-#define STM32_UART_USART6_IRQ_PRIORITY      6
-#define STM32_UART_USART1_DMA_PRIORITY      0
-#define STM32_UART_USART2_DMA_PRIORITY      0
-#define STM32_UART_USART3_DMA_PRIORITY      0
-#define STM32_UART_UART4_DMA_PRIORITY       0
-#define STM32_UART_UART5_DMA_PRIORITY       0
-#define STM32_UART_USART6_DMA_PRIORITY      2
-#define STM32_UART_DMA_ERROR_HOOK(uartp)    osalSysHalt("DMA failure")
-
-/*
- * USB driver system settings.
- */
-#define STM32_USB_USE_OTG1                  FALSE
-#define STM32_USB_USE_OTG2                  FALSE
-#define STM32_USB_OTG1_IRQ_PRIORITY         14
-#define STM32_USB_OTG2_IRQ_PRIORITY         14
-#define STM32_USB_OTG1_RX_FIFO_SIZE         512
-#define STM32_USB_OTG2_RX_FIFO_SIZE         1024
-#define STM32_USB_OTG_THREAD_PRIO           LOWPRIO
-#define STM32_USB_OTG_THREAD_STACK_SIZE     128
-#define STM32_USB_OTGFIFO_FILL_BASEPRI      0
-
-/*
- * FSMC driver system settings.
- */
-#define STM32_FSMC_USE_FSMC1                TRUE
-#define STM32_FSMC_FSMC1_IRQ_PRIORITY       10
-
-/*
- * FSMC NAND driver system settings.
- */
-#define STM32_NAND_USE_FSMC_NAND1           FALSE
-#define STM32_NAND_USE_EXT_INT              FALSE
-#define STM32_NAND_DMA_STREAM               STM32_DMA_STREAM_ID(2, 7)
-#define STM32_NAND_DMA_PRIORITY             0
-#define STM32_NAND_DMA_ERROR_HOOK(nandp)    osalSysHalt("DMA failure")
-
-/*
- * FSMC SRAM driver system settings.
- */
-#define STM32_USE_FSMC_SRAM                 TRUE
-#define STM32_SRAM_USE_FSMC_SRAM4           TRUE
-