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authorGiovanni Di Sirio <gdisirio@gmail.com>2018-01-20 15:28:42 +0000
committerGiovanni Di Sirio <gdisirio@gmail.com>2018-01-20 15:28:42 +0000
commit970dcc969270c5824e25afba22a4d4fbf533ded2 (patch)
tree27fd915f67ca332d8691378cb046797b50a606bc /testhal/STM32
parent12a26788a96ed55a9cbc18631f999ba9588805b8 (diff)
downloadChibiOS-970dcc969270c5824e25afba22a4d4fbf533ded2.tar.gz
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Removed several CORTEX_VTOR_INIT leftovers.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11369 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'testhal/STM32')
-rw-r--r--testhal/STM32/STM32F7xx/GPT-ADC/chconf.h2
-rw-r--r--testhal/STM32/STM32F7xx/IRQ_STORM/chconf.h2
-rw-r--r--testhal/STM32/STM32F7xx/PWM-ICU/chconf.h2
-rw-r--r--testhal/STM32/STM32F7xx/SPI/chconf.h2
-rw-r--r--testhal/STM32/STM32F7xx/USB_RAW/chconf.h2
5 files changed, 0 insertions, 10 deletions
diff --git a/testhal/STM32/STM32F7xx/GPT-ADC/chconf.h b/testhal/STM32/STM32F7xx/GPT-ADC/chconf.h
index 1e978b9d1..184320861 100644
--- a/testhal/STM32/STM32F7xx/GPT-ADC/chconf.h
+++ b/testhal/STM32/STM32F7xx/GPT-ADC/chconf.h
@@ -603,8 +603,6 @@
/* Port-specific settings (override port settings defaulted in chcore.h). */
/*===========================================================================*/
-#define CORTEX_VTOR_INIT 0x00200000U
-
#endif /* CHCONF_H */
/** @} */
diff --git a/testhal/STM32/STM32F7xx/IRQ_STORM/chconf.h b/testhal/STM32/STM32F7xx/IRQ_STORM/chconf.h
index 1e978b9d1..184320861 100644
--- a/testhal/STM32/STM32F7xx/IRQ_STORM/chconf.h
+++ b/testhal/STM32/STM32F7xx/IRQ_STORM/chconf.h
@@ -603,8 +603,6 @@
/* Port-specific settings (override port settings defaulted in chcore.h). */
/*===========================================================================*/
-#define CORTEX_VTOR_INIT 0x00200000U
-
#endif /* CHCONF_H */
/** @} */
diff --git a/testhal/STM32/STM32F7xx/PWM-ICU/chconf.h b/testhal/STM32/STM32F7xx/PWM-ICU/chconf.h
index 1e978b9d1..184320861 100644
--- a/testhal/STM32/STM32F7xx/PWM-ICU/chconf.h
+++ b/testhal/STM32/STM32F7xx/PWM-ICU/chconf.h
@@ -603,8 +603,6 @@
/* Port-specific settings (override port settings defaulted in chcore.h). */
/*===========================================================================*/
-#define CORTEX_VTOR_INIT 0x00200000U
-
#endif /* CHCONF_H */
/** @} */
diff --git a/testhal/STM32/STM32F7xx/SPI/chconf.h b/testhal/STM32/STM32F7xx/SPI/chconf.h
index 1e978b9d1..184320861 100644
--- a/testhal/STM32/STM32F7xx/SPI/chconf.h
+++ b/testhal/STM32/STM32F7xx/SPI/chconf.h
@@ -603,8 +603,6 @@
/* Port-specific settings (override port settings defaulted in chcore.h). */
/*===========================================================================*/
-#define CORTEX_VTOR_INIT 0x00200000U
-
#endif /* CHCONF_H */
/** @} */
diff --git a/testhal/STM32/STM32F7xx/USB_RAW/chconf.h b/testhal/STM32/STM32F7xx/USB_RAW/chconf.h
index 1e978b9d1..184320861 100644
--- a/testhal/STM32/STM32F7xx/USB_RAW/chconf.h
+++ b/testhal/STM32/STM32F7xx/USB_RAW/chconf.h
@@ -603,8 +603,6 @@
/* Port-specific settings (override port settings defaulted in chcore.h). */
/*===========================================================================*/
-#define CORTEX_VTOR_INIT 0x00200000U
-
#endif /* CHCONF_H */
/** @} */