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| author | Rocco Marco Guglielmi <roccomarco.guglielmi@live.com> | 2016-05-30 20:52:54 +0000 |
|---|---|---|
| committer | Rocco Marco Guglielmi <roccomarco.guglielmi@live.com> | 2016-05-30 20:52:54 +0000 |
| commit | 7d67b3574a47d3df886056185fdc0370f647c473 (patch) | |
| tree | 91f3f03172103d7f3c19e7cbcbcc1d23aed8c189 /testhal/STM32 | |
| parent | 1c909fee7f266f2cad2243e4f404c972acfa4445 (diff) | |
| download | ChibiOS-7d67b3574a47d3df886056185fdc0370f647c473.tar.gz ChibiOS-7d67b3574a47d3df886056185fdc0370f647c473.tar.bz2 ChibiOS-7d67b3574a47d3df886056185fdc0370f647c473.zip | |
Fixed Bug #747
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9539 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'testhal/STM32')
| -rw-r--r-- | testhal/STM32/STM32F7xx/GPT-ADC/main.c | 24 | ||||
| -rw-r--r-- | testhal/STM32/STM32L4xx/GPT-ADC/main.c | 18 |
2 files changed, 22 insertions, 20 deletions
diff --git a/testhal/STM32/STM32F7xx/GPT-ADC/main.c b/testhal/STM32/STM32F7xx/GPT-ADC/main.c index 643fd2114..b7a505152 100644 --- a/testhal/STM32/STM32F7xx/GPT-ADC/main.c +++ b/testhal/STM32/STM32F7xx/GPT-ADC/main.c @@ -29,10 +29,10 @@ * GPT4 configuration. This timer is used as trigger for the ADC.
*/
static const GPTConfig gpt4cfg1 = {
- frequency: 1000000U,
- callback: NULL,
- cr2: TIM_CR2_MMS_1, /* MMS = 010 = TRGO on Update Event. */
- dier: 0U
+ .frequency = 1000000U,
+ .callback = NULL,
+ .cr2 = TIM_CR2_MMS_1, /* MMS = 010 = TRGO on Update Event. */
+ .dier = 0U
};
/*===========================================================================*/
@@ -79,7 +79,7 @@ static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) { }
/*
- * ADC errors callbaack, should never happen.
+ * ADC errors callback, should never happen.
*/
static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) {
@@ -98,13 +98,15 @@ static const ADCConversionGroup adcgrpcfg1 = { ADC_GRP1_NUM_CHANNELS,
adccallback,
adcerrorcallback,
- 0, /* CR1 */
- ADC_CR2_EXTEN_RISING | ADC_CR2_EXTSEL_SRC(12), /* CR2 */
- ADC_SMPR1_SMP_SENSOR(ADC_SAMPLE_144) | ADC_SMPR1_SMP_VREF(ADC_SAMPLE_144),
+ 0, /* CR1 */
+ ADC_CR2_EXTEN_RISING | ADC_CR2_EXTSEL_SRC(12), /* CR2 */
+ ADC_SMPR1_SMP_SENSOR(ADC_SAMPLE_144) |
+ ADC_SMPR1_SMP_VREF(ADC_SAMPLE_144), /* SMPR1 */
0, /* SMPR2 */
- ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS), /* SQR1 */
- 0, /* SQR1 */
- ADC_SQR3_SQ2_N(ADC_CHANNEL_SENSOR) | ADC_SQR3_SQ1_N(ADC_CHANNEL_VREFINT)
+ ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS), /* SQR1 */
+ 0, /* SQR2 */
+ ADC_SQR3_SQ2_N(ADC_CHANNEL_SENSOR) |
+ ADC_SQR3_SQ1_N(ADC_CHANNEL_VREFINT) /* SQR3 */
};
/*===========================================================================*/
diff --git a/testhal/STM32/STM32L4xx/GPT-ADC/main.c b/testhal/STM32/STM32L4xx/GPT-ADC/main.c index bddfa5f21..bf843263c 100644 --- a/testhal/STM32/STM32L4xx/GPT-ADC/main.c +++ b/testhal/STM32/STM32L4xx/GPT-ADC/main.c @@ -25,10 +25,10 @@ * GPT4 configuration. This timer is used as trigger for the ADC.
*/
static const GPTConfig gpt4cfg1 = {
- frequency: 1000000U,
- callback: NULL,
- cr2: TIM_CR2_MMS_1, /* MMS = 010 = TRGO on Update Event. */
- dier: 0U
+ .frequency = 1000000U,
+ .callback = NULL,
+ .cr2 = TIM_CR2_MMS_1, /* MMS = 010 = TRGO on Update Event. */
+ .dier = 0U
};
/*===========================================================================*/
@@ -58,7 +58,7 @@ static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) { }
/*
- * ADC errors callbaack, should never happen.
+ * ADC errors callback, should never happen.
*/
static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) {
@@ -77,13 +77,13 @@ static const ADCConversionGroup adcgrpcfg1 = { ADC_GRP1_NUM_CHANNELS,
adccallback,
adcerrorcallback,
- ADC_CFGR_CONT | ADC_CFGR_EXTEN_RISING | ADC_CFGR_EXTSEL_SRC(12), /* CFGR */
- ADC_TR(0, 4095), /* TR1 */
- { /* SMPR[2] */
+ ADC_CFGR_CONT | ADC_CFGR_EXTEN_RISING | ADC_CFGR_EXTSEL_SRC(12), /* CFGR */
+ ADC_TR(0, 4095), /* TR1 */
+ { /* SMPR[2]*/
ADC_SMPR1_SMP_AN0(ADC_SMPR_SMP_247P5),
ADC_SMPR1_SMP_AN2(ADC_SMPR_SMP_247P5)
},
- { /* SQR[4] */
+ { /* SQR[4] */
ADC_SQR1_SQ1_N(ADC_CHANNEL_IN0) | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN2),
0,
0,
|