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authorGiovanni Di Sirio <gdisirio@gmail.com>2018-01-08 08:58:34 +0000
committerGiovanni Di Sirio <gdisirio@gmail.com>2018-01-08 08:58:34 +0000
commit7761387ba0a0ac206b7e5ab133462c29882b63bd (patch)
tree158722e03054fb8b5727ff27dc5aae28eef13ce8 /testhal/STM32
parent4148fb3cb7dcbe3eeef998bf6d0a86a1ad2447da (diff)
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Added unified cache handler for Cortex-M devices.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11233 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'testhal/STM32')
-rwxr-xr-xtesthal/STM32/multi/SPI/main.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/testhal/STM32/multi/SPI/main.c b/testhal/STM32/multi/SPI/main.c
index 852f5107b..85328a6a3 100755
--- a/testhal/STM32/multi/SPI/main.c
+++ b/testhal/STM32/multi/SPI/main.c
@@ -42,8 +42,8 @@ static THD_FUNCTION(spi_thread_1, p) {
spiExchange(&PORTAB_SPI1, 512,
txbuf, rxbuf); /* Atomic transfer operations. */
spiUnselect(&PORTAB_SPI1); /* Slave Select de-assertion. */
- dmaBufferInvalidate(&txbuf[0], /* Cache invalidation over the */
- sizeof txbuf); /* buffer. */
+ cacheBufferInvalidate(&txbuf[0], /* Cache invalidation over the */
+ sizeof txbuf);/* buffer. */
spiReleaseBus(&PORTAB_SPI1); /* Ownership release. */
}
}
@@ -64,8 +64,8 @@ static THD_FUNCTION(spi_thread_2, p) {
spiExchange(&PORTAB_SPI1, 512,
txbuf, rxbuf); /* Atomic transfer operations. */
spiUnselect(&PORTAB_SPI1); /* Slave Select de-assertion. */
- dmaBufferInvalidate(&txbuf[0], /* Cache invalidation over the */
- sizeof txbuf); /* buffer. */
+ cacheBufferInvalidate(&txbuf[0], /* Cache invalidation over the */
+ sizeof txbuf);/* buffer. */
spiReleaseBus(&PORTAB_SPI1); /* Ownership release. */
}
}
@@ -112,7 +112,7 @@ int main(void) {
*/
for (i = 0; i < sizeof(txbuf); i++)
txbuf[i] = (uint8_t)i;
- dmaBufferFlush(&txbuf[0], sizeof txbuf);
+ cacheBufferFlush(&txbuf[0], sizeof txbuf);
/*
* Starting the transmitter and receiver threads.