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author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-08-20 07:40:01 +0000 |
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committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-08-20 07:40:01 +0000 |
commit | 29226ecec7052b72ba82e8ba2eedb4c91d27ff28 (patch) | |
tree | 325cbe745a82059e7c5682c2d03889c157ff3637 /testhal/STM32 | |
parent | fef1911a8f6329ad97e4112965e004d21bffef73 (diff) | |
download | ChibiOS-29226ecec7052b72ba82e8ba2eedb4c91d27ff28.tar.gz ChibiOS-29226ecec7052b72ba82e8ba2eedb4c91d27ff28.tar.bz2 ChibiOS-29226ecec7052b72ba82e8ba2eedb4c91d27ff28.zip |
Small fix to the SPI demo. SPI I/O pins were no initialized as alternate.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2135 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'testhal/STM32')
-rw-r--r-- | testhal/STM32/SPI/main.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/testhal/STM32/SPI/main.c b/testhal/STM32/SPI/main.c index 1ebf1b45e..a8a8595f1 100644 --- a/testhal/STM32/SPI/main.c +++ b/testhal/STM32/SPI/main.c @@ -95,6 +95,15 @@ int main(int argc, char **argv) { (void)argv;
/*
+ * SPI1 I/O pins setup. + */
+ palSetPadMode(IOPORT1, 5, PAL_MODE_STM32_ALTERNATE_PUSHPULL); /* SCK. */
+ palSetPadMode(IOPORT1, 6, PAL_MODE_STM32_ALTERNATE_PUSHPULL); /* MISO.*/
+ palSetPadMode(IOPORT1, 7, PAL_MODE_STM32_ALTERNATE_PUSHPULL); /* MOSI.*/
+ palSetPadMode(IOPORT1, GPIOA_SPI1NSS, PAL_MODE_OUTPUT_PUSHPULL);
+ palSetPad(IOPORT1, GPIOA_SPI1NSS);
+
+ /*
* Prepare transmit pattern. */
for (i = 0; i < sizeof(txbuf); i++)
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