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authorGiovanni Di Sirio <gdisirio@gmail.com>2016-06-17 12:58:41 +0000
committerGiovanni Di Sirio <gdisirio@gmail.com>2016-06-17 12:58:41 +0000
commit458e6a84df1beb84f21c7e57147dec8c44f1d751 (patch)
tree09a63f4f6aaee24e5930448b7d38bd66d7063f3b /testhal/STM32/STM32L1xx/SPI
parent67b83e80b6539c4cfef7ae575b9655ab193bef96 (diff)
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Added CR2 setting to STM32 SPIv1 driver.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9640 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'testhal/STM32/STM32L1xx/SPI')
-rw-r--r--testhal/STM32/STM32L1xx/SPI/main.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/testhal/STM32/STM32L1xx/SPI/main.c b/testhal/STM32/STM32L1xx/SPI/main.c
index 0e0e119a1..f70d4f7c8 100644
--- a/testhal/STM32/STM32L1xx/SPI/main.c
+++ b/testhal/STM32/STM32L1xx/SPI/main.c
@@ -24,6 +24,7 @@ static const SPIConfig hs_spicfg = {
NULL,
GPIOB,
12,
+ 0,
0
};
@@ -34,7 +35,8 @@ static const SPIConfig ls_spicfg = {
NULL,
GPIOB,
12,
- SPI_CR1_BR_2 | SPI_CR1_BR_1
+ SPI_CR1_BR_2 | SPI_CR1_BR_1,
+ 0
};
/*