diff options
author | Giovanni Di Sirio <gdisirio@gmail.com> | 2016-06-21 08:44:15 +0000 |
---|---|---|
committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2016-06-21 08:44:15 +0000 |
commit | c6cad23bd99a78148063b88a3f9957cb9a5cb7de (patch) | |
tree | 0457382232c6eb5d94850bc444b8447c9fa6df7d /testhal/STM32/STM32F4xx | |
parent | ce6a5d95a0c91f0b575e74b946918d1aef0ef0e9 (diff) | |
download | ChibiOS-c6cad23bd99a78148063b88a3f9957cb9a5cb7de.tar.gz ChibiOS-c6cad23bd99a78148063b88a3f9957cb9a5cb7de.tar.bz2 ChibiOS-c6cad23bd99a78148063b88a3f9957cb9a5cb7de.zip |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9646 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'testhal/STM32/STM32F4xx')
21 files changed, 42 insertions, 42 deletions
diff --git a/testhal/STM32/STM32F4xx/ADC/mcuconf.h b/testhal/STM32/STM32F4xx/ADC/mcuconf.h index 6ed6fcc6d..944fd6cb2 100644 --- a/testhal/STM32/STM32F4xx/ADC/mcuconf.h +++ b/testhal/STM32/STM32F4xx/ADC/mcuconf.h @@ -238,8 +238,8 @@ */
#define STM32_SDC_SDIO_DMA_PRIORITY 3
#define STM32_SDC_SDIO_IRQ_PRIORITY 9
-#define STM32_SDC_WRITE_TIMEOUT_MS 250
-#define STM32_SDC_READ_TIMEOUT_MS 25
+#define STM32_SDC_WRITE_TIMEOUT_MS 1000
+#define STM32_SDC_READ_TIMEOUT_MS 1000
#define STM32_SDC_CLOCK_ACTIVATION_DELAY 10
#define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE
#define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
diff --git a/testhal/STM32/STM32F4xx/CAN/mcuconf.h b/testhal/STM32/STM32F4xx/CAN/mcuconf.h index e31b8dd36..dbec45a5a 100644 --- a/testhal/STM32/STM32F4xx/CAN/mcuconf.h +++ b/testhal/STM32/STM32F4xx/CAN/mcuconf.h @@ -238,8 +238,8 @@ */
#define STM32_SDC_SDIO_DMA_PRIORITY 3
#define STM32_SDC_SDIO_IRQ_PRIORITY 9
-#define STM32_SDC_WRITE_TIMEOUT_MS 250
-#define STM32_SDC_READ_TIMEOUT_MS 25
+#define STM32_SDC_WRITE_TIMEOUT_MS 1000
+#define STM32_SDC_READ_TIMEOUT_MS 1000
#define STM32_SDC_CLOCK_ACTIVATION_DELAY 10
#define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE
#define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
diff --git a/testhal/STM32/STM32F4xx/DAC/mcuconf.h b/testhal/STM32/STM32F4xx/DAC/mcuconf.h index a05493079..b4ccaa449 100644 --- a/testhal/STM32/STM32F4xx/DAC/mcuconf.h +++ b/testhal/STM32/STM32F4xx/DAC/mcuconf.h @@ -238,8 +238,8 @@ */
#define STM32_SDC_SDIO_DMA_PRIORITY 3
#define STM32_SDC_SDIO_IRQ_PRIORITY 9
-#define STM32_SDC_WRITE_TIMEOUT_MS 250
-#define STM32_SDC_READ_TIMEOUT_MS 25
+#define STM32_SDC_WRITE_TIMEOUT_MS 1000
+#define STM32_SDC_READ_TIMEOUT_MS 1000
#define STM32_SDC_CLOCK_ACTIVATION_DELAY 10
#define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE
#define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
diff --git a/testhal/STM32/STM32F4xx/DAC_DUAL/mcuconf.h b/testhal/STM32/STM32F4xx/DAC_DUAL/mcuconf.h index 3e31da5e6..1ee86674d 100644 --- a/testhal/STM32/STM32F4xx/DAC_DUAL/mcuconf.h +++ b/testhal/STM32/STM32F4xx/DAC_DUAL/mcuconf.h @@ -238,8 +238,8 @@ */
#define STM32_SDC_SDIO_DMA_PRIORITY 3
#define STM32_SDC_SDIO_IRQ_PRIORITY 9
-#define STM32_SDC_WRITE_TIMEOUT_MS 250
-#define STM32_SDC_READ_TIMEOUT_MS 25
+#define STM32_SDC_WRITE_TIMEOUT_MS 1000
+#define STM32_SDC_READ_TIMEOUT_MS 1000
#define STM32_SDC_CLOCK_ACTIVATION_DELAY 10
#define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE
#define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
diff --git a/testhal/STM32/STM32F4xx/DMA_STORM/mcuconf.h b/testhal/STM32/STM32F4xx/DMA_STORM/mcuconf.h index ff30a2546..44c90f3c6 100644 --- a/testhal/STM32/STM32F4xx/DMA_STORM/mcuconf.h +++ b/testhal/STM32/STM32F4xx/DMA_STORM/mcuconf.h @@ -238,8 +238,8 @@ */
#define STM32_SDC_SDIO_DMA_PRIORITY 3
#define STM32_SDC_SDIO_IRQ_PRIORITY 9
-#define STM32_SDC_WRITE_TIMEOUT_MS 250
-#define STM32_SDC_READ_TIMEOUT_MS 25
+#define STM32_SDC_WRITE_TIMEOUT_MS 1000
+#define STM32_SDC_READ_TIMEOUT_MS 1000
#define STM32_SDC_CLOCK_ACTIVATION_DELAY 10
#define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE
#define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
diff --git a/testhal/STM32/STM32F4xx/EXT/mcuconf.h b/testhal/STM32/STM32F4xx/EXT/mcuconf.h index 10c6579be..671f9184e 100644 --- a/testhal/STM32/STM32F4xx/EXT/mcuconf.h +++ b/testhal/STM32/STM32F4xx/EXT/mcuconf.h @@ -238,8 +238,8 @@ */
#define STM32_SDC_SDIO_DMA_PRIORITY 3
#define STM32_SDC_SDIO_IRQ_PRIORITY 9
-#define STM32_SDC_WRITE_TIMEOUT_MS 250
-#define STM32_SDC_READ_TIMEOUT_MS 25
+#define STM32_SDC_WRITE_TIMEOUT_MS 1000
+#define STM32_SDC_READ_TIMEOUT_MS 1000
#define STM32_SDC_CLOCK_ACTIVATION_DELAY 10
#define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE
#define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
diff --git a/testhal/STM32/STM32F4xx/GPT/mcuconf.h b/testhal/STM32/STM32F4xx/GPT/mcuconf.h index 46ae2fd9c..1350e4cec 100644 --- a/testhal/STM32/STM32F4xx/GPT/mcuconf.h +++ b/testhal/STM32/STM32F4xx/GPT/mcuconf.h @@ -238,8 +238,8 @@ */
#define STM32_SDC_SDIO_DMA_PRIORITY 3
#define STM32_SDC_SDIO_IRQ_PRIORITY 9
-#define STM32_SDC_WRITE_TIMEOUT_MS 250
-#define STM32_SDC_READ_TIMEOUT_MS 25
+#define STM32_SDC_WRITE_TIMEOUT_MS 1000
+#define STM32_SDC_READ_TIMEOUT_MS 1000
#define STM32_SDC_CLOCK_ACTIVATION_DELAY 10
#define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE
#define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
diff --git a/testhal/STM32/STM32F4xx/I2C/mcuconf.h b/testhal/STM32/STM32F4xx/I2C/mcuconf.h index 7871067b6..fdc320979 100644 --- a/testhal/STM32/STM32F4xx/I2C/mcuconf.h +++ b/testhal/STM32/STM32F4xx/I2C/mcuconf.h @@ -238,8 +238,8 @@ */
#define STM32_SDC_SDIO_DMA_PRIORITY 3
#define STM32_SDC_SDIO_IRQ_PRIORITY 9
-#define STM32_SDC_WRITE_TIMEOUT_MS 250
-#define STM32_SDC_READ_TIMEOUT_MS 25
+#define STM32_SDC_WRITE_TIMEOUT_MS 1000
+#define STM32_SDC_READ_TIMEOUT_MS 1000
#define STM32_SDC_CLOCK_ACTIVATION_DELAY 10
#define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE
#define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
diff --git a/testhal/STM32/STM32F4xx/I2S/mcuconf.h b/testhal/STM32/STM32F4xx/I2S/mcuconf.h index c06c07d6e..5da8f3cc5 100644 --- a/testhal/STM32/STM32F4xx/I2S/mcuconf.h +++ b/testhal/STM32/STM32F4xx/I2S/mcuconf.h @@ -238,8 +238,8 @@ */
#define STM32_SDC_SDIO_DMA_PRIORITY 3
#define STM32_SDC_SDIO_IRQ_PRIORITY 9
-#define STM32_SDC_WRITE_TIMEOUT_MS 250
-#define STM32_SDC_READ_TIMEOUT_MS 25
+#define STM32_SDC_WRITE_TIMEOUT_MS 1000
+#define STM32_SDC_READ_TIMEOUT_MS 1000
#define STM32_SDC_CLOCK_ACTIVATION_DELAY 10
#define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE
#define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
diff --git a/testhal/STM32/STM32F4xx/IRQ_STORM/mcuconf.h b/testhal/STM32/STM32F4xx/IRQ_STORM/mcuconf.h index fb1e993bd..7a2b792c5 100644 --- a/testhal/STM32/STM32F4xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32/STM32F4xx/IRQ_STORM/mcuconf.h @@ -238,8 +238,8 @@ */
#define STM32_SDC_SDIO_DMA_PRIORITY 3
#define STM32_SDC_SDIO_IRQ_PRIORITY 9
-#define STM32_SDC_WRITE_TIMEOUT_MS 250
-#define STM32_SDC_READ_TIMEOUT_MS 25
+#define STM32_SDC_WRITE_TIMEOUT_MS 1000
+#define STM32_SDC_READ_TIMEOUT_MS 1000
#define STM32_SDC_CLOCK_ACTIVATION_DELAY 10
#define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE
#define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
diff --git a/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/mcuconf.h b/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/mcuconf.h index fb1e993bd..7a2b792c5 100644 --- a/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/mcuconf.h +++ b/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/mcuconf.h @@ -238,8 +238,8 @@ */
#define STM32_SDC_SDIO_DMA_PRIORITY 3
#define STM32_SDC_SDIO_IRQ_PRIORITY 9
-#define STM32_SDC_WRITE_TIMEOUT_MS 250
-#define STM32_SDC_READ_TIMEOUT_MS 25
+#define STM32_SDC_WRITE_TIMEOUT_MS 1000
+#define STM32_SDC_READ_TIMEOUT_MS 1000
#define STM32_SDC_CLOCK_ACTIVATION_DELAY 10
#define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE
#define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
diff --git a/testhal/STM32/STM32F4xx/PWM-ICU/mcuconf.h b/testhal/STM32/STM32F4xx/PWM-ICU/mcuconf.h index c0415434e..367f718ce 100644 --- a/testhal/STM32/STM32F4xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32/STM32F4xx/PWM-ICU/mcuconf.h @@ -238,8 +238,8 @@ */
#define STM32_SDC_SDIO_DMA_PRIORITY 3
#define STM32_SDC_SDIO_IRQ_PRIORITY 9
-#define STM32_SDC_WRITE_TIMEOUT_MS 250
-#define STM32_SDC_READ_TIMEOUT_MS 25
+#define STM32_SDC_WRITE_TIMEOUT_MS 1000
+#define STM32_SDC_READ_TIMEOUT_MS 1000
#define STM32_SDC_CLOCK_ACTIVATION_DELAY 10
#define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE
#define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
diff --git a/testhal/STM32/STM32F4xx/RTC/mcuconf.h b/testhal/STM32/STM32F4xx/RTC/mcuconf.h index c0070b4bf..f6c284e2e 100644 --- a/testhal/STM32/STM32F4xx/RTC/mcuconf.h +++ b/testhal/STM32/STM32F4xx/RTC/mcuconf.h @@ -238,8 +238,8 @@ */
#define STM32_SDC_SDIO_DMA_PRIORITY 3
#define STM32_SDC_SDIO_IRQ_PRIORITY 9
-#define STM32_SDC_WRITE_TIMEOUT_MS 250
-#define STM32_SDC_READ_TIMEOUT_MS 25
+#define STM32_SDC_WRITE_TIMEOUT_MS 1000
+#define STM32_SDC_READ_TIMEOUT_MS 1000
#define STM32_SDC_CLOCK_ACTIVATION_DELAY 10
#define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE
#define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
diff --git a/testhal/STM32/STM32F4xx/SDC/mcuconf.h b/testhal/STM32/STM32F4xx/SDC/mcuconf.h index 095f0bc2d..9b1a574e0 100644 --- a/testhal/STM32/STM32F4xx/SDC/mcuconf.h +++ b/testhal/STM32/STM32F4xx/SDC/mcuconf.h @@ -238,8 +238,8 @@ */
#define STM32_SDC_SDIO_DMA_PRIORITY 3
#define STM32_SDC_SDIO_IRQ_PRIORITY 9
-#define STM32_SDC_WRITE_TIMEOUT_MS 250
-#define STM32_SDC_READ_TIMEOUT_MS 25
+#define STM32_SDC_WRITE_TIMEOUT_MS 1000
+#define STM32_SDC_READ_TIMEOUT_MS 1000
#define STM32_SDC_CLOCK_ACTIVATION_DELAY 10
#define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE
#define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
diff --git a/testhal/STM32/STM32F4xx/SPI-LIS302DL/mcuconf.h b/testhal/STM32/STM32F4xx/SPI-LIS302DL/mcuconf.h index e7046eda7..0d478ebf8 100644 --- a/testhal/STM32/STM32F4xx/SPI-LIS302DL/mcuconf.h +++ b/testhal/STM32/STM32F4xx/SPI-LIS302DL/mcuconf.h @@ -238,8 +238,8 @@ */
#define STM32_SDC_SDIO_DMA_PRIORITY 3
#define STM32_SDC_SDIO_IRQ_PRIORITY 9
-#define STM32_SDC_WRITE_TIMEOUT_MS 250
-#define STM32_SDC_READ_TIMEOUT_MS 25
+#define STM32_SDC_WRITE_TIMEOUT_MS 1000
+#define STM32_SDC_READ_TIMEOUT_MS 1000
#define STM32_SDC_CLOCK_ACTIVATION_DELAY 10
#define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE
#define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
diff --git a/testhal/STM32/STM32F4xx/SPI-LIS3DSH/mcuconf.h b/testhal/STM32/STM32F4xx/SPI-LIS3DSH/mcuconf.h index e7046eda7..0d478ebf8 100644 --- a/testhal/STM32/STM32F4xx/SPI-LIS3DSH/mcuconf.h +++ b/testhal/STM32/STM32F4xx/SPI-LIS3DSH/mcuconf.h @@ -238,8 +238,8 @@ */
#define STM32_SDC_SDIO_DMA_PRIORITY 3
#define STM32_SDC_SDIO_IRQ_PRIORITY 9
-#define STM32_SDC_WRITE_TIMEOUT_MS 250
-#define STM32_SDC_READ_TIMEOUT_MS 25
+#define STM32_SDC_WRITE_TIMEOUT_MS 1000
+#define STM32_SDC_READ_TIMEOUT_MS 1000
#define STM32_SDC_CLOCK_ACTIVATION_DELAY 10
#define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE
#define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
diff --git a/testhal/STM32/STM32F4xx/SPI/mcuconf.h b/testhal/STM32/STM32F4xx/SPI/mcuconf.h index 6fd0663b8..6d84c4346 100644 --- a/testhal/STM32/STM32F4xx/SPI/mcuconf.h +++ b/testhal/STM32/STM32F4xx/SPI/mcuconf.h @@ -238,8 +238,8 @@ */
#define STM32_SDC_SDIO_DMA_PRIORITY 3
#define STM32_SDC_SDIO_IRQ_PRIORITY 9
-#define STM32_SDC_WRITE_TIMEOUT_MS 250
-#define STM32_SDC_READ_TIMEOUT_MS 25
+#define STM32_SDC_WRITE_TIMEOUT_MS 1000
+#define STM32_SDC_READ_TIMEOUT_MS 1000
#define STM32_SDC_CLOCK_ACTIVATION_DELAY 10
#define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE
#define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
diff --git a/testhal/STM32/STM32F4xx/UART/mcuconf.h b/testhal/STM32/STM32F4xx/UART/mcuconf.h index 0be6ca92e..22d7035b3 100644 --- a/testhal/STM32/STM32F4xx/UART/mcuconf.h +++ b/testhal/STM32/STM32F4xx/UART/mcuconf.h @@ -238,8 +238,8 @@ */
#define STM32_SDC_SDIO_DMA_PRIORITY 3
#define STM32_SDC_SDIO_IRQ_PRIORITY 9
-#define STM32_SDC_WRITE_TIMEOUT_MS 250
-#define STM32_SDC_READ_TIMEOUT_MS 25
+#define STM32_SDC_WRITE_TIMEOUT_MS 1000
+#define STM32_SDC_READ_TIMEOUT_MS 1000
#define STM32_SDC_CLOCK_ACTIVATION_DELAY 10
#define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE
#define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
diff --git a/testhal/STM32/STM32F4xx/USB_CDC/mcuconf.h b/testhal/STM32/STM32F4xx/USB_CDC/mcuconf.h index bbbd51a77..e123b6ca8 100644 --- a/testhal/STM32/STM32F4xx/USB_CDC/mcuconf.h +++ b/testhal/STM32/STM32F4xx/USB_CDC/mcuconf.h @@ -242,8 +242,8 @@ */
#define STM32_SDC_SDIO_DMA_PRIORITY 3
#define STM32_SDC_SDIO_IRQ_PRIORITY 9
-#define STM32_SDC_WRITE_TIMEOUT_MS 250
-#define STM32_SDC_READ_TIMEOUT_MS 25
+#define STM32_SDC_WRITE_TIMEOUT_MS 1000
+#define STM32_SDC_READ_TIMEOUT_MS 1000
#define STM32_SDC_CLOCK_ACTIVATION_DELAY 10
#define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE
#define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
diff --git a/testhal/STM32/STM32F4xx/USB_CDC_IAD/mcuconf.h b/testhal/STM32/STM32F4xx/USB_CDC_IAD/mcuconf.h index fc6a0727e..ead058f5f 100644 --- a/testhal/STM32/STM32F4xx/USB_CDC_IAD/mcuconf.h +++ b/testhal/STM32/STM32F4xx/USB_CDC_IAD/mcuconf.h @@ -238,8 +238,8 @@ */
#define STM32_SDC_SDIO_DMA_PRIORITY 3
#define STM32_SDC_SDIO_IRQ_PRIORITY 9
-#define STM32_SDC_WRITE_TIMEOUT_MS 250
-#define STM32_SDC_READ_TIMEOUT_MS 25
+#define STM32_SDC_WRITE_TIMEOUT_MS 1000
+#define STM32_SDC_READ_TIMEOUT_MS 1000
#define STM32_SDC_CLOCK_ACTIVATION_DELAY 10
#define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE
#define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
diff --git a/testhal/STM32/STM32F4xx/WDG/mcuconf.h b/testhal/STM32/STM32F4xx/WDG/mcuconf.h index 984e1e8ea..89b595edb 100644 --- a/testhal/STM32/STM32F4xx/WDG/mcuconf.h +++ b/testhal/STM32/STM32F4xx/WDG/mcuconf.h @@ -238,8 +238,8 @@ */
#define STM32_SDC_SDIO_DMA_PRIORITY 3
#define STM32_SDC_SDIO_IRQ_PRIORITY 9
-#define STM32_SDC_WRITE_TIMEOUT_MS 250
-#define STM32_SDC_READ_TIMEOUT_MS 25
+#define STM32_SDC_WRITE_TIMEOUT_MS 1000
+#define STM32_SDC_READ_TIMEOUT_MS 1000
#define STM32_SDC_CLOCK_ACTIVATION_DELAY 10
#define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE
#define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
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