git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@6920 35acf78f-673a-0410-8e92-d51de3d6d3f4

author: gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> 2014-05-07 10:44:43 +0000
committer: gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> 2014-05-07 10:44:43 +0000
commit: eefaedd59cccaeddcde8f54f89c98a26cc570e82 (patch)
tree: dc4f07d0b2274ae46865fce952d1750ea187f7db /testhal/STM32/STM32F4xx/IRQ_STORM_FPU
parent: 084e1f7b5ad7cb86cbe68eb7e1749f7750c89ce3 (diff)
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diff --git a/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/.cproject b/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/.cproject
new file mode 100644
index 000000000..304afdf99
--- /dev/null
+++ b/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/.cproject
@@ -0,0 +1,52 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?>
+
+<cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="0.588576619">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="0.588576619" moduleId="org.eclipse.cdt.core.settings" name="Default">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.VCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactName="${ProjName}" buildProperties="" description="" id="0.588576619" name="Default" parent="org.eclipse.cdt.build.core.prefbase.cfg">
+					<folderInfo id="0.588576619." name="/" resourcePath="">
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+							<targetPlatform id="org.eclipse.cdt.build.core.prefbase.toolchain.1667054953.1202223432" name=""/>
+							<builder id="org.eclipse.cdt.build.core.settings.default.builder.1830989627" keepEnvironmentInBuildfile="false" managedBuildOn="false" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="org.eclipse.cdt.build.core.settings.default.builder"/>
+							<tool id="org.eclipse.cdt.build.core.settings.holder.libs.284309647" name="holder for library settings" superClass="org.eclipse.cdt.build.core.settings.holder.libs"/>
+							<tool id="org.eclipse.cdt.build.core.settings.holder.1523239174" name="Assembly" superClass="org.eclipse.cdt.build.core.settings.holder">
+								<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.1757085528" languageId="org.eclipse.cdt.core.assembly" languageName="Assembly" sourceContentType="org.eclipse.cdt.core.asmSource" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
+							</tool>
+							<tool id="org.eclipse.cdt.build.core.settings.holder.1287360316" name="GNU C++" superClass="org.eclipse.cdt.build.core.settings.holder">
+								<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.1562011625" languageId="org.eclipse.cdt.core.g++" languageName="GNU C++" sourceContentType="org.eclipse.cdt.core.cxxSource,org.eclipse.cdt.core.cxxHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
+							</tool>
+							<tool id="org.eclipse.cdt.build.core.settings.holder.386644346" name="GNU C" superClass="org.eclipse.cdt.build.core.settings.holder">
+								<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.1578356659" languageId="org.eclipse.cdt.core.gcc" languageName="GNU C" sourceContentType="org.eclipse.cdt.core.cSource,org.eclipse.cdt.core.cHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
+							</tool>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="STM32F4xx-IRQ_STORM_FPU.null.971130538" name="STM32F4xx-IRQ_STORM_FPU"/>
+	</storageModule>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="0.588576619">
+			<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile"/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="refreshScope"/>
+</cproject>
diff --git a/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/.project b/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/.project
new file mode 100644
index 000000000..d2e79b473
--- /dev/null
+++ b/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/.project
@@ -0,0 +1,38 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>STM32F4xx-IRQ_STORM_FPU</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>board</name>
+			<type>2</type>
+			<locationURI>CHIBIOS/os/hal/boards/ST_STM32F4_DISCOVERY</locationURI>
+		</link>
+		<link>
+			<name>os</name>
+			<type>2</type>
+			<locationURI>CHIBIOS/os</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/Makefile b/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/Makefile
new file mode 100644
index 000000000..43b51f622
--- /dev/null
+++ b/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/Makefile
@@ -0,0 +1,203 @@
+##############################################################################
+# Build global options
+# NOTE: Can be overridden externally.
+#
+
+# Compiler options here.
+ifeq ($(USE_OPT),)
+  USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
+endif
+
+# C specific options here (added to USE_OPT).
+ifeq ($(USE_COPT),)
+  USE_COPT = 
+endif
+
+# C++ specific options here (added to USE_OPT).
+ifeq ($(USE_CPPOPT),)
+  USE_CPPOPT = -fno-rtti
+endif
+
+# Enable this if you want the linker to remove unused code and data
+ifeq ($(USE_LINK_GC),)
+  USE_LINK_GC = yes
+endif
+
+# Linker extra options here.
+ifeq ($(USE_LDOPT),)
+  USE_LDOPT = 
+endif
+
+# Enable this if you want link time optimizations (LTO)
+ifeq ($(USE_LTO),)
+  USE_LTO = yes
+endif
+
+# If enabled, this option allows to compile the application in THUMB mode.
+ifeq ($(USE_THUMB),)
+  USE_THUMB = yes
+endif
+
+# Enable this if you want to see the full log while compiling.
+ifeq ($(USE_VERBOSE_COMPILE),)
+  USE_VERBOSE_COMPILE = no
+endif
+
+#
+# Build global options
+##############################################################################
+
+##############################################################################
+# Architecture or project specific options
+#
+
+# Stack size to be allocated to the Cortex-M process stack. This stack is
+# the stack used by the main() thread.
+ifeq ($(USE_PROCESS_STACKSIZE),)
+  USE_PROCESS_STACKSIZE = 0x400
+endif
+
+# Stack size to the allocated to the Cortex-M main/exceptions stack. This
+# stack is used for processing interrupts and exceptions.
+ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
+  USE_EXCEPTIONS_STACKSIZE = 0x400
+endif
+
+# Enables the use of FPU on Cortex-M4 (no, softfp, hard).
+ifeq ($(USE_FPU),)
+  USE_FPU = hard
+endif
+
+#
+# Architecture or project specific options
+##############################################################################
+
+##############################################################################
+# Project, sources and paths
+#
+
+# Define project name here
+PROJECT = ch
+
+# Imported source files and paths
+CHIBIOS = ../../..
+include $(CHIBIOS)/os/hal/hal.mk
+include $(CHIBIOS)/os/hal/boards/ST_STM32F4_DISCOVERY/board.mk
+include $(CHIBIOS)/os/hal/ports/STM32/STM32F4xx/platform.mk
+include $(CHIBIOS)/os/hal/osal/rt/osal.mk
+include $(CHIBIOS)/os/rt/rt.mk
+include $(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/mk/port_stm32f4xx.mk
+#include $(CHIBIOS)/test/rt/test.mk
+
+# Define linker script file here
+LDSCRIPT= $(PORTLD)/STM32F407xG.ld
+
+# C sources that can be compiled in ARM or THUMB mode depending on the global
+# setting.
+CSRC = $(PORTSRC) \
+       $(KERNSRC) \
+       $(TESTSRC) \
+       $(HALSRC) \
+       $(OSALSRC) \
+       $(PLATFORMSRC) \
+       $(BOARDSRC) \
+       extfunc.c main.c
+
+# C++ sources that can be compiled in ARM or THUMB mode depending on the global
+# setting.
+CPPSRC =
+
+# C sources to be compiled in ARM mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+#       option that results in lower performance and larger code size.
+ACSRC =
+
+# C++ sources to be compiled in ARM mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+#       option that results in lower performance and larger code size.
+ACPPSRC =
+
+# C sources to be compiled in THUMB mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+#       option that results in lower performance and larger code size.
+TCSRC =
+
+# C sources to be compiled in THUMB mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+#       option that results in lower performance and larger code size.
+TCPPSRC =
+
+# List ASM source files here
+ASMSRC = $(PORTASM)
+
+INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
+         $(HALINC) $(OSALINC) $(PLATFORMINC) $(BOARDINC) \
+         $(CHIBIOS)/os/various
+
+#
+# Project, sources and paths
+##############################################################################
+
+##############################################################################
+# Compiler settings
+#
+
+MCU  = cortex-m4
+
+#TRGT = arm-elf-
+TRGT = arm-none-eabi-
+CC   = $(TRGT)gcc
+CPPC = $(TRGT)g++
+# Enable loading with g++ only if you need C++ runtime support.
+# NOTE: You can use C++ even without C++ support if you are careful. C++
+#       runtime support makes code size explode.
+LD   = $(TRGT)gcc
+#LD   = $(TRGT)g++
+CP   = $(TRGT)objcopy
+AS   = $(TRGT)gcc -x assembler-with-cpp
+OD   = $(TRGT)objdump
+SZ   = $(TRGT)size
+HEX  = $(CP) -O ihex
+BIN  = $(CP) -O binary
+
+# ARM-specific options here
+AOPT =
+
+# THUMB-specific options here
+TOPT = -mthumb -DTHUMB
+
+# Define C warning options here
+CWARN = -Wall -Wextra -Wstrict-prototypes
+
+# Define C++ warning options here
+CPPWARN = -Wall -Wextra
+
+#
+# Compiler settings
+##############################################################################
+
+##############################################################################
+# Start of user section
+#
+
+# List all user C define here, like -D_DEBUG=1
+UDEFS =
+
+# Define ASM defines here
+UADEFS =
+
+# List all user directories here
+UINCDIR =
+
+# List the user directory to look for the libraries here
+ULIBDIR =
+
+# List all user libraries here
+ULIBS =
+
+#
+# End of user defines
+##############################################################################
+
+RULESPATH = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC
+include $(RULESPATH)/rules.mk
diff --git a/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/chconf.h b/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/chconf.h
new file mode 100644
index 000000000..7ff9a1440
--- /dev/null
+++ b/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/chconf.h
@@ -0,0 +1,498 @@
+/*
+    ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+/**
+ * @file    templates/chconf.h
+ * @brief   Configuration file template.
+ * @details A copy of this file must be placed in each project directory, it
+ *          contains the application specific kernel settings.
+ *
+ * @addtogroup config
+ * @details Kernel related settings and hooks.
+ * @{
+ */
+
+#ifndef _CHCONF_H_
+#define _CHCONF_H_
+
+/*===========================================================================*/
+/**
+ * @name System timers settings
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   System time counter resolution.
+ * @note    Allowed values are 16 or 32 bits.
+ */
+#define CH_CFG_ST_RESOLUTION                32
+
+/**
+ * @brief   System tick frequency.
+ * @details Frequency of the system timer that drives the system ticks. This
+ *          setting also defines the system tick time unit.
+ */
+#define CH_CFG_ST_FREQUENCY                 10000
+
+/**
+ * @brief   Time delta constant for the tick-less mode.
+ * @note    If this value is zero then the system uses the classic
+ *          periodic tick. This value represents the minimum number
+ *          of ticks that is safe to specify in a timeout directive.
+ *          The value one is not valid, timeouts are rounded up to
+ *          this value.
+ */
+#define CH_CFG_ST_TIMEDELTA                 2
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Kernel parameters and options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   Round robin interval.
+ * @details This constant is the number of system ticks allowed for the
+ *          threads before preemption occurs. Setting this value to zero
+ *          disables the preemption for threads with equal priority and the
+ *          round robin becomes cooperative. Note that higher priority
+ *          threads can still preempt, the kernel is always preemptive.
+ * @note    Disabling the round robin preemption makes the kernel more compact
+ *          and generally faster.
+ * @note    The round robin preemption is not supported in tickless mode and
+ *          must be set to zero in that case.
+ */
+#define CH_CFG_TIME_QUANTUM                 0
+
+/**
+ * @brief   Managed RAM size.
+ * @details Size of the RAM area to be managed by the OS. If set to zero
+ *          then the whole available RAM is used. The core memory is made
+ *          available to the heap allocator and/or can be used directly through
+ *          the simplified core memory allocator.
+ *
+ * @note    In order to let the OS manage the whole RAM the linker script must
+ *          provide the @p __heap_base__ and @p __heap_end__ symbols.
+ * @note    Requires @p CH_CFG_USE_MEMCORE.
+ */
+#define CH_CFG_MEMCORE_SIZE                 0
+
+/**
+ * @brief   Idle thread automatic spawn suppression.
+ * @details When this option is activated the function @p chSysInit()
+ *          does not spawn the idle thread. The application @p main()
+ *          function becomes the idle thread and must implement an
+ *          infinite loop. */
+#define CH_CFG_NO_IDLE_THREAD               FALSE
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Performance options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   OS optimization.
+ * @details If enabled then time efficient rather than space efficient code
+ *          is used when two possible implementations exist.
+ *
+ * @note    This is not related to the compiler optimization options.
+ * @note    The default is @p TRUE.
+ */
+#define CH_CFG_OPTIMIZE_SPEED               TRUE
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Subsystem options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   Time Measurement APIs.
+ * @details If enabled then the time measurement APIs are included in
+ *          the kernel.
+ *
+ * @note    The default is @p TRUE.
+ */
+#define CH_CFG_USE_TM                       TRUE
+
+/**
+ * @brief   Threads registry APIs.
+ * @details If enabled then the registry APIs are included in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ */
+#define CH_CFG_USE_REGISTRY                 TRUE
+
+/**
+ * @brief   Threads synchronization APIs.
+ * @details If enabled then the @p chThdWait() function is included in
+ *          the kernel.
+ *
+ * @note    The default is @p TRUE.
+ */
+#define CH_CFG_USE_WAITEXIT                 TRUE
+
+/**
+ * @brief   Semaphores APIs.
+ * @details If enabled then the Semaphores APIs are included in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ */
+#define CH_CFG_USE_SEMAPHORES               TRUE
+
+/**
+ * @brief   Semaphores queuing mode.
+ * @details If enabled then the threads are enqueued on semaphores by
+ *          priority rather than in FIFO order.
+ *
+ * @note    The default is @p FALSE. Enable this if you have special
+ *          requirements.
+ * @note    Requires @p CH_CFG_USE_SEMAPHORES.
+ */
+#define CH_CFG_USE_SEMAPHORES_PRIORITY      FALSE
+
+/**
+ * @brief   Mutexes APIs.
+ * @details If enabled then the mutexes APIs are included in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ */
+#define CH_CFG_USE_MUTEXES                  TRUE
+
+/**
+ * @brief   Enables recursive behavior on mutexes.
+ * @note    Recursive mutexes are heavier and have an increased
+ *          memory footprint.
+ *
+ * @note    The default is @p FALSE.
+ * @note    Requires @p CH_CFG_USE_MUTEXES.
+ */
+#define CH_CFG_USE_MUTEXES_RECURSIVE        FALSE
+
+/**
+ * @brief   Conditional Variables APIs.
+ * @details If enabled then the conditional variables APIs are included
+ *          in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ * @note    Requires @p CH_CFG_USE_MUTEXES.
+ */
+#define CH_CFG_USE_CONDVARS                 TRUE
+
+/**
+ * @brief   Conditional Variables APIs with timeout.
+ * @details If enabled then the conditional variables APIs with timeout
+ *          specification are included in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ * @note    Requires @p CH_CFG_USE_CONDVARS.
+ */
+#define CH_CFG_USE_CONDVARS_TIMEOUT         TRUE
+
+/**
+ * @brief   Events Flags APIs.
+ * @details If enabled then the event flags APIs are included in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ */
+#define CH_CFG_USE_EVENTS                   TRUE
+
+/**
+ * @brief   Events Flags APIs with timeout.
+ * @details If enabled then the events APIs with timeout specification
+ *          are included in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ * @note    Requires @p CH_CFG_USE_EVENTS.
+ */
+#define CH_CFG_USE_EVENTS_TIMEOUT           TRUE
+
+/**
+ * @brief   Synchronous Messages APIs.
+ * @details If enabled then the synchronous messages APIs are included
+ *          in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ */
+#define CH_CFG_USE_MESSAGES                 TRUE
+
+/**
+ * @brief   Synchronous Messages queuing mode.
+ * @details If enabled then messages are served by priority rather than in
+ *          FIFO order.
+ *
+ * @note    The default is @p FALSE. Enable this if you have special
+ *          requirements.
+ * @note    Requires @p CH_CFG_USE_MESSAGES.
+ */
+#define CH_CFG_USE_MESSAGES_PRIORITY        FALSE
+
+/**
+ * @brief   Mailboxes APIs.
+ * @details If enabled then the asynchronous messages (mailboxes) APIs are
+ *          included in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ * @note    Requires @p CH_CFG_USE_SEMAPHORES.
+ */
+#define CH_CFG_USE_MAILBOXES                TRUE
+
+/**
+ * @brief   I/O Queues APIs.
+ * @details If enabled then the I/O queues APIs are included in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ */
+#define CH_CFG_USE_QUEUES                   TRUE
+
+/**
+ * @brief   Core Memory Manager APIs.
+ * @details If enabled then the core memory manager APIs are included
+ *          in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ */
+#define CH_CFG_USE_MEMCORE                  TRUE
+
+/**
+ * @brief   Heap Allocator APIs.
+ * @details If enabled then the memory heap allocator APIs are included
+ *          in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ * @note    Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
+ *          @p CH_CFG_USE_SEMAPHORES.
+ * @note    Mutexes are recommended.
+ */
+#define CH_CFG_USE_HEAP                     TRUE
+
+/**
+ * @brief   Memory Pools Allocator APIs.
+ * @details If enabled then the memory pools allocator APIs are included
+ *          in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ */
+#define CH_CFG_USE_MEMPOOLS                 TRUE
+
+/**
+ * @brief   Dynamic Threads APIs.
+ * @details If enabled then the dynamic threads creation APIs are included
+ *          in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ * @note    Requires @p CH_CFG_USE_WAITEXIT.
+ * @note    Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
+ */
+#define CH_CFG_USE_DYNAMIC                  TRUE
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Debug options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   Debug option, kernel statistics.
+ *
+ * @note    The default is @p FALSE.
+ */
+#define CH_DBG_STATISTICS                   FALSE
+
+/**
+ * @brief   Debug option, system state check.
+ * @details If enabled the correct call protocol for system APIs is checked
+ *          at runtime.
+ *
+ * @note    The default is @p FALSE.
+ */
+#define CH_DBG_SYSTEM_STATE_CHECK           FALSE
+
+/**
+ * @brief   Debug option, parameters checks.
+ * @details If enabled then the checks on the API functions input
+ *          parameters are activated.
+ *
+ * @note    The default is @p FALSE.
+ */
+#define CH_DBG_ENABLE_CHECKS                FALSE
+
+/**
+ * @brief   Debug option, consistency checks.
+ * @details If enabled then all the assertions in the kernel code are
+ *          activated. This includes consistency checks inside the kernel,
+ *          runtime anomalies and port-defined checks.
+ *
+ * @note    The default is @p FALSE.
+ */
+#define CH_DBG_ENABLE_ASSERTS               FALSE
+
+/**
+ * @brief   Debug option, trace buffer.
+ * @details If enabled then the context switch circular trace buffer is
+ *          activated.
+ *
+ * @note    The default is @p FALSE.
+ */
+#define CH_DBG_ENABLE_TRACE                 FALSE
+
+/**
+ * @brief   Debug option, stack checks.
+ * @details If enabled then a runtime stack check is performed.
+ *
+ * @note    The default is @p FALSE.
+ * @note    The stack check is performed in a architecture/port dependent way.
+ *          It may not be implemented or some ports.
+ * @note    The default failure mode is to halt the system with the global
+ *          @p panic_msg variable set to @p NULL.
+ */
+#define CH_DBG_ENABLE_STACK_CHECK           FALSE
+
+/**
+ * @brief   Debug option, stacks initialization.
+ * @details If enabled then the threads working area is filled with a byte
+ *          value when a thread is created. This can be useful for the
+ *          runtime measurement of the used stack.
+ *
+ * @note    The default is @p FALSE.
+ */
+#define CH_DBG_FILL_THREADS                 FALSE
+
+/**
+ * @brief   Debug option, threads profiling.
+ * @details If enabled then a field is added to the @p thread_t structure that
+ *          counts the system ticks occurred while executing the thread.
+ *
+ * @note    The default is @p FALSE.
+ * @note    This debug option is not currently compatible with the
+ *          tickless mode.
+ */
+#define CH_DBG_THREADS_PROFILING            FALSE
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Kernel hooks
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   Threads descriptor structure extension.
+ * @details User fields added to the end of the @p thread_t structure.
+ */
+#define CH_CFG_THREAD_EXTRA_FIELDS                                          \
+  /* Add threads custom fields here.*/
+
+/**
+ * @brief   Threads initialization hook.
+ * @details User initialization code added to the @p chThdInit() API.
+ *
+ * @note    It is invoked from within @p chThdInit() and implicitly from all
+ *          the threads creation APIs.
+ */
+#define CH_CFG_THREAD_INIT_HOOK(tp) {                                       \
+  /* Add threads initialization code here.*/                                \
+}
+
+/**
+ * @brief   Threads finalization hook.
+ * @details User finalization code added to the @p chThdExit() API.
+ *
+ * @note    It is inserted into lock zone.
+ * @note    It is also invoked when the threads simply return in order to
+ *          terminate.
+ */
+#define CH_CFG_THREAD_EXIT_HOOK(tp) {                                       \
+  /* Add threads finalization code here.*/                                  \
+}
+
+/**
+ * @brief   Context switch hook.
+ * @details This hook is invoked just before switching between threads.
+ */
+#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) {                              \
+  /* System halt code here.*/                                               \
+}
+
+/**
+ * @brief   Idle thread enter hook.
+ * @note    This hook is invoked within a critical zone, no OS functions
+ *          should be invoked from here.
+ * @note    This macro can be used to activate a power saving mode.
+ */
+#define CH_CFG_IDLE_ENTER_HOOK() {                                         \
+}
+
+/**
+ * @brief   Idle thread leave hook.
+ * @note    This hook is invoked within a critical zone, no OS functions
+ *          should be invoked from here.
+ * @note    This macro can be used to deactivate a power saving mode.
+ */
+#define CH_CFG_IDLE_LEAVE_HOOK() {                                         \
+}
+
+/**
+ * @brief   Idle Loop hook.
+ * @details This hook is continuously invoked by the idle thread loop.
+ */
+#define CH_CFG_IDLE_LOOP_HOOK() {                                           \
+  /* Idle loop code here.*/                                                 \
+}
+
+/**
+ * @brief   System tick event hook.
+ * @details This hook is invoked in the system tick handler immediately
+ *          after processing the virtual timers queue.
+ */
+#define CH_CFG_SYSTEM_TICK_HOOK() {                                         \
+  /* System tick event code here.*/                                         \
+}
+
+/**
+ * @brief   System halt hook.
+ * @details This hook is invoked in case to a system halting error before
+ *          the system is halted.
+ */
+#define CH_CFG_SYSTEM_HALT_HOOK(reason) {                                   \
+  /* System halt code here.*/                                               \
+}
+
+/** @} */
+
+/*===========================================================================*/
+/* Port-specific settings (override port settings defaulted in chcore.h).    */
+/*===========================================================================*/
+
+#endif  /* _CHCONF_H_ */
+
+/** @} */
diff --git a/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/extfunc.c b/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/extfunc.c
new file mode 100644
index 000000000..0418e3124
--- /dev/null
+++ b/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/extfunc.c
@@ -0,0 +1,23 @@
+/*
+    ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+float ff1(float par) {
+  return par;
+}
+
+float ff2(float par1, float par2, float par3, float par4) {
+  return (par1 + par2) * (par3 + par4);
+}
diff --git a/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/halconf.h b/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/halconf.h
new file mode 100644
index 000000000..40207d045
--- /dev/null
+++ b/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/halconf.h
@@ -0,0 +1,312 @@
+/*
+    ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+/**
+ * @file    templates/halconf.h
+ * @brief   HAL configuration header.
+ * @details HAL configuration file, this file allows to enable or disable the
+ *          various device drivers from your application. You may also use
+ *          this file in order to override the device drivers default settings.
+ *
+ * @addtogroup HAL_CONF
+ * @{
+ */
+
+#ifndef _HALCONF_H_
+#define _HALCONF_H_
+
+#include "mcuconf.h"
+
+/**
+ * @brief   Enables the PAL subsystem.
+ */
+#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
+#define HAL_USE_PAL                 TRUE
+#endif
+
+/**
+ * @brief   Enables the ADC subsystem.
+ */
+#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
+#define HAL_USE_ADC                 FALSE
+#endif
+
+/**
+ * @brief   Enables the CAN subsystem.
+ */
+#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
+#define HAL_USE_CAN                 FALSE
+#endif
+
+/**
+ * @brief   Enables the EXT subsystem.
+ */
+#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
+#define HAL_USE_EXT                 FALSE
+#endif
+
+/**
+ * @brief   Enables the GPT subsystem.
+ */
+#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
+#define HAL_USE_GPT                 TRUE
+#endif
+
+/**
+ * @brief   Enables the I2C subsystem.
+ */
+#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
+#define HAL_USE_I2C                 FALSE
+#endif
+
+/**
+ * @brief   Enables the I2S subsystem.
+ */
+#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
+#define HAL_USE_I2S                 FALSE
+#endif
+
+/**
+ * @brief   Enables the ICU subsystem.
+ */
+#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
+#define HAL_USE_ICU                 FALSE
+#endif
+
+/**
+ * @brief   Enables the MAC subsystem.
+ */
+#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
+#define HAL_USE_MAC                 FALSE
+#endif
+
+/**
+ * @brief   Enables the MMC_SPI subsystem.
+ */
+#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_MMC_SPI             FALSE
+#endif
+
+/**
+ * @brief   Enables the PWM subsystem.
+ */
+#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
+#define HAL_USE_PWM                 FALSE
+#endif
+
+/**
+ * @brief   Enables the RTC subsystem.
+ */
+#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
+#define HAL_USE_RTC                 FALSE
+#endif
+
+/**
+ * @brief   Enables the SDC subsystem.
+ */
+#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
+#define HAL_USE_SDC                 FALSE
+#endif
+
+/**
+ * @brief   Enables the SERIAL subsystem.
+ */
+#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL              TRUE
+#endif
+
+/**
+ * @brief   Enables the SERIAL over USB subsystem.
+ */
+#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL_USB          FALSE
+#endif
+
+/**
+ * @brief   Enables the SPI subsystem.
+ */
+#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_SPI                 FALSE
+#endif
+
+/**
+ * @brief   Enables the UART subsystem.
+ */
+#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
+#define HAL_USE_UART                FALSE
+#endif
+
+/**
+ * @brief   Enables the USB subsystem.
+ */
+#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
+#define HAL_USE_USB                 FALSE
+#endif
+
+/*===========================================================================*/
+/* ADC driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables synchronous APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
+#define ADC_USE_WAIT                TRUE
+#endif
+
+/**
+ * @brief   Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define ADC_USE_MUTUAL_EXCLUSION    TRUE
+#endif
+
+/*===========================================================================*/
+/* CAN driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Sleep mode related APIs inclusion switch.
+ */
+#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
+#define CAN_USE_SLEEP_MODE          TRUE
+#endif
+
+/*===========================================================================*/
+/* I2C driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables the mutual exclusion APIs on the I2C bus.
+ */
+#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define I2C_USE_MUTUAL_EXCLUSION    TRUE
+#endif
+
+/*===========================================================================*/
+/* MAC driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables an event sources for incoming packets.
+ */
+#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
+#define MAC_USE_ZERO_COPY           FALSE
+#endif
+
+/**
+ * @brief   Enables an event sources for incoming packets.
+ */
+#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
+#define MAC_USE_EVENTS              TRUE
+#endif
+
+/*===========================================================================*/
+/* MMC_SPI driver related settings.                                          */
+/*===========================================================================*/
+
+/**
+ * @brief   Delays insertions.
+ * @details If enabled this options inserts delays into the MMC waiting
+ *          routines releasing some extra CPU time for the threads with
+ *          lower priority, this may slow down the driver a bit however.
+ *          This option is recommended also if the SPI driver does not
+ *          use a DMA channel and heavily loads the CPU.
+ */
+#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
+#define MMC_NICE_WAITING            TRUE
+#endif
+
+/*===========================================================================*/
+/* SDC driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Number of initialization attempts before rejecting the card.
+ * @note    Attempts are performed at 10mS intervals.
+ */
+#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
+#define SDC_INIT_RETRY              100
+#endif
+
+/**
+ * @brief   Include support for MMC cards.
+ * @note    MMC support is not yet implemented so this option must be kept
+ *          at @p FALSE.
+ */
+#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
+#define SDC_MMC_SUPPORT             FALSE
+#endif
+
+/**
+ * @brief   Delays insertions.
+ * @details If enabled this options inserts delays into the MMC waiting
+ *          routines releasing some extra CPU time for the threads with
+ *          lower priority, this may slow down the driver a bit however.
+ */
+#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
+#define SDC_NICE_WAITING            TRUE
+#endif
+
+/*===========================================================================*/
+/* SERIAL driver related settings.                                           */
+/*===========================================================================*/
+
+/**
+ * @brief   Default bit rate.
+ * @details Configuration parameter, this is the baud rate selected for the
+ *          default configuration.
+ */
+#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
+#define SERIAL_DEFAULT_BITRATE      38400
+#endif
+
+/**
+ * @brief   Serial buffers size.
+ * @details Configuration parameter, you can change the depth of the queue
+ *          buffers depending on the requirements of your application.
+ * @note    The default is 64 bytes for both the transmission and receive
+ *          buffers.
+ */
+#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
+#define SERIAL_BUFFERS_SIZE         16
+#endif
+
+/*===========================================================================*/
+/* SPI driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables synchronous APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
+#define SPI_USE_WAIT                TRUE
+#endif
+
+/**
+ * @brief   Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define SPI_USE_MUTUAL_EXCLUSION    TRUE
+#endif
+
+#endif /* _HALCONF_H_ */
+
+/** @} */
diff --git a/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/iar/ch.ewp b/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/iar/ch.ewp
new file mode 100644
index 000000000..186319a4c
--- /dev/null
+++ b/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/iar/ch.ewp
@@ -0,0 +1,2292 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+
+<project>
+  <fileVersion>2</fileVersion>
+  <configuration>
+    <name>Debug</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>21</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>Debug\Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>Debug\Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>Debug\List</state>
+        </option>
+        <option>
+          <name>Variant</name>
+          <version>19</version>
+          <state>38</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input variant</name>
+          <version>3</version>
+          <state>6</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing.</state>
+        </option>
+        <option>
+          <name>Output variant</name>
+          <version>2</version>
+          <state>7</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, no flags.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FPU</name>
+          <version>2</version>
+          <state>5</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the normal configuration of the C/C++ runtime library. No locale interface, C locale, no file descriptor support, no multibytes in printf and scanf, and no hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>5.10.0.159</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>6.30.3.53229</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32F4xxx	ST STM32F4xxx</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave</name>
+          <version>19</version>
+          <state>38</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>19</version>
+          <state>38</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>28</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>0000000</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
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+          <state>.text</state>
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+          <name>CCOptLevelSlave</name>
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+          <state>0</state>
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+          <name>IccCppDialect</name>
+          <state>1</state>
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+        <option>
+          <name>IccExceptions</name>
+          <state>1</state>
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+        <option>
+          <name>IccRTTI</name>
+          <state>1</state>
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+        <option>
+          <name>IccStaticDestr</name>
+          <state>1</state>
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+        <option>
+          <name>IccCppInlineSemantics</name>
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+        <option>
+          <name>IccCmsis</name>
+          <state>1</state>
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+        <option>
+          <name>IccFloatSemantics</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>AARM</name>
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+          <name>ADefines</name>
+          <state></state>
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+          <state>0</state>
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+        <option>
+          <name>PageLength</name>
+          <state>80</state>
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+          <state>8</state>
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+          <name>AXRefInternal</name>
+          <state>0</state>
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+        <option>
+          <name>AXRefDual</name>
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+          <name>AProcessor</name>
+          <state>1</state>
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+        <option>
+          <name>AFpuProcessor</name>
+          <state>1</state>
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+        <option>
+          <name>AOutputFile</name>
+          <state>$FILE_BNAME$.o</state>
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+        <option>
+          <name>AMultibyteSupport</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ALimitErrorsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ALimitErrorsEdit</name>
+          <state>100</state>
+        </option>
+        <option>
+          <name>AIgnoreStdInclude</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AUserIncludes</name>
+          <state>$PROJ_DIR$\..</state>
+          <state>$PROJ_DIR$\..\..\..\..\os\ports\IAR\ARMCMx\STM32f4xx</state>
+          <state>$PROJ_DIR$\..\..\..\..\boards\ST_STM32f4_DISCOVERY</state>
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+        <option>
+          <name>AExtraOptionsCheckV2</name>
+          <state>0</state>
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+        <option>
+          <name>AExtraOptionsV2</name>
+          <state></state>
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+    <settings>
+      <name>OBJCOPY</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>1</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
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+          <name>OOCOutputFormat</name>
+          <version>2</version>
+          <state>0</state>
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+        <option>
+          <name>OCOutputOverride</name>
+          <state>0</state>
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+        <option>
+          <name>OOCOutputFile</name>
+          <state>ch.srec</state>
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+          <name>OOCCommandLineProducer</name>
+          <state>1</state>
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+        <option>
+          <name>OOCObjCopyEnable</name>
+          <state>0</state>
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+      <archiveVersion>3</archiveVersion>
+      <data>
+        <extensions></extensions>
+        <cmdline></cmdline>
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+      <archiveVersion>0</archiveVersion>
+      <data/>
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+    <settings>
+      <name>BUILDACTION</name>
+      <archiveVersion>1</archiveVersion>
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+        <prebuild></prebuild>
+        <postbuild></postbuild>
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+      <archiveVersion>0</archiveVersion>
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+        <version>14</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
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+          <name>IlinkOutputFile</name>
+          <state>ch.out</state>
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+        <option>
+          <name>IlinkLibIOConfig</name>
+          <state>1</state>
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+        <option>
+          <name>XLinkMisraHandler</name>
+          <state>0</state>
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+        <option>
+          <name>IlinkInputFileSlave</name>
+          <state>0</state>
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+        <option>
+          <name>IlinkDebugInfoEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkKeepSymbols</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryFile</name>
+          <state></state>
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+        <option>
+          <name>IlinkRawBinarySymbol</name>
+          <state></state>
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+          <name>IlinkRawBinarySegment</name>
+          <state></state>
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+        <option>
+          <name>IlinkRawBinaryAlign</name>
+          <state></state>
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+        <option>
+          <name>IlinkDefines</name>
+          <state></state>
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+        <option>
+          <name>IlinkConfigDefines</name>
+          <state></state>
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+        <option>
+          <name>IlinkMapFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogInitialization</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogModule</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogSection</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogVeneer</name>
+          <state>0</state>
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+        <option>
+          <name>IlinkIcfOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile</name>
+          <state>$PROJ_DIR$\ch.icf</state>
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+        <option>
+          <name>IlinkIcfFileSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEnableRemarks</name>
+          <state>0</state>
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+        <option>
+          <name>IlinkSuppressDiags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsRem</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsWarn</name>
+          <state></state>
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+        <option>
+          <name>IlinkTreatAsErr</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkWarningsAreErrors</name>
+          <state>0</state>
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+        <option>
+          <name>IlinkUseExtraOptions</name>
+          <state>0</state>
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+        <option>
+          <name>IlinkExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkLowLevelInterfaceSlave</name>
+          <state>1</state>
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+        <option>
+          <name>IlinkAutoLibEnable</name>
+          <state>1</state>
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+        <option>
+          <name>IlinkAdditionalLibs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkOverrideProgramEntryLabel</name>
+          <state>0</state>
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+        <option>
+          <name>IlinkProgramEntryLabelSelect</name>
+          <state>0</state>
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+        <option>
+          <name>IlinkProgramEntryLabel</name>
+          <state>__iar_program_start</state>
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+          <name>DoFill</name>
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+          <state>0xFF</state>
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+          <name>FillerStart</name>
+          <state>0x0</state>
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+          <version>0</version>
+          <state>1</state>
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+          <name>CrcAlign</name>
+          <state>1</state>
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+          <name>CrcAlgo</name>
+          <state>1</state>
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+          <state>0x11021</state>
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+          <name>CrcBitOrder</name>
+          <version>0</version>
+          <state>0</state>
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+        <option>
+          <name>CrcInitialValue</name>
+          <state>0x0</state>
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+        <option>
+          <name>DoCrc</name>
+          <state>0</state>
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+        <option>
+          <name>IlinkBE8Slave</name>
+          <state>1</state>
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+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
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+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
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+        <option>
+          <name>CrcFullSize</name>
+          <state>0</state>
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+        <option>
+          <name>IlinkIElfToolPostProcess</name>
+          <state>0</state>
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+        <option>
+          <name>IlinkLogAutoLibSelect</name>
+          <state>0</state>
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+        <option>
+          <name>IlinkLogRedirSymbols</name>
+          <state>0</state>
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+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
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+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
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+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
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+        <option>
+          <name>IlinkOptInline</name>
+          <state>0</state>
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+        <option>
+          <name>IlinkOptExceptionsAllow</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsForce</name>
+          <state>0</state>
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+        <option>
+          <name>IlinkCmsis</name>
+          <state>1</state>
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+        <option>
+          <name>IlinkOptMergeDuplSections</name>
+          <state>0</state>
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+        <option>
+          <name>IlinkOptUseVfe</name>
+          <state>1</state>
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+        <option>
+          <name>IlinkOptForceVfe</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
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+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
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+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
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+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
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+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
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+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data/>
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+  <configuration>
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+    <toolchain>
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+    <debug>0</debug>
+    <settings>
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+        <version>21</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>ExePath</name>
+          <state>Release\Exe</state>
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+        <option>
+          <name>ObjPath</name>
+          <state>Release\Obj</state>
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+        <option>
+          <name>ListPath</name>
+          <state>Release\List</state>
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+        <option>
+          <name>Variant</name>
+          <version>19</version>
+          <state>38</state>
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+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
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+        <option>
+          <name>Input variant</name>
+          <version>3</version>
+          <state>6</state>
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+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing.</state>
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+        <option>
+          <name>Output variant</name>
+          <version>2</version>
+          <state>7</state>
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+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A, no specifier n, no float nor long long, no flags.</state>
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+        <option>
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+          <state>0</state>
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+        <option>
+          <name>FPU</name>
+          <version>2</version>
+          <state>5</state>
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+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
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+        <option>
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+          <version>0</version>
+          <state>1</state>
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+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>1</state>
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+        <option>
+          <name>RTDescription</name>
+          <state>Use the normal configuration of the C/C++ runtime library. No locale interface, C locale, no file descriptor support, no multibytes in printf and scanf, and no hex floats in strtod.</state>
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+        <option>
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+          <state>5.10.0.159</state>
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+        <option>
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+          <state>0</state>
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+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>STM32F4xxx	ST STM32F4xxx</state>
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+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>0</state>
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+        </option>
+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data/>
+    </settings>
+  </configuration>
+  <group>
+    <name>board</name>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\..\boards\ST_STM32f4_DISCOVERY\board.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\..\boards\ST_STM32f4_DISCOVERY\board.h</name>
+    </file>
+  </group>
+  <group>
+    <name>os</name>
+    <group>
+      <name>hal</name>
+      <group>
+        <name>include</name>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\hal\include\adc.h</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\hal\include\can.h</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\hal\include\ext.h</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\hal\include\gpt.h</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\hal\include\hal.h</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\hal\include\i2c.h</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\hal\include\icu.h</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\hal\include\mac.h</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\hal\include\mii.h</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\hal\include\mmc_spi.h</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\hal\include\pal.h</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\hal\include\pwm.h</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\hal\include\rtc.h</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\hal\include\sdc.h</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\hal\include\serial.h</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\hal\include\serial_usb.h</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\hal\include\spi.h</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\hal\include\tm.h</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\hal\include\uart.h</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\hal\include\usb.h</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\hal\include\usb_cdc.h</name>
+        </file>
+      </group>
+      <group>
+        <name>src</name>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\hal\src\adc.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\hal\src\can.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\hal\src\ext.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\hal\src\gpt.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\hal\src\hal.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\hal\src\i2c.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\hal\src\icu.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\hal\src\mac.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\hal\src\mmc_spi.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\hal\src\pal.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\hal\src\pwm.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\hal\src\rtc.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\hal\src\sdc.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\hal\src\serial.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\hal\src\serial_usb.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\hal\src\spi.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\hal\src\tm.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\hal\src\uart.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\hal\src\usb.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>kernel</name>
+      <group>
+        <name>include</name>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\kernel\include\ch.h</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\kernel\include\chcond.h</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\kernel\include\chdebug.h</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\kernel\include\chdynamic.h</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\kernel\include\chevents.h</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\kernel\include\chheap.h</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\kernel\include\chinline.h</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\kernel\include\chioch.h</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\kernel\include\chlists.h</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\kernel\include\chmboxes.h</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\kernel\include\chmemcore.h</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\kernel\include\chmempools.h</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\kernel\include\chmsg.h</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\kernel\include\chmtx.h</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\kernel\include\chqueues.h</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\kernel\include\chregistry.h</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\kernel\include\chschd.h</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\kernel\include\chsem.h</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\kernel\include\chstreams.h</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\kernel\include\chsys.h</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\kernel\include\chthreads.h</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\kernel\include\chvt.h</name>
+        </file>
+      </group>
+      <group>
+        <name>src</name>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\kernel\src\chcond.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\kernel\src\chdebug.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\kernel\src\chdynamic.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\kernel\src\chevents.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\kernel\src\chheap.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\kernel\src\chlists.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\kernel\src\chmboxes.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\kernel\src\chmemcore.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\kernel\src\chmempools.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\kernel\src\chmsg.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\kernel\src\chmtx.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\kernel\src\chqueues.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\kernel\src\chregistry.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\kernel\src\chschd.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\kernel\src\chsem.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\kernel\src\chsys.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\kernel\src\chthreads.c</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\kernel\src\chvt.c</name>
+        </file>
+      </group>
+    </group>
+    <group>
+      <name>platform</name>
+      <file>
+        <name>$PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\gpt_lld.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\gpt_lld.h</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32f4xx\hal_lld.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32f4xx\hal_lld.h</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\GPIOv2\pal_lld.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\GPIOv2\pal_lld.h</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\USARTv1\serial_lld.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\USARTv1\serial_lld.h</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\SPIv1\spi_lld.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\SPIv1\spi_lld.h</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32f4xx\stm32_dma.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32f4xx\stm32_dma.h</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32f4xx\stm32f4xx.h</name>
+      </file>
+    </group>
+    <group>
+      <name>port</name>
+      <group>
+        <name>STM32F4xx</name>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\ports\IAR\ARMCMx\STM32f4xx\cmparams.h</name>
+        </file>
+        <file>
+          <name>$PROJ_DIR$\..\..\..\..\os\ports\IAR\ARMCMx\STM32f4xx\vectors.s</name>
+        </file>
+      </group>
+      <file>
+        <name>$PROJ_DIR$\..\..\..\..\os\ports\IAR\ARMCMx\chcore.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$\..\..\..\..\os\ports\IAR\ARMCMx\chcore.h</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$\..\..\..\..\os\ports\IAR\ARMCMx\chcore_v7m.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$\..\..\..\..\os\ports\IAR\ARMCMx\chcore_v7m.h</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$\..\..\..\..\os\ports\IAR\ARMCMx\chcoreasm_v7m.s</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$\..\..\..\..\os\ports\IAR\ARMCMx\chtypes.h</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$\..\..\..\..\os\ports\IAR\ARMCMx\cstartup.s</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$\..\..\..\..\os\ports\common\ARMCMx\nvic.c</name>
+      </file>
+      <file>
+        <name>$PROJ_DIR$\..\..\..\..\os\ports\common\ARMCMx\nvic.h</name>
+      </file>
+    </group>
+  </group>
+  <group>
+    <name>test</name>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\..\test\test.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\..\test\test.h</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\..\test\testbmk.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\..\test\testbmk.h</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\..\test\testdyn.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\..\test\testdyn.h</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\..\test\testevt.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\..\test\testevt.h</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\..\test\testheap.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\..\test\testheap.h</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\..\test\testmbox.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\..\test\testmbox.h</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\..\test\testmsg.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\..\test\testmsg.h</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\..\test\testmtx.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\..\test\testmtx.h</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\..\test\testpools.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\..\test\testpools.h</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\..\test\testqueues.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\..\test\testqueues.h</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\..\test\testsem.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\..\test\testsem.h</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\..\test\testthd.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\..\test\testthd.h</name>
+    </file>
+  </group>
+  <file>
+    <name>$PROJ_DIR$\..\chconf.h</name>
+  </file>
+  <file>
+    <name>$PROJ_DIR$\..\extfunc.c</name>
+  </file>
+  <file>
+    <name>$PROJ_DIR$\..\halconf.h</name>
+  </file>
+  <file>
+    <name>$PROJ_DIR$\..\main.c</name>
+  </file>
+  <file>
+    <name>$PROJ_DIR$\..\mcuconf.h</name>
+  </file>
+</project>
+
+
diff --git a/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/iar/ch.eww b/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/iar/ch.eww
new file mode 100644
index 000000000..f9b3b2000
--- /dev/null
+++ b/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/iar/ch.eww
@@ -0,0 +1,10 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+
+<workspace>
+  <project>
+    <path>$WS_DIR$\ch.ewp</path>
+  </project>
+  <batchBuild/>
+</workspace>
+
+
diff --git a/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/iar/ch.icf b/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/iar/ch.icf
new file mode 100644
index 000000000..c0a51f44c
--- /dev/null
+++ b/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/iar/ch.icf
@@ -0,0 +1,39 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__   = 0x0801FFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__   = 0x2001FFFF;
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__   = 0x400;
+/**** End of ICF editor section. ###ICF###*/
+
+/* Size of the IRQ Stack (Main Stack).*/
+define symbol __ICFEDIT_size_irqstack__   = 0x400;
+
+define memory mem with size = 4G;
+define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   {section CSTACK};
+define block IRQSTACK  with alignment = 8, size = __ICFEDIT_size_irqstack__ {};
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     {};
+define block SYSHEAP   with alignment = 8                                   {section SYSHEAP};
+define block DATABSS with alignment = 8 {readwrite, zeroinit};
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+keep { section .intvec };
+
+place at address mem:__ICFEDIT_intvec_start__ {section .intvec};
+place in ROM_region                           {readonly};
+place at start of RAM_region                  {block IRQSTACK};
+place in RAM_region                           {block DATABSS, block HEAP};
+place in RAM_region                           {block SYSHEAP};
+place at end of RAM_region                    {block CSTACK};
diff --git a/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/keil/ch.uvproj b/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/keil/ch.uvproj
new file mode 100644
index 000000000..0f02f5523
--- /dev/null
+++ b/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/keil/ch.uvproj
@@ -0,0 +1,945 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
+
+  <SchemaVersion>1.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>Demo</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32F407VG</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <Cpu>IRAM(0x20000000-0x2001FFFF) IRAM2(0x10000000-0x1000FFFF) IROM(0x8000000-0x80FFFFF) CLOCK(25000000) CPUTYPE("Cortex-M4") FPU2</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile>"Startup\ST\STM32F4xx\startup_stm32f4xx.s" ("STM32F4xx Startup Code")</StartupFile>
+          <FlashDriverDll>UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024 -FS08000000 -FL0100000)</FlashDriverDll>
+          <DeviceId>6103</DeviceId>
+          <RegisterFile>stm32f4xx.h</RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>SFD\ST\STM32F4xx\STM32F4xx.sfr</SFDFile>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath>ST\STM32F4xx\</RegisterFilePath>
+          <DBRegisterFilePath>ST\STM32F4xx\</DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
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+            <File>
+              <FileName>chqueues.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\..\..\os\kernel\include\chqueues.h</FilePath>
+            </File>
+            <File>
+              <FileName>chregistry.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\..\..\os\kernel\include\chregistry.h</FilePath>
+            </File>
+            <File>
+              <FileName>chschd.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\..\..\os\kernel\include\chschd.h</FilePath>
+            </File>
+            <File>
+              <FileName>chsem.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\..\..\os\kernel\include\chsem.h</FilePath>
+            </File>
+            <File>
+              <FileName>chstreams.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\..\..\os\kernel\include\chstreams.h</FilePath>
+            </File>
+            <File>
+              <FileName>chsys.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\..\..\os\kernel\include\chsys.h</FilePath>
+            </File>
+            <File>
+              <FileName>chthreads.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\..\..\os\kernel\include\chthreads.h</FilePath>
+            </File>
+            <File>
+              <FileName>chvt.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\..\..\os\kernel\include\chvt.h</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>hal</GroupName>
+          <Files>
+            <File>
+              <FileName>hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\os\hal\src\hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>pal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\os\hal\src\pal.c</FilePath>
+            </File>
+            <File>
+              <FileName>serial.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\os\hal\src\serial.c</FilePath>
+            </File>
+            <File>
+              <FileName>hal.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\..\..\os\hal\include\hal.h</FilePath>
+            </File>
+            <File>
+              <FileName>pal.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\..\..\os\hal\include\pal.h</FilePath>
+            </File>
+            <File>
+              <FileName>serial.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\..\..\os\hal\include\serial.h</FilePath>
+            </File>
+            <File>
+              <FileName>gpt.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\..\..\os\hal\include\gpt.h</FilePath>
+            </File>
+            <File>
+              <FileName>gpt.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\os\hal\src\gpt.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>platform</GroupName>
+          <Files>
+            <File>
+              <FileName>gpt_lld.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\..\..\os\hal\platforms\STM32\gpt_lld.h</FilePath>
+            </File>
+            <File>
+              <FileName>gpt_lld.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\os\hal\platforms\STM32\gpt_lld.c</FilePath>
+            </File>
+            <File>
+              <FileName>hal_lld.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\os\hal\platforms\STM32F4xx\hal_lld.c</FilePath>
+            </File>
+            <File>
+              <FileName>hal_lld.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\..\..\os\hal\platforms\STM32F4xx\hal_lld.h</FilePath>
+            </File>
+            <File>
+              <FileName>pal_lld.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\os\hal\platforms\STM32\GPIOv2\pal_lld.c</FilePath>
+            </File>
+            <File>
+              <FileName>pal_lld.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\..\..\os\hal\platforms\STM32\GPIOv2\pal_lld.h</FilePath>
+            </File>
+            <File>
+              <FileName>serial_lld.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\os\hal\platforms\STM32\USARTv1\serial_lld.c</FilePath>
+            </File>
+            <File>
+              <FileName>serial_lld.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\..\..\os\hal\platforms\STM32\USARTv1\serial_lld.h</FilePath>
+            </File>
+            <File>
+              <FileName>stm32_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\os\hal\platforms\STM32F4xx\stm32_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32_dma.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\..\..\os\hal\platforms\STM32F4xx\stm32_dma.h</FilePath>
+            </File>
+            <File>
+              <FileName>stm32_rcc.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\..\..\os\hal\platforms\STM32F4xx\stm32_rcc.h</FilePath>
+            </File>
+            <File>
+              <FileName>stm32l1xx.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\..\..\os\hal\platforms\STM32F4xx\stm32l1xx.h</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>test</GroupName>
+          <Files>
+            <File>
+              <FileName>test.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\test\test.c</FilePath>
+            </File>
+            <File>
+              <FileName>testbmk.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\test\testbmk.c</FilePath>
+            </File>
+            <File>
+              <FileName>testdyn.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\test\testdyn.c</FilePath>
+            </File>
+            <File>
+              <FileName>testevt.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\test\testevt.c</FilePath>
+            </File>
+            <File>
+              <FileName>testheap.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\test\testheap.c</FilePath>
+            </File>
+            <File>
+              <FileName>testmbox.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\test\testmbox.c</FilePath>
+            </File>
+            <File>
+              <FileName>testmsg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\test\testmsg.c</FilePath>
+            </File>
+            <File>
+              <FileName>testmtx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\test\testmtx.c</FilePath>
+            </File>
+            <File>
+              <FileName>testpools.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\test\testpools.c</FilePath>
+            </File>
+            <File>
+              <FileName>testqueues.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\test\testqueues.c</FilePath>
+            </File>
+            <File>
+              <FileName>testsem.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\test\testsem.c</FilePath>
+            </File>
+            <File>
+              <FileName>testthd.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\test\testthd.c</FilePath>
+            </File>
+            <File>
+              <FileName>test.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\..\..\test\test.h</FilePath>
+            </File>
+            <File>
+              <FileName>testbmk.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\..\..\test\testbmk.h</FilePath>
+            </File>
+            <File>
+              <FileName>testdyn.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\..\..\test\testdyn.h</FilePath>
+            </File>
+            <File>
+              <FileName>testevt.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\..\..\test\testevt.h</FilePath>
+            </File>
+            <File>
+              <FileName>testheap.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\..\..\test\testheap.h</FilePath>
+            </File>
+            <File>
+              <FileName>testmbox.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\..\..\test\testmbox.h</FilePath>
+            </File>
+            <File>
+              <FileName>testmsg.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\..\..\test\testmsg.h</FilePath>
+            </File>
+            <File>
+              <FileName>testmtx.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\..\..\test\testmtx.h</FilePath>
+            </File>
+            <File>
+              <FileName>testpools.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\..\..\test\testpools.h</FilePath>
+            </File>
+            <File>
+              <FileName>testqueues.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\..\..\test\testqueues.h</FilePath>
+            </File>
+            <File>
+              <FileName>testsem.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\..\..\test\testsem.h</FilePath>
+            </File>
+            <File>
+              <FileName>testthd.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\..\..\test\testthd.h</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>demo</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\main.c</FilePath>
+            </File>
+            <File>
+              <FileName>mcuconf.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\mcuconf.h</FilePath>
+            </File>
+            <File>
+              <FileName>chconf.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\chconf.h</FilePath>
+            </File>
+            <File>
+              <FileName>halconf.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\halconf.h</FilePath>
+            </File>
+            <File>
+              <FileName>extfunc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\extfunc.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+</Project>
diff --git a/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/main.c b/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/main.c
new file mode 100644
index 000000000..7ec769a9c
--- /dev/null
+++ b/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/main.c
@@ -0,0 +1,304 @@
+/*
+    ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+#include <stdlib.h>
+
+#include "ch.h"
+#include "hal.h"
+
+float ff1(float par);
+
+float ff2(float par1, float par2, float par3, float par4);
+
+/*===========================================================================*/
+/* Configurable settings.                                                    */
+/*===========================================================================*/
+
+#ifndef RANDOMIZE
+#define RANDOMIZE       FALSE
+#endif
+
+#ifndef ITERATIONS
+#define ITERATIONS      100
+#endif
+
+/*===========================================================================*/
+/* Test related code.                                                        */
+/*===========================================================================*/
+
+static bool saturated;
+
+/*
+ * Test worker thread.
+ */
+static THD_WORKING_AREA(waWorkerThread, 128);
+static msg_t WorkerThread(void *arg) {
+
+  (void)arg;
+
+  while(1) {
+    float f1, f2, f3, f4, f5;
+
+    f1 = ff1(3.0f);
+    f2 = ff1(4.0f);
+    f3 = ff1(5.0f);
+    f5 = f1 + f2 + f3;
+    f4 = ff1(6.0f);
+    f5 = ff2(f5, f4, f5, f4);
+    if (f5 != 324.0f)
+      chSysHalt("float corrupion #1");
+  }
+}
+
+/*
+ * Test periodic thread.
+ */
+static THD_WORKING_AREA(waPeriodicThread, 128);
+static msg_t PeriodicThread(void *arg) {
+
+  (void)arg;
+
+  while(1) {
+    float f1, f2, f3, f4, f5;
+
+    f1 = ff1(4.0f);
+    f2 = ff1(5.0f);
+    f3 = ff1(6.0f);
+    f5 = f1 + f2 + f3;
+    f4 = ff1(7.0f);
+    f5 = ff2(f5, f4, f5, f4);
+    if (f5 != 484.0f)
+      chSysHalt("float corrupion #2");
+    chThdSleepSeconds(1);
+  }
+}
+
+/*
+ * GPT2 callback.
+ */
+static void gpt4cb(GPTDriver *gptp) {
+  float f1, f2, f3, f4, f5;
+
+  (void)gptp;
+
+  f1 = ff1(2.0f);
+  f2 = ff1(3.0f);
+  f3 = ff1(4.0f);
+  f5 = f1 + f2 + f3;
+  f4 = ff1(5.0f);
+  f5 = ff2(f5, f4, f5, f4);
+  if (f5 != 196.0f)
+    chSysHalt("float corrupion #3");
+}
+
+/*
+ * GPT3 callback.
+ */
+static void gpt3cb(GPTDriver *gptp) {
+  float f1, f2, f3, f4, f5;
+
+  (void)gptp;
+
+  f1 = ff1(1.0f);
+  f2 = ff1(2.0f);
+  f3 = ff1(3.0f);
+  f5 = f1 + f2 + f3;
+  f4 = ff1(4.0f);
+  f5 = ff2(f5, f4, f5, f4);
+  if (f5 != 100.0f)
+    chSysHalt("float corrupion #4");
+}
+
+/*
+ * GPT2 configuration.
+ */
+static const GPTConfig gpt4cfg = {
+  1000000,  /* 1MHz timer clock.*/
+  gpt4cb,   /* Timer callback.*/
+  0,
+  0
+};
+
+/*
+ * GPT3 configuration.
+ */
+static const GPTConfig gpt3cfg = {
+  1000000,  /* 1MHz timer clock.*/
+  gpt3cb,   /* Timer callback.*/
+  0,
+  0
+};
+
+
+/*===========================================================================*/
+/* Generic demo code.                                                        */
+/*===========================================================================*/
+
+static void print(char *p) {
+
+  while (*p) {
+    chSequentialStreamPut(&SD2, *p++);
+  }
+}
+
+static void println(char *p) {
+
+  while (*p) {
+    chSequentialStreamPut(&SD2, *p++);
+  }
+  chSequentialStreamWrite(&SD2, (uint8_t *)"\r\n", 2);
+}
+
+static void printn(uint32_t n) {
+  char buf[16], *p;
+
+  if (!n)
+    chSequentialStreamPut(&SD2, '0');
+  else {
+    p = buf;
+    while (n)
+      *p++ = (n % 10) + '0', n /= 10;
+    while (p > buf)
+      chSequentialStreamPut(&SD2, *--p);
+  }
+}
+
+/*
+ * Application entry point.
+ */
+int main(void) {
+  unsigned i;
+  gptcnt_t interval, threshold, worst;
+
+  /*
+   * System initializations.
+   * - HAL initialization, this also initializes the configured device drivers
+   *   and performs the board-specific initializations.
+   * - Kernel initialization, the main() function becomes a thread and the
+   *   RTOS is active.
+   */
+  halInit();
+  chSysInit();
+
+  /*
+   * Prepares the Serial driver 2 and GPT drivers 2 and 3.
+   */
+  sdStart(&SD2, NULL);          /* Default is 38400-8-N-1.*/
+  palSetPadMode(GPIOA, 2, PAL_MODE_ALTERNATE(7));
+  palSetPadMode(GPIOA, 3, PAL_MODE_ALTERNATE(7));
+  gptStart(&GPTD4, &gpt4cfg);
+  gptStart(&GPTD3, &gpt3cfg);
+
+  /*
+   * Initializes the worker threads.
+   */
+  chThdCreateStatic(waWorkerThread, sizeof waWorkerThread,
+                    NORMALPRIO - 20, WorkerThread, NULL);
+  chThdCreateStatic(waPeriodicThread, sizeof waPeriodicThread,
+                    NORMALPRIO - 10, PeriodicThread, NULL);
+
+  /*
+   * Test procedure.
+   */
+  println("");
+  println("*** ChibiOS/RT IRQ-STORM-FPU long duration test");
+  println("***");
+  print("*** Kernel:       ");
+  println(CH_KERNEL_VERSION);
+  print("*** Compiled:     ");
+  println(__DATE__ " - " __TIME__);
+#ifdef PORT_COMPILER_NAME
+  print("*** Compiler:     ");
+  println(PORT_COMPILER_NAME);
+#endif
+  print("*** Architecture: ");
+  println(PORT_ARCHITECTURE_NAME);
+#ifdef PORT_CORE_VARIANT_NAME
+  print("*** Core Variant: ");
+  println(PORT_CORE_VARIANT_NAME);
+#endif
+#ifdef PORT_INFO
+  print("*** Port Info:    ");
+  println(PORT_INFO);
+#endif
+#ifdef PLATFORM_NAME
+  print("*** Platform:     ");
+  println(PLATFORM_NAME);
+#endif
+#ifdef BOARD_NAME
+  print("*** Test Board:   ");
+  println(BOARD_NAME);
+#endif
+  println("***");
+  print("*** System Clock: ");
+  printn(STM32_SYSCLK);
+  println("");
+  print("*** Iterations:   ");
+  printn(ITERATIONS);
+  println("");
+  print("*** Randomize:    ");
+  printn(RANDOMIZE);
+  println("");
+
+  println("");
+  worst = 0;
+  for (i = 1; i <= ITERATIONS; i++){
+    print("Iteration ");
+    printn(i);
+    println("");
+    saturated = FALSE;
+    threshold = 0;
+    for (interval = 2000; interval >= 10; interval -= interval / 10) {
+      gptStartContinuous(&GPTD4, interval - 1); /* Slightly out of phase.*/
+      gptStartContinuous(&GPTD3, interval + 1); /* Slightly out of phase.*/
+      chThdSleepMilliseconds(1000);
+      gptStopTimer(&GPTD4);
+      gptStopTimer(&GPTD3);
+      if (!saturated)
+        print(".");
+      else {
+        print("#");
+        if (threshold == 0)
+          threshold = interval;
+      }
+    }
+    /* Gives the worker threads a chance to empty the mailboxes before next
+       cycle.*/
+    chThdSleepMilliseconds(20);
+    println("");
+    print("Saturated at ");
+    printn(threshold);
+    println(" uS");
+    println("");
+    if (threshold > worst)
+      worst = threshold;
+  }
+  gptStopTimer(&GPTD4);
+  gptStopTimer(&GPTD3);
+
+  print("Worst case at ");
+  printn(worst);
+  println(" uS");
+  println("");
+  println("Test Complete");
+
+  /*
+   * Normal main() thread activity, nothing in this test.
+   */
+  while (TRUE) {
+    chThdSleepMilliseconds(5000);
+  }
+}
diff --git a/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/mcuconf.h b/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/mcuconf.h
new file mode 100644
index 000000000..9fca1da26
--- /dev/null
+++ b/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/mcuconf.h
@@ -0,0 +1,304 @@
+/*
+    ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+/*
+ * STM32F4xx drivers configuration.
+ * The following settings override the default settings present in
+ * the various device driver implementation headers.
+ * Note that the settings for each driver only have effect if the whole
+ * driver is enabled in halconf.h.
+ *
+ * IRQ priorities:
+ * 15...0       Lowest...Highest.
+ *
+ * DMA priorities:
+ * 0...3        Lowest...Highest.
+ */
+
+#define STM32F4xx_MCUCONF
+
+/*
+ * HAL driver system settings.
+ */
+#define STM32_NO_INIT                       FALSE
+#define STM32_HSI_ENABLED                   TRUE
+#define STM32_LSI_ENABLED                   TRUE
+#define STM32_HSE_ENABLED                   TRUE
+#define STM32_LSE_ENABLED                   FALSE
+#define STM32_CLOCK48_REQUIRED              TRUE
+#define STM32_SW                            STM32_SW_PLL
+#define STM32_PLLSRC                        STM32_PLLSRC_HSE
+#define STM32_PLLM_VALUE                    8
+#define STM32_PLLN_VALUE                    336
+#define STM32_PLLP_VALUE                    2
+#define STM32_PLLQ_VALUE                    7
+#define STM32_HPRE                          STM32_HPRE_DIV1
+#define STM32_PPRE1                         STM32_PPRE1_DIV4
+#define STM32_PPRE2                         STM32_PPRE2_DIV2
+#define STM32_RTCSEL                        STM32_RTCSEL_LSI
+#define STM32_RTCPRE_VALUE                  8
+#define STM32_MCO1SEL                       STM32_MCO1SEL_HSI
+#define STM32_MCO1PRE                       STM32_MCO1PRE_DIV1
+#define STM32_MCO2SEL                       STM32_MCO2SEL_SYSCLK
+#define STM32_MCO2PRE                       STM32_MCO2PRE_DIV5
+#define STM32_I2SSRC                        STM32_I2SSRC_CKIN
+#define STM32_PLLI2SN_VALUE                 192
+#define STM32_PLLI2SR_VALUE                 5
+#define STM32_PVD_ENABLE                    FALSE
+#define STM32_PLS                           STM32_PLS_LEV0
+#define STM32_BKPRAM_ENABLE                 FALSE
+
+/*
+ * ADC driver system settings.
+ */
+#define STM32_ADC_ADCPRE                    ADC_CCR_ADCPRE_DIV4
+#define STM32_ADC_USE_ADC1                  FALSE
+#define STM32_ADC_USE_ADC2                  FALSE
+#define STM32_ADC_USE_ADC3                  FALSE
+#define STM32_ADC_ADC1_DMA_STREAM           STM32_DMA_STREAM_ID(2, 4)
+#define STM32_ADC_ADC2_DMA_STREAM           STM32_DMA_STREAM_ID(2, 2)
+#define STM32_ADC_ADC3_DMA_STREAM           STM32_DMA_STREAM_ID(2, 1)
+#define STM32_ADC_ADC1_DMA_PRIORITY         2
+#define STM32_ADC_ADC2_DMA_PRIORITY         2
+#define STM32_ADC_ADC3_DMA_PRIORITY         2
+#define STM32_ADC_IRQ_PRIORITY              6
+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     6
+#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     6
+#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     6
+
+/*
+ * CAN driver system settings.
+ */
+#define STM32_CAN_USE_CAN1                  FALSE
+#define STM32_CAN_USE_CAN2                  FALSE
+#define STM32_CAN_CAN1_IRQ_PRIORITY         11
+#define STM32_CAN_CAN2_IRQ_PRIORITY         11
+
+/*
+ * EXT driver system settings.
+ */
+#define STM32_EXT_EXTI0_IRQ_PRIORITY        6
+#define STM32_EXT_EXTI1_IRQ_PRIORITY        6
+#define STM32_EXT_EXTI2_IRQ_PRIORITY        6
+#define STM32_EXT_EXTI3_IRQ_PRIORITY        6
+#define STM32_EXT_EXTI4_IRQ_PRIORITY        6
+#define STM32_EXT_EXTI5_9_IRQ_PRIORITY      6
+#define STM32_EXT_EXTI10_15_IRQ_PRIORITY    6
+#define STM32_EXT_EXTI16_IRQ_PRIORITY       6
+#define STM32_EXT_EXTI17_IRQ_PRIORITY       15
+#define STM32_EXT_EXTI18_IRQ_PRIORITY       6
+#define STM32_EXT_EXTI19_IRQ_PRIORITY       6
+#define STM32_EXT_EXTI20_IRQ_PRIORITY       6
+#define STM32_EXT_EXTI21_IRQ_PRIORITY       15
+#define STM32_EXT_EXTI22_IRQ_PRIORITY       15
+
+/*
+ * GPT driver system settings.
+ */
+#define STM32_GPT_USE_TIM1                  FALSE
+#define STM32_GPT_USE_TIM2                  FALSE
+#define STM32_GPT_USE_TIM3                  TRUE
+#define STM32_GPT_USE_TIM4                  TRUE
+#define STM32_GPT_USE_TIM5                  FALSE
+#define STM32_GPT_USE_TIM6                  FALSE
+#define STM32_GPT_USE_TIM7                  FALSE
+#define STM32_GPT_USE_TIM8                  FALSE
+#define STM32_GPT_USE_TIM9                  FALSE
+#define STM32_GPT_USE_TIM11                 FALSE
+#define STM32_GPT_USE_TIM12                 FALSE
+#define STM32_GPT_USE_TIM14                 FALSE
+#define STM32_GPT_TIM1_IRQ_PRIORITY         7
+#define STM32_GPT_TIM2_IRQ_PRIORITY         7
+#define STM32_GPT_TIM3_IRQ_PRIORITY         10
+#define STM32_GPT_TIM4_IRQ_PRIORITY         6
+#define STM32_GPT_TIM5_IRQ_PRIORITY         7
+#define STM32_GPT_TIM6_IRQ_PRIORITY         7
+#define STM32_GPT_TIM7_IRQ_PRIORITY         7
+#define STM32_GPT_TIM8_IRQ_PRIORITY         7
+#define STM32_GPT_TIM9_IRQ_PRIORITY         7
+#define STM32_GPT_TIM11_IRQ_PRIORITY        7
+#define STM32_GPT_TIM12_IRQ_PRIORITY        7
+#define STM32_GPT_TIM14_IRQ_PRIORITY        7
+
+/*
+ * I2C driver system settings.
+ */
+#define STM32_I2C_USE_I2C1                  FALSE
+#define STM32_I2C_USE_I2C2                  FALSE
+#define STM32_I2C_USE_I2C3                  FALSE
+#define STM32_I2C_BUSY_TIMEOUT              50
+#define STM32_I2C_I2C1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 0)
+#define STM32_I2C_I2C1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 6)
+#define STM32_I2C_I2C2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)
+#define STM32_I2C_I2C2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)
+#define STM32_I2C_I2C3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)
+#define STM32_I2C_I2C3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)
+#define STM32_I2C_I2C1_IRQ_PRIORITY         5
+#define STM32_I2C_I2C2_IRQ_PRIORITY         5
+#define STM32_I2C_I2C3_IRQ_PRIORITY         5
+#define STM32_I2C_I2C1_DMA_PRIORITY         3
+#define STM32_I2C_I2C2_DMA_PRIORITY         3
+#define STM32_I2C_I2C3_DMA_PRIORITY         3
+#define STM32_I2C_DMA_ERROR_HOOK(i2cp)      osalSysHalt("DMA failure")
+
+/*
+ * ICU driver system settings.
+ */
+#define STM32_ICU_USE_TIM1                  FALSE
+#define STM32_ICU_USE_TIM2                  FALSE
+#define STM32_ICU_USE_TIM3                  FALSE
+#define STM32_ICU_USE_TIM4                  FALSE
+#define STM32_ICU_USE_TIM5                  FALSE
+#define STM32_ICU_USE_TIM8                  FALSE
+#define STM32_ICU_USE_TIM9                  FALSE
+#define STM32_ICU_TIM1_IRQ_PRIORITY         7
+#define STM32_ICU_TIM2_IRQ_PRIORITY         7
+#define STM32_ICU_TIM3_IRQ_PRIORITY         7
+#define STM32_ICU_TIM4_IRQ_PRIORITY         7
+#define STM32_ICU_TIM5_IRQ_PRIORITY         7
+#define STM32_ICU_TIM8_IRQ_PRIORITY         7
+#define STM32_ICU_TIM9_IRQ_PRIORITY         7
+
+/*
+ * MAC driver system settings.
+ */
+#define STM32_MAC_TRANSMIT_BUFFERS          2
+#define STM32_MAC_RECEIVE_BUFFERS           4
+#define STM32_MAC_BUFFERS_SIZE              1522
+#define STM32_MAC_PHY_TIMEOUT               100
+#define STM32_MAC_ETH1_CHANGE_PHY_STATE     TRUE
+#define STM32_MAC_ETH1_IRQ_PRIORITY         13
+#define STM32_MAC_IP_CHECKSUM_OFFLOAD       0
+
+/*
+ * PWM driver system settings.
+ */
+#define STM32_PWM_USE_ADVANCED              FALSE
+#define STM32_PWM_USE_TIM1                  FALSE
+#define STM32_PWM_USE_TIM2                  FALSE
+#define STM32_PWM_USE_TIM3                  FALSE
+#define STM32_PWM_USE_TIM4                  FALSE
+#define STM32_PWM_USE_TIM5                  FALSE
+#define STM32_PWM_USE_TIM8                  FALSE
+#define STM32_PWM_USE_TIM9                  FALSE
+#define STM32_PWM_TIM1_IRQ_PRIORITY         7
+#define STM32_PWM_TIM2_IRQ_PRIORITY         7
+#define STM32_PWM_TIM3_IRQ_PRIORITY         7
+#define STM32_PWM_TIM4_IRQ_PRIORITY         7
+#define STM32_PWM_TIM5_IRQ_PRIORITY         7
+#define STM32_PWM_TIM8_IRQ_PRIORITY         7
+#define STM32_PWM_TIM9_IRQ_PRIORITY         7
+
+/*
+ * SDC driver system settings.
+ */
+#define STM32_SDC_SDIO_DMA_PRIORITY         3
+#define STM32_SDC_SDIO_IRQ_PRIORITY         9
+#define STM32_SDC_WRITE_TIMEOUT_MS          250
+#define STM32_SDC_READ_TIMEOUT_MS           25
+#define STM32_SDC_CLOCK_ACTIVATION_DELAY    10
+#define STM32_SDC_SDIO_UNALIGNED_SUPPORT    TRUE
+#define STM32_SDC_SDIO_DMA_STREAM           STM32_DMA_STREAM_ID(2, 3)
+
+/*
+ * SERIAL driver system settings.
+ */
+#define STM32_SERIAL_USE_USART1             FALSE
+#define STM32_SERIAL_USE_USART2             TRUE
+#define STM32_SERIAL_USE_USART3             FALSE
+#define STM32_SERIAL_USE_UART4              FALSE
+#define STM32_SERIAL_USE_UART5              FALSE
+#define STM32_SERIAL_USE_USART6             FALSE
+#define STM32_SERIAL_USART1_PRIORITY        12
+#define STM32_SERIAL_USART2_PRIORITY        12
+#define STM32_SERIAL_USART3_PRIORITY        12
+#define STM32_SERIAL_UART4_PRIORITY         12
+#define STM32_SERIAL_UART5_PRIORITY         12
+#define STM32_SERIAL_USART6_PRIORITY        12
+
+/*
+ * SPI driver system settings.
+ */
+#define STM32_SPI_USE_SPI1                  FALSE
+#define STM32_SPI_USE_SPI2                  FALSE
+#define STM32_SPI_USE_SPI3                  FALSE
+#define STM32_SPI_SPI1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(2, 0)
+#define STM32_SPI_SPI1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(2, 3)
+#define STM32_SPI_SPI2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 3)
+#define STM32_SPI_SPI2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)
+#define STM32_SPI_SPI3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 0)
+#define STM32_SPI_SPI3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)
+#define STM32_SPI_SPI1_DMA_PRIORITY         1
+#define STM32_SPI_SPI2_DMA_PRIORITY         1
+#define STM32_SPI_SPI3_DMA_PRIORITY         1
+#define STM32_SPI_SPI1_IRQ_PRIORITY         10
+#define STM32_SPI_SPI2_IRQ_PRIORITY         10
+#define STM32_SPI_SPI3_IRQ_PRIORITY         10
+#define STM32_SPI_DMA_ERROR_HOOK(spip)      osalSysHalt("DMA failure")
+
+/*
+ * ST driver system settings.
+ */
+#define STM32_ST_IRQ_PRIORITY               8
+#define STM32_ST_USE_TIMER                  2
+
+/*
+ * UART driver system settings.
+ */
+#define STM32_UART_USE_USART1               FALSE
+#define STM32_UART_USE_USART2               FALSE
+#define STM32_UART_USE_USART3               FALSE
+#define STM32_UART_USE_UART4                FALSE
+#define STM32_UART_USE_UART5                FALSE
+#define STM32_UART_USE_USART6               FALSE
+#define STM32_UART_USART1_RX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 5)
+#define STM32_UART_USART1_TX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 7)
+#define STM32_UART_USART2_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 5)
+#define STM32_UART_USART2_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 6)
+#define STM32_UART_USART3_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 1)
+#define STM32_UART_USART3_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 3)
+#define STM32_UART_UART4_RX_DMA_STREAM      STM32_DMA_STREAM_ID(1, 2)
+#define STM32_UART_UART4_TX_DMA_STREAM      STM32_DMA_STREAM_ID(1, 4)
+#define STM32_UART_UART5_RX_DMA_STREAM      STM32_DMA_STREAM_ID(1, 0)
+#define STM32_UART_UART5_TX_DMA_STREAM      STM32_DMA_STREAM_ID(1, 7)
+#define STM32_UART_USART6_RX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 2)
+#define STM32_UART_USART6_TX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 7)
+#define STM32_UART_USART1_IRQ_PRIORITY      12
+#define STM32_UART_USART2_IRQ_PRIORITY      12
+#define STM32_UART_USART3_IRQ_PRIORITY      12
+#define STM32_UART_UART4_IRQ_PRIORITY       12
+#define STM32_UART_UART5_IRQ_PRIORITY       12
+#define STM32_UART_USART6_IRQ_PRIORITY      12
+#define STM32_UART_USART1_DMA_PRIORITY      0
+#define STM32_UART_USART2_DMA_PRIORITY      0
+#define STM32_UART_USART3_DMA_PRIORITY      0
+#define STM32_UART_UART4_DMA_PRIORITY       0
+#define STM32_UART_UART5_DMA_PRIORITY       0
+#define STM32_UART_USART6_DMA_PRIORITY      0
+#define STM32_UART_DMA_ERROR_HOOK(uartp)    osalSysHalt("DMA failure")
+
+/*
+ * USB driver system settings.
+ */
+#define STM32_USB_USE_OTG1                  FALSE
+#define STM32_USB_USE_OTG2                  FALSE
+#define STM32_USB_OTG1_IRQ_PRIORITY         14
+#define STM32_USB_OTG2_IRQ_PRIORITY         14
+#define STM32_USB_OTG1_RX_FIFO_SIZE         512
+#define STM32_USB_OTG2_RX_FIFO_SIZE         1024
+#define STM32_USB_OTG_THREAD_PRIO           LOWPRIO
+#define STM32_USB_OTG_THREAD_STACK_SIZE     128
+#define STM32_USB_OTGFIFO_FILL_BASEPRI      0
diff --git a/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/readme.txt b/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/readme.txt
new file mode 100644
index 000000000..cb043261f
--- /dev/null
+++ b/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/readme.txt
@@ -0,0 +1,30 @@
+*****************************************************************************
+** ChibiOS/RT HAL - IRQ_STORM_FPU stress test demo for STM32F4xx.          **
+*****************************************************************************
+
+** TARGET **
+
+The demo runs on an STMicroelectronics STM32F4-Discovery board.
+
+** The Demo **
+
+The application demonstrates the use of the STM32F4xx GPT, PAL and Serial
+drivers in order to implement a system stress demo involving the FPU.
+
+** Board Setup **
+
+None.
+
+** Build Procedure **
+
+The demo has been tested using YAGARTO 4.6.2.
+Just modify the TRGT line in the makefile in order to use different GCC ports.
+
+** Notes **
+
+Some files used by the demo are not part of ChibiOS/RT but are copyright of
+ST Microelectronics and are licensed under a different license.
+Also note that not all the files present in the ST library are distributed
+with ChibiOS/RT, you can find the whole library on the ST web site:
+
+                             http://www.st.com
author	gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>	2014-05-07 10:44:43 +0000
committer	gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>	2014-05-07 10:44:43 +0000
commit	eefaedd59cccaeddcde8f54f89c98a26cc570e82 (patch)
tree	dc4f07d0b2274ae46865fce952d1750ea187f7db /testhal/STM32/STM32F4xx/IRQ_STORM_FPU
parent	084e1f7b5ad7cb86cbe68eb7e1749f7750c89ce3 (diff)
download	ChibiOS-eefaedd59cccaeddcde8f54f89c98a26cc570e82.tar.gz ChibiOS-eefaedd59cccaeddcde8f54f89c98a26cc570e82.tar.bz2 ChibiOS-eefaedd59cccaeddcde8f54f89c98a26cc570e82.zip