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authorTheodore Ateba <tf.ateba@gmail.com>2017-09-01 22:43:34 +0000
committerTheodore Ateba <tf.ateba@gmail.com>2017-09-01 22:43:34 +0000
commit32739517b658c8268cea234634205ff4a70f6f23 (patch)
treeca713c0b04967a509203199987904cbdb0f515db /testhal/AVR
parent4658591470f6776a18edf15625b31dbaef14a1b9 (diff)
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Update the SPI configuration structure to fix the demo errors during compilation with the new SPI configuration.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10523 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'testhal/AVR')
-rw-r--r--testhal/AVR/MEGA/SPI/main.c13
1 files changed, 7 insertions, 6 deletions
diff --git a/testhal/AVR/MEGA/SPI/main.c b/testhal/AVR/MEGA/SPI/main.c
index 0cc3bcf5a..0d3708e52 100644
--- a/testhal/AVR/MEGA/SPI/main.c
+++ b/testhal/AVR/MEGA/SPI/main.c
@@ -41,12 +41,13 @@ void spiCallback(SPIDriver *spip) {
* @biref SPI configuration strucrture.
*/
static const SPIConfig spiCfg = {
- IOPORT2, /* SPI chip select port. */
- 7, /* SPI chip select pad. */
- SPI_CPOL0_CPHA0, /* SPI mode. */
- SPI_MSB_FIRST, /* SPI bit order. */
- SPI_SCK_FOSC_128, /* SPI clock. */
- spiCallback /* SPI callback. */
+ spiCallback, /* SPI callback. */
+ IOPORT2, /* SPI chip select port. */
+ 7, /* SPI chip select pad. */
+ SPI_CR_DORD_MSB_FIRST | /* SPI Data order. */
+ SPI_CR_CPOL_CPHA_MODE(0) | /* SPI clock polarity and phase. */
+ SPI_CR_SCK_FOSC_128, /* SPI clock. */
+ SPI_SR_SCK_FOSC_2 /* SPI double speed bit. */
};
/*