Add ChibiOS/EX test demo for the Bosch digital Barometer.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10685 35acf78f-673a-0410-8e92-d51de3d6d3f4

6 files changed, 1671 insertions, 0 deletions

diff --git a/testex/STM32/STM32F4xx/I2C-BMP085/Makefile b/testex/STM32/STM32F4xx/I2C-BMP085/Makefile
new file mode 100644
index 000000000..d712851bb
--- /dev/null
+++ b/testex/STM32/STM32F4xx/I2C-BMP085/Makefile
@@ -0,0 +1,224 @@
+##############################################################################

+# Build global options

+# NOTE: Can be overridden externally.

+#

+

+# Compiler options here.

+ifeq ($(USE_OPT),)

+  USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16

+endif

+

+# C specific options here (added to USE_OPT).

+ifeq ($(USE_COPT),)

+  USE_COPT =

+endif

+

+# C++ specific options here (added to USE_OPT).

+ifeq ($(USE_CPPOPT),)

+  USE_CPPOPT = -fno-rtti

+endif

+

+# Enable this if you want the linker to remove unused code and data

+ifeq ($(USE_LINK_GC),)

+  USE_LINK_GC = yes

+endif

+

+# Linker extra options here.

+ifeq ($(USE_LDOPT),)

+  USE_LDOPT =

+endif

+

+# Enable this if you want link time optimizations (LTO)

+ifeq ($(USE_LTO),)

+  USE_LTO = yes

+endif

+

+# If enabled, this option allows to compile the application in THUMB mode.

+ifeq ($(USE_THUMB),)

+  USE_THUMB = yes

+endif

+

+# Enable this if you want to see the full log while compiling.

+ifeq ($(USE_VERBOSE_COMPILE),)

+  USE_VERBOSE_COMPILE = no

+endif

+

+# If enabled, this option makes the build process faster by not compiling

+# modules not used in the current configuration.

+ifeq ($(USE_SMART_BUILD),)

+  USE_SMART_BUILD = yes

+endif

+

+#

+# Build global options

+##############################################################################

+

+##############################################################################

+# Architecture or project specific options

+#

+

+# Stack size to be allocated to the Cortex-M process stack. This stack is

+# the stack used by the main() thread.

+ifeq ($(USE_PROCESS_STACKSIZE),)

+  USE_PROCESS_STACKSIZE = 0x400

+endif

+

+# Stack size to the allocated to the Cortex-M main/exceptions stack. This

+# stack is used for processing interrupts and exceptions.

+ifeq ($(USE_EXCEPTIONS_STACKSIZE),)

+  USE_EXCEPTIONS_STACKSIZE = 0x400

+endif

+

+# Enables the use of FPU (no, softfp, hard).

+ifeq ($(USE_FPU),)

+  USE_FPU = hard

+endif

+

+#

+# Architecture or project specific options

+##############################################################################

+

+##############################################################################

+# Project, sources and paths

+#

+

+# Define project name here

+PROJECT = ch

+

+# Imported source files and paths

+CHIBIOS = ../../../..

+# Startup files.

+include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk

+# HAL-OSAL files (optional).

+include $(CHIBIOS)/os/hal/hal.mk

+include $(CHIBIOS)/os/hal/ports/STM32/STM32F4xx/platform.mk

+include $(CHIBIOS)/os/hal/boards/ST_NUCLEO64_F401RE/board.mk

+include $(CHIBIOS)/os/hal/osal/rt/osal.mk

+# RTOS files (optional).

+include $(CHIBIOS)/os/rt/rt.mk

+include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk

+# Other files (optional).

+include $(CHIBIOS)/os/ex/Bosch/bmp085.mk

+include $(CHIBIOS)/os/hal/lib/streams/streams.mk

+include $(CHIBIOS)/os/various/shell/shell.mk

+

+# Define linker script file here

+LDSCRIPT= $(STARTUPLD)/STM32F401xE.ld

+

+# C sources that can be compiled in ARM or THUMB mode depending on the global

+# setting.

+CSRC = $(STARTUPSRC)  \

+       $(KERNSRC)     \

+       $(PORTSRC)     \

+       $(OSALSRC)     \

+       $(HALSRC)      \

+       $(PLATFORMSRC) \

+       $(BOARDSRC)    \

+       $(BMP085SRC)   \

+       $(STREAMSSRC)  \

+       $(SHELLSRC)    \

+       main.c

+

+#       $(SHELLSRC)    \

+# C++ sources that can be compiled in ARM or THUMB mode depending on the global

+# setting.

+CPPSRC =

+

+# C sources to be compiled in ARM mode regardless of the global setting.

+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler

+#       option that results in lower performance and larger code size.

+ACSRC =

+

+# C++ sources to be compiled in ARM mode regardless of the global setting.

+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler

+#       option that results in lower performance and larger code size.

+ACPPSRC =

+

+# C sources to be compiled in THUMB mode regardless of the global setting.

+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler

+#       option that results in lower performance and larger code size.

+TCSRC =

+

+# C sources to be compiled in THUMB mode regardless of the global setting.

+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler

+#       option that results in lower performance and larger code size.

+TCPPSRC =

+

+# List ASM source files here

+ASMSRC =

+ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM)

+

+INCDIR = $(CHIBIOS)/os/license                              \

+         $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC)     \

+         $(HALINC) $(PLATFORMINC) $(BOARDINC) $(BMP085INC)  \

+         $(STREAMSINC) $(SHELLINC)

+

+#

+# Project, sources and paths

+##############################################################################

+

+##############################################################################

+# Compiler settings

+#

+

+MCU  = cortex-m4

+

+#TRGT = arm-elf-

+TRGT = arm-none-eabi-

+CC   = $(TRGT)gcc

+CPPC = $(TRGT)g++

+# Enable loading with g++ only if you need C++ runtime support.

+# NOTE: You can use C++ even without C++ support if you are careful. C++

+#       runtime support makes code size explode.

+LD   = $(TRGT)gcc

+#LD   = $(TRGT)g++

+CP   = $(TRGT)objcopy

+AS   = $(TRGT)gcc -x assembler-with-cpp

+AR   = $(TRGT)ar

+OD   = $(TRGT)objdump

+SZ   = $(TRGT)size

+HEX  = $(CP) -O ihex

+BIN  = $(CP) -O binary

+

+# ARM-specific options here

+AOPT =

+

+# THUMB-specific options here

+TOPT = -mthumb -DTHUMB

+

+# Define C warning options here

+CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes

+

+# Define C++ warning options here

+CPPWARN = -Wall -Wextra -Wundef

+

+#

+# Compiler settings

+##############################################################################

+

+##############################################################################

+# Start of user section

+#

+

+# List all user C define here, like -D_DEBUG=1

+UDEFS = -DCHPRINTF_USE_FLOAT=1 -DSHELL_CMD_TEST_ENABLED=0 \

+        -DHTS221_USE_ADVANCED=0 -DLPS25H_SHARED_I2C=0

+

+# Define ASM defines here

+UADEFS =

+

+# List all user directories here

+UINCDIR =

+

+# List the user directory to look for the libraries here

+ULIBDIR =

+

+# List all user libraries here

+ULIBS =

+

+#

+# End of user defines

+##############################################################################

+

+RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC

+include $(RULESPATH)/rules.mk

diff --git a/testex/STM32/STM32F4xx/I2C-BMP085/chconf.h b/testex/STM32/STM32F4xx/I2C-BMP085/chconf.h
new file mode 100644
index 000000000..ad6b53ade
--- /dev/null
+++ b/testex/STM32/STM32F4xx/I2C-BMP085/chconf.h
@@ -0,0 +1,520 @@
+/*

+    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+/**

+ * @file    templates/chconf.h

+ * @brief   Configuration file template.

+ * @details A copy of this file must be placed in each project directory, it

+ *          contains the application specific kernel settings.

+ *

+ * @addtogroup config

+ * @details Kernel related settings and hooks.

+ * @{

+ */

+

+#ifndef CHCONF_H

+#define CHCONF_H

+

+#define _CHIBIOS_RT_CONF_

+

+/*===========================================================================*/

+/**

+ * @name System timers settings

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   System time counter resolution.

+ * @note    Allowed values are 16 or 32 bits.

+ */

+#define CH_CFG_ST_RESOLUTION                32

+

+/**

+ * @brief   System tick frequency.

+ * @details Frequency of the system timer that drives the system ticks. This

+ *          setting also defines the system tick time unit.

+ */

+#define CH_CFG_ST_FREQUENCY                 10000

+

+/**

+ * @brief   Time delta constant for the tick-less mode.

+ * @note    If this value is zero then the system uses the classic

+ *          periodic tick. This value represents the minimum number

+ *          of ticks that is safe to specify in a timeout directive.

+ *          The value one is not valid, timeouts are rounded up to

+ *          this value.

+ */

+#define CH_CFG_ST_TIMEDELTA                 2

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Kernel parameters and options

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   Round robin interval.

+ * @details This constant is the number of system ticks allowed for the

+ *          threads before preemption occurs. Setting this value to zero

+ *          disables the preemption for threads with equal priority and the

+ *          round robin becomes cooperative. Note that higher priority

+ *          threads can still preempt, the kernel is always preemptive.

+ * @note    Disabling the round robin preemption makes the kernel more compact

+ *          and generally faster.

+ * @note    The round robin preemption is not supported in tickless mode and

+ *          must be set to zero in that case.

+ */

+#define CH_CFG_TIME_QUANTUM                 0

+

+/**

+ * @brief   Managed RAM size.

+ * @details Size of the RAM area to be managed by the OS. If set to zero

+ *          then the whole available RAM is used. The core memory is made

+ *          available to the heap allocator and/or can be used directly through

+ *          the simplified core memory allocator.

+ *

+ * @note    In order to let the OS manage the whole RAM the linker script must

+ *          provide the @p __heap_base__ and @p __heap_end__ symbols.

+ * @note    Requires @p CH_CFG_USE_MEMCORE.

+ */

+#define CH_CFG_MEMCORE_SIZE                 0

+

+/**

+ * @brief   Idle thread automatic spawn suppression.

+ * @details When this option is activated the function @p chSysInit()

+ *          does not spawn the idle thread. The application @p main()

+ *          function becomes the idle thread and must implement an

+ *          infinite loop.

+ */

+#define CH_CFG_NO_IDLE_THREAD               FALSE

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Performance options

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   OS optimization.

+ * @details If enabled then time efficient rather than space efficient code

+ *          is used when two possible implementations exist.

+ *

+ * @note    This is not related to the compiler optimization options.

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_OPTIMIZE_SPEED               TRUE

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Subsystem options

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   Time Measurement APIs.

+ * @details If enabled then the time measurement APIs are included in

+ *          the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_TM                       TRUE

+

+/**

+ * @brief   Threads registry APIs.

+ * @details If enabled then the registry APIs are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_REGISTRY                 TRUE

+

+/**

+ * @brief   Threads synchronization APIs.

+ * @details If enabled then the @p chThdWait() function is included in

+ *          the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_WAITEXIT                 TRUE

+

+/**

+ * @brief   Semaphores APIs.

+ * @details If enabled then the Semaphores APIs are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_SEMAPHORES               TRUE

+

+/**

+ * @brief   Semaphores queuing mode.

+ * @details If enabled then the threads are enqueued on semaphores by

+ *          priority rather than in FIFO order.

+ *

+ * @note    The default is @p FALSE. Enable this if you have special

+ *          requirements.

+ * @note    Requires @p CH_CFG_USE_SEMAPHORES.

+ */

+#define CH_CFG_USE_SEMAPHORES_PRIORITY      FALSE

+

+/**

+ * @brief   Mutexes APIs.

+ * @details If enabled then the mutexes APIs are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_MUTEXES                  TRUE

+

+/**

+ * @brief   Enables recursive behavior on mutexes.

+ * @note    Recursive mutexes are heavier and have an increased

+ *          memory footprint.

+ *

+ * @note    The default is @p FALSE.

+ * @note    Requires @p CH_CFG_USE_MUTEXES.

+ */

+#define CH_CFG_USE_MUTEXES_RECURSIVE        FALSE

+

+/**

+ * @brief   Conditional Variables APIs.

+ * @details If enabled then the conditional variables APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_MUTEXES.

+ */

+#define CH_CFG_USE_CONDVARS                 TRUE

+

+/**

+ * @brief   Conditional Variables APIs with timeout.

+ * @details If enabled then the conditional variables APIs with timeout

+ *          specification are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_CONDVARS.

+ */

+#define CH_CFG_USE_CONDVARS_TIMEOUT         TRUE

+

+/**

+ * @brief   Events Flags APIs.

+ * @details If enabled then the event flags APIs are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_EVENTS                   TRUE

+

+/**

+ * @brief   Events Flags APIs with timeout.

+ * @details If enabled then the events APIs with timeout specification

+ *          are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_EVENTS.

+ */

+#define CH_CFG_USE_EVENTS_TIMEOUT           TRUE

+

+/**

+ * @brief   Synchronous Messages APIs.

+ * @details If enabled then the synchronous messages APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_MESSAGES                 TRUE

+

+/**

+ * @brief   Synchronous Messages queuing mode.

+ * @details If enabled then messages are served by priority rather than in

+ *          FIFO order.

+ *

+ * @note    The default is @p FALSE. Enable this if you have special

+ *          requirements.

+ * @note    Requires @p CH_CFG_USE_MESSAGES.

+ */

+#define CH_CFG_USE_MESSAGES_PRIORITY        FALSE

+

+/**

+ * @brief   Mailboxes APIs.

+ * @details If enabled then the asynchronous messages (mailboxes) APIs are

+ *          included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_SEMAPHORES.

+ */

+#define CH_CFG_USE_MAILBOXES                TRUE

+

+/**

+ * @brief   Core Memory Manager APIs.

+ * @details If enabled then the core memory manager APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_MEMCORE                  TRUE

+

+/**

+ * @brief   Heap Allocator APIs.

+ * @details If enabled then the memory heap allocator APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or

+ *          @p CH_CFG_USE_SEMAPHORES.

+ * @note    Mutexes are recommended.

+ */

+#define CH_CFG_USE_HEAP                     TRUE

+

+/**

+ * @brief   Memory Pools Allocator APIs.

+ * @details If enabled then the memory pools allocator APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_MEMPOOLS                 TRUE

+

+/**

+ * @brief   Dynamic Threads APIs.

+ * @details If enabled then the dynamic threads creation APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_WAITEXIT.

+ * @note    Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.

+ */

+#define CH_CFG_USE_DYNAMIC                  TRUE

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Debug options

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   Debug option, kernel statistics.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_STATISTICS                   FALSE

+

+/**

+ * @brief   Debug option, system state check.

+ * @details If enabled the correct call protocol for system APIs is checked

+ *          at runtime.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_SYSTEM_STATE_CHECK           FALSE

+

+/**

+ * @brief   Debug option, parameters checks.

+ * @details If enabled then the checks on the API functions input

+ *          parameters are activated.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_ENABLE_CHECKS                FALSE

+

+/**

+ * @brief   Debug option, consistency checks.

+ * @details If enabled then all the assertions in the kernel code are

+ *          activated. This includes consistency checks inside the kernel,

+ *          runtime anomalies and port-defined checks.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_ENABLE_ASSERTS               FALSE

+

+/**

+ * @brief   Debug option, trace buffer.

+ * @details If enabled then the trace buffer is activated.

+ *

+ * @note    The default is @p CH_DBG_TRACE_MASK_DISABLED.

+ */

+#define CH_DBG_TRACE_MASK                   CH_DBG_TRACE_MASK_DISABLED

+

+/**

+ * @brief   Trace buffer entries.

+ * @note    The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is

+ *          different from @p CH_DBG_TRACE_MASK_DISABLED.

+ */

+#define CH_DBG_TRACE_BUFFER_SIZE            128

+

+/**

+ * @brief   Debug option, stack checks.

+ * @details If enabled then a runtime stack check is performed.

+ *

+ * @note    The default is @p FALSE.

+ * @note    The stack check is performed in a architecture/port dependent way.

+ *          It may not be implemented or some ports.

+ * @note    The default failure mode is to halt the system with the global

+ *          @p panic_msg variable set to @p NULL.

+ */

+#define CH_DBG_ENABLE_STACK_CHECK           FALSE

+

+/**

+ * @brief   Debug option, stacks initialization.

+ * @details If enabled then the threads working area is filled with a byte

+ *          value when a thread is created. This can be useful for the

+ *          runtime measurement of the used stack.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_FILL_THREADS                 FALSE

+

+/**

+ * @brief   Debug option, threads profiling.

+ * @details If enabled then a field is added to the @p thread_t structure that

+ *          counts the system ticks occurred while executing the thread.

+ *

+ * @note    The default is @p FALSE.

+ * @note    This debug option is not currently compatible with the

+ *          tickless mode.

+ */

+#define CH_DBG_THREADS_PROFILING            FALSE

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Kernel hooks

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   Threads descriptor structure extension.

+ * @details User fields added to the end of the @p thread_t structure.

+ */

+#define CH_CFG_THREAD_EXTRA_FIELDS                                          \

+  /* Add threads custom fields here.*/

+

+/**

+ * @brief   Threads initialization hook.

+ * @details User initialization code added to the @p chThdInit() API.

+ *

+ * @note    It is invoked from within @p chThdInit() and implicitly from all

+ *          the threads creation APIs.

+ */

+#define CH_CFG_THREAD_INIT_HOOK(tp) {                                       \

+  /* Add threads initialization code here.*/                                \

+}

+

+/**

+ * @brief   Threads finalization hook.

+ * @details User finalization code added to the @p chThdExit() API.

+ */

+#define CH_CFG_THREAD_EXIT_HOOK(tp) {                                       \

+  /* Add threads finalization code here.*/                                  \

+}

+

+/**

+ * @brief   Context switch hook.

+ * @details This hook is invoked just before switching between threads.

+ */

+#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) {                              \

+  /* Context switch code here.*/                                            \

+}

+

+/**

+ * @brief   ISR enter hook.

+ */

+#define CH_CFG_IRQ_PROLOGUE_HOOK() {                                        \

+  /* IRQ prologue code here.*/                                              \

+}

+

+/**

+ * @brief   ISR exit hook.

+ */

+#define CH_CFG_IRQ_EPILOGUE_HOOK() {                                        \

+  /* IRQ epilogue code here.*/                                              \

+}

+

+/**

+ * @brief   Idle thread enter hook.

+ * @note    This hook is invoked within a critical zone, no OS functions

+ *          should be invoked from here.

+ * @note    This macro can be used to activate a power saving mode.

+ */

+#define CH_CFG_IDLE_ENTER_HOOK() {                                          \

+  /* Idle-enter code here.*/                                                \

+}

+

+/**

+ * @brief   Idle thread leave hook.

+ * @note    This hook is invoked within a critical zone, no OS functions

+ *          should be invoked from here.

+ * @note    This macro can be used to deactivate a power saving mode.

+ */

+#define CH_CFG_IDLE_LEAVE_HOOK() {                                          \

+  /* Idle-leave code here.*/                                                \

+}

+

+/**

+ * @brief   Idle Loop hook.

+ * @details This hook is continuously invoked by the idle thread loop.

+ */

+#define CH_CFG_IDLE_LOOP_HOOK() {                                           \

+  /* Idle loop code here.*/                                                 \

+}

+

+/**

+ * @brief   System tick event hook.

+ * @details This hook is invoked in the system tick handler immediately

+ *          after processing the virtual timers queue.

+ */

+#define CH_CFG_SYSTEM_TICK_HOOK() {                                         \

+  /* System tick event code here.*/                                         \

+}

+

+/**

+ * @brief   System halt hook.

+ * @details This hook is invoked in case to a system halting error before

+ *          the system is halted.

+ */

+#define CH_CFG_SYSTEM_HALT_HOOK(reason) {                                   \

+  /* System halt code here.*/                                               \

+}

+

+/**

+ * @brief   Trace hook.

+ * @details This hook is invoked each time a new record is written in the

+ *          trace buffer.

+ */

+#define CH_CFG_TRACE_HOOK(tep) {                                            \

+  /* Trace code here.*/                                                     \

+}

+

+/** @} */

+

+/*===========================================================================*/

+/* Port-specific settings (override port settings defaulted in chcore.h).    */

+/*===========================================================================*/

+

+#endif  /* CHCONF_H */

+

+/** @} */

diff --git a/testex/STM32/STM32F4xx/I2C-BMP085/halconf.h b/testex/STM32/STM32F4xx/I2C-BMP085/halconf.h
new file mode 100644
index 000000000..0eab4a20e
--- /dev/null
+++ b/testex/STM32/STM32F4xx/I2C-BMP085/halconf.h
@@ -0,0 +1,388 @@
+/*

+    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+/**

+ * @file    templates/halconf.h

+ * @brief   HAL configuration header.

+ * @details HAL configuration file, this file allows to enable or disable the

+ *          various device drivers from your application. You may also use

+ *          this file in order to override the device drivers default settings.

+ *

+ * @addtogroup HAL_CONF

+ * @{

+ */

+

+#ifndef HALCONF_H

+#define HALCONF_H

+

+#include "mcuconf.h"

+

+/**

+ * @brief   Enables the PAL subsystem.

+ */

+#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)

+#define HAL_USE_PAL                 TRUE

+#endif

+

+/**

+ * @brief   Enables the ADC subsystem.

+ */

+#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)

+#define HAL_USE_ADC                 FALSE

+#endif

+

+/**

+ * @brief   Enables the CAN subsystem.

+ */

+#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)

+#define HAL_USE_CAN                 FALSE

+#endif

+

+/**

+ * @brief   Enables the DAC subsystem.

+ */

+#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)

+#define HAL_USE_DAC                 FALSE

+#endif

+

+/**

+ * @brief   Enables the EXT subsystem.

+ */

+#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)

+#define HAL_USE_EXT                 FALSE

+#endif

+

+/**

+ * @brief   Enables the GPT subsystem.

+ */

+#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)

+#define HAL_USE_GPT                 FALSE

+#endif

+

+/**

+ * @brief   Enables the I2C subsystem.

+ */

+#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)

+#define HAL_USE_I2C                 TRUE

+#endif

+

+/**

+ * @brief   Enables the I2S subsystem.

+ */

+#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)

+#define HAL_USE_I2S                 FALSE

+#endif

+

+/**

+ * @brief   Enables the ICU subsystem.

+ */

+#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)

+#define HAL_USE_ICU                 FALSE

+#endif

+

+/**

+ * @brief   Enables the MAC subsystem.

+ */

+#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)

+#define HAL_USE_MAC                 FALSE

+#endif

+

+/**

+ * @brief   Enables the MMC_SPI subsystem.

+ */

+#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)

+#define HAL_USE_MMC_SPI             FALSE

+#endif

+

+/**

+ * @brief   Enables the PWM subsystem.

+ */

+#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)

+#define HAL_USE_PWM                 FALSE

+#endif

+

+/**

+ * @brief   Enables the QSPI subsystem.

+ */

+#if !defined(HAL_USE_QSPI) || defined(__DOXYGEN__)

+#define HAL_USE_QSPI                FALSE

+#endif

+

+/**

+ * @brief   Enables the RTC subsystem.

+ */

+#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)

+#define HAL_USE_RTC                 FALSE

+#endif

+

+/**

+ * @brief   Enables the SDC subsystem.

+ */

+#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)

+#define HAL_USE_SDC                 FALSE

+#endif

+

+/**

+ * @brief   Enables the SERIAL subsystem.

+ */

+#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)

+#define HAL_USE_SERIAL              TRUE

+#endif

+

+/**

+ * @brief   Enables the SERIAL over USB subsystem.

+ */

+#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)

+#define HAL_USE_SERIAL_USB          TRUE

+#endif

+

+/**

+ * @brief   Enables the SPI subsystem.

+ */

+#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)

+#define HAL_USE_SPI                 FALSE

+#endif

+

+/**

+ * @brief   Enables the UART subsystem.

+ */

+#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)

+#define HAL_USE_UART                FALSE

+#endif

+

+/**

+ * @brief   Enables the USB subsystem.

+ */

+#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)

+#define HAL_USE_USB                 TRUE

+#endif

+

+/**

+ * @brief   Enables the WDG subsystem.

+ */

+#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)

+#define HAL_USE_WDG                 FALSE

+#endif

+

+/*===========================================================================*/

+/* ADC driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables synchronous APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)

+#define ADC_USE_WAIT                TRUE

+#endif

+

+/**

+ * @brief   Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)

+#define ADC_USE_MUTUAL_EXCLUSION    TRUE

+#endif

+

+/*===========================================================================*/

+/* CAN driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Sleep mode related APIs inclusion switch.

+ */

+#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)

+#define CAN_USE_SLEEP_MODE          TRUE

+#endif

+

+/*===========================================================================*/

+/* I2C driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables the mutual exclusion APIs on the I2C bus.

+ */

+#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)

+#define I2C_USE_MUTUAL_EXCLUSION    TRUE

+#endif

+

+/*===========================================================================*/

+/* MAC driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables an event sources for incoming packets.

+ */

+#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)

+#define MAC_USE_ZERO_COPY           FALSE

+#endif

+

+/**

+ * @brief   Enables an event sources for incoming packets.

+ */

+#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)

+#define MAC_USE_EVENTS              TRUE

+#endif

+

+/*===========================================================================*/

+/* MMC_SPI driver related settings.                                          */

+/*===========================================================================*/

+

+/**

+ * @brief   Delays insertions.

+ * @details If enabled this options inserts delays into the MMC waiting

+ *          routines releasing some extra CPU time for the threads with

+ *          lower priority, this may slow down the driver a bit however.

+ *          This option is recommended also if the SPI driver does not

+ *          use a DMA channel and heavily loads the CPU.

+ */

+#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)

+#define MMC_NICE_WAITING            TRUE

+#endif

+

+/*===========================================================================*/

+/* SDC driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Number of initialization attempts before rejecting the card.

+ * @note    Attempts are performed at 10mS intervals.

+ */

+#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)

+#define SDC_INIT_RETRY              100

+#endif

+

+/**

+ * @brief   Include support for MMC cards.

+ * @note    MMC support is not yet implemented so this option must be kept

+ *          at @p FALSE.

+ */

+#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)

+#define SDC_MMC_SUPPORT             FALSE

+#endif

+

+/**

+ * @brief   Delays insertions.

+ * @details If enabled this options inserts delays into the MMC waiting

+ *          routines releasing some extra CPU time for the threads with

+ *          lower priority, this may slow down the driver a bit however.

+ */

+#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)

+#define SDC_NICE_WAITING            TRUE

+#endif

+

+/*===========================================================================*/

+/* SERIAL driver related settings.                                           */

+/*===========================================================================*/

+

+/**

+ * @brief   Default bit rate.

+ * @details Configuration parameter, this is the baud rate selected for the

+ *          default configuration.

+ */

+#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)

+#define SERIAL_DEFAULT_BITRATE      115200

+#endif

+

+/**

+ * @brief   Serial buffers size.

+ * @details Configuration parameter, you can change the depth of the queue

+ *          buffers depending on the requirements of your application.

+ * @note    The default is 16 bytes for both the transmission and receive

+ *          buffers.

+ */

+#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)

+#define SERIAL_BUFFERS_SIZE         16

+#endif

+

+/*===========================================================================*/

+/* SERIAL_USB driver related setting.                                        */

+/*===========================================================================*/

+

+/**

+ * @brief   Serial over USB buffers size.

+ * @details Configuration parameter, the buffer size must be a multiple of

+ *          the USB data endpoint maximum packet size.

+ * @note    The default is 256 bytes for both the transmission and receive

+ *          buffers.

+ */

+#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)

+#define SERIAL_USB_BUFFERS_SIZE     256

+#endif

+

+/**

+ * @brief   Serial over USB number of buffers.

+ * @note    The default is 2 buffers.

+ */

+#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)

+#define SERIAL_USB_BUFFERS_NUMBER   2

+#endif

+

+/*===========================================================================*/

+/* SPI driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables synchronous APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)

+#define SPI_USE_WAIT                TRUE

+#endif

+

+/**

+ * @brief   Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)

+#define SPI_USE_MUTUAL_EXCLUSION    TRUE

+#endif

+

+/*===========================================================================*/

+/* UART driver related settings.                                             */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables synchronous APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)

+#define UART_USE_WAIT               FALSE

+#endif

+

+/**

+ * @brief   Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)

+#define UART_USE_MUTUAL_EXCLUSION   FALSE

+#endif

+

+/*===========================================================================*/

+/* USB driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables synchronous APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)

+#define USB_USE_WAIT                FALSE

+#endif

+

+#endif /* HALCONF_H */

+

+/** @} */

diff --git a/testex/STM32/STM32F4xx/I2C-BMP085/main.c b/testex/STM32/STM32F4xx/I2C-BMP085/main.c
new file mode 100644
index 000000000..59e73610b
--- /dev/null
+++ b/testex/STM32/STM32F4xx/I2C-BMP085/main.c
@@ -0,0 +1,261 @@
+/*

+    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+/*==========================================================================*/

+/* Include files.                                                           */

+/*==========================================================================*/

+

+#include "ch.h"

+#include "hal.h"

+

+#include "string.h"

+#include "shell.h"

+#include "chprintf.h"

+

+#include "bmp085.h"

+

+/*==========================================================================*/

+/* Variables and Driver configuration for the demo.                         */

+/*==========================================================================*/

+

+/* Use to write to the serial driver                                        */

+//static BaseSequentialStream *chp = (BaseSequentialStream*) &SD2;

+

+/* BMP085 Driver: This object represent an BMP085 instance.                 */

+static BMP085Driver BMP085D1;

+

+/* Raw data buffer for the BMP sensor.                                      */

+static int32_t  rawdata[BMP085_BARO_NUMBER_OF_AXES +

+                        BMP085_THERMO_NUMBER_OF_AXES];

+

+/* Cooked data buffer for the BMP sensor.                                   */

+static float    cookeddata[BMP085_BARO_NUMBER_OF_AXES +

+                            BMP085_THERMO_NUMBER_OF_AXES];

+

+/**

+ * @brief I2C configuration structure.

+ */

+static const I2CConfig i2cConfig = {

+  OPMODE_I2C,           /* I2C inetrface peration mode.                     */

+  400000,               /* I2C interface clock speed.                       */

+  FAST_DUTY_CYCLE_2,    /* I2C interface duty cycle mode.                   */

+};

+

+/**

+ * @brief BMP085 Barometer configuration structure.

+ */

+static const BMP085BaroConfig bmp085BaroConfig = {

+  BMP085_BARO_CT_LOW,   /* Pressure conversion time.                        */

+  BMP085_BARO_MODE_LOW, /* BMP085 Mode.                                     */

+  BMP085_BARO_OSS_0     /* Oversempling setting.                            */

+};

+

+/**

+ * @brief BMP085 Thermometeer configuration structure.

+ */

+static const BMP085ThermoConfig bmp085ThermoConfig = {

+  BMP085_THERMO_CT_LOW  /* Temperature conversion time                      */

+};

+

+/**

+ * @brief BMP085 configuration structure.

+ */

+static const BMP085Config bmp085Config = {

+  &I2CD1,               /* I2C Driver pointer.                              */

+  &i2cConfig,           /* I2C Driver configuration.                        */

+  &bmp085BaroConfig,    /* BMP085 Baromether configuration.                 */

+  &bmp085ThermoConfig   /* BMP085 Thermometer configuration.                */

+};

+

+/*==========================================================================*/

+/* Command line related.                                                    */

+/*==========================================================================*/

+

+/* Enable use of special ANSI escape sequences */

+#define CHPRINTF_USE_ANSI_CODE      TRUE

+#define SHELL_WA_SIZE               THD_WORKING_AREA_SIZE(2048)

+

+static void cmd_read(BaseSequentialStream *chp, int argc, char *argv[]) {

+  (void)argv;

+  if (argc != 2) {

+    chprintf(chp, "Usage: read [baro|thermo|both] [raw|cooked]\r\n");

+    return;

+  }

+

+  while (chnGetTimeout((BaseChannel *)chp, 150) == Q_TIMEOUT) {

+    if (!strcmp (argv[0], "baro")) {

+      if (!strcmp (argv[1], "raw")) {

+#if CHPRINTF_USE_ANSI_CODE

+        chprintf(chp, "\033[2J\033[1;1H");

+#endif

+        barometerReadRaw(&BMP085D1, rawdata);

+        chprintf(chp, "BMP085 Barometer raw data...\r\n");

+        chprintf(chp, "Raw pressure: %d\r\n", *rawdata);

+      }

+      else if (!strcmp (argv[1], "cooked")) {

+#if CHPRINTF_USE_ANSI_CODE

+        chprintf(chp, "\033[2J\033[1;1H");

+#endif

+        barometerReadCooked(&BMP085D1, cookeddata);

+        chprintf(chp, "BMP085 Barometer cooked data...\r\n");

+        chprintf(chp, "Cooked pressure: %.2f %%\r\n", *cookeddata);

+      }

+      else {

+        chprintf(chp, "Usage: read [baro|thermo|both] [raw|cooked]\r\n");

+        return;

+      }

+    }

+    else if (!strcmp (argv[0], "thermo")) {

+      if (!strcmp (argv[1], "raw")) {

+#if CHPRINTF_USE_ANSI_CODE

+        chprintf(chp, "\033[2J\033[1;1H");

+#endif

+        thermometerReadRaw(&BMP085D1, rawdata);

+        chprintf(chp, "BMP085 Thermometer raw data...\r\n");

+        chprintf(chp, "Raw temperature: %d\r\n", *rawdata);

+      }

+      else if (!strcmp (argv[1], "cooked")) {

+#if CHPRINTF_USE_ANSI_CODE

+        chprintf(chp, "\033[2J\033[1;1H");

+#endif

+        thermometerReadCooked(&BMP085D1, cookeddata);

+        chprintf(chp, "BMP085 Thermometer cooked data...\r\n");

+        chprintf(chp, "Cooked temperature: %.2f °C\r\n", *cookeddata);

+      }

+      else {

+        chprintf(chp, "Usage: read [baro|thermo|both] [raw|cooked]\r\n");

+        return;

+      }

+    }

+    else if (!strcmp (argv[0], "both")) {

+      if (!strcmp (argv[1], "raw")) {

+#if CHPRINTF_USE_ANSI_CODE

+        chprintf(chp, "\033[2J\033[1;1H");

+#endif

+        sensorReadRaw(&BMP085D1, rawdata);

+        chprintf(chp, "BMP085 Barometer raw data...\r\n");

+        chprintf(chp, "Raw pressure: %d\r\n", rawdata[0]);

+        chprintf(chp, "BMP085 Thermometer raw data...\r\n");

+        chprintf(chp, "Raw temperature: %d\r\n", rawdata[1]);

+      }

+      else if (!strcmp (argv[1], "cooked")) {

+#if CHPRINTF_USE_ANSI_CODE

+        chprintf(chp, "\033[2J\033[1;1H");

+#endif

+        sensorReadCooked(&BMP085D1, cookeddata);

+        chprintf(chp, "BMP085 Barometer cooked data...\r\n");

+        chprintf(chp, "Cooked pressure: %.2f %%\r\n", cookeddata[0]);

+        chprintf(chp, "BMP085 Thermometer cooked data...\r\n");

+        chprintf(chp, "Cooked temperature: %.2f °C\r\n", cookeddata[1]);

+      }

+      else {

+        chprintf(chp, "Usage: read [baro|thermo|both] [raw|cooked]\r\n");

+        return;

+      }

+    }

+    else {

+      chprintf(chp, "Usage: read [baro|thermo|both] [raw|cooked]\r\n");

+      return;

+    }

+  }

+  chprintf(chp, "Stopped\r\n");

+}

+

+static const ShellCommand commands[] = {

+  {"read", cmd_read},

+  {NULL, NULL}

+};

+

+static const ShellConfig shell_cfg1 = {

+  (BaseSequentialStream *)&SD2,

+  commands

+};

+

+/*==========================================================================*/

+/* Main code.                                                               */

+/*==========================================================================*/

+

+/*

+ * LED blinker thread, times are in milliseconds.

+ */

+static THD_WORKING_AREA(waThread1, 128);

+static THD_FUNCTION(Thread1, arg) {

+

+  (void)arg;

+  chRegSetThreadName("blinker");

+  while (true) {

+    palClearPad(GPIOA, GPIOA_LED_GREEN);

+    chThdSleepMilliseconds(500);

+    palSetPad(GPIOA, GPIOA_LED_GREEN);

+    chThdSleepMilliseconds(500);

+  }

+}

+

+/*

+ * Application entry point.

+ */

+int main(void) {

+  /*

+   * System initializations.

+   * - HAL initialization, this also initializes the configured device drivers

+   *   and performs the board-specific initializations.

+   * - Kernel initialization, the main() function becomes a thread and the

+   *   RTOS is active.

+   */

+  halInit();

+  chSysInit();

+

+  /* Configure the I2C Driver and i2C Pins.   */

+  palSetLineMode(LINE_ARD_D15, PAL_MODE_ALTERNATE(4) |

+                 PAL_STM32_OSPEED_HIGHEST | PAL_STM32_OTYPE_OPENDRAIN);

+  palSetLineMode(LINE_ARD_D14, PAL_MODE_ALTERNATE(4) |

+                 PAL_STM32_OSPEED_HIGHEST | PAL_STM32_OTYPE_OPENDRAIN);

+

+  /*

+   * Activates the serial driver 2 using the driver default configuration.

+   */

+  sdStart(&SD2, NULL);

+

+  /*

+   * Creates the blinker thread.

+   */

+  chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL);

+

+  /*

+   * BMP085 Object Initialization.

+   */

+  bmp085ObjectInit(&BMP085D1);

+

+  /*

+   * Activates the BMP085 driver.

+   */

+  bmp085Start(&BMP085D1, &bmp085Config);

+

+  /*

+   * Shell manager initialization.

+   */

+  shellInit();

+

+  while(TRUE) {

+

+    thread_t *shelltp = chThdCreateFromHeap(NULL, SHELL_WA_SIZE,

+                                            "shell", NORMALPRIO + 1,

+                                            shellThread, (void *)&shell_cfg1);

+    chThdWait(shelltp);                  /* Waiting termination.            */

+    chThdSleepMilliseconds(1000);

+  }

+  bmp085Stop(&BMP085D1);

+}

diff --git a/testex/STM32/STM32F4xx/I2C-BMP085/mcuconf.h b/testex/STM32/STM32F4xx/I2C-BMP085/mcuconf.h
new file mode 100644
index 000000000..cda46ebc8
--- /dev/null
+++ b/testex/STM32/STM32F4xx/I2C-BMP085/mcuconf.h
@@ -0,0 +1,251 @@
+/*

+    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+#ifndef MCUCONF_H

+#define MCUCONF_H

+

+/*

+ * STM32F4xx drivers configuration.

+ * The following settings override the default settings present in

+ * the various device driver implementation headers.

+ * Note that the settings for each driver only have effect if the whole

+ * driver is enabled in halconf.h.

+ *

+ * IRQ priorities:

+ * 15...0       Lowest...Highest.

+ *

+ * DMA priorities:

+ * 0...3        Lowest...Highest.

+ */

+

+#define STM32F4xx_MCUCONF

+

+/*

+ * HAL driver system settings.

+ */

+#define STM32_NO_INIT                       FALSE

+#define STM32_HSI_ENABLED                   TRUE

+#define STM32_LSI_ENABLED                   TRUE

+#define STM32_HSE_ENABLED                   TRUE

+#define STM32_LSE_ENABLED                   FALSE

+#define STM32_CLOCK48_REQUIRED              TRUE

+#define STM32_SW                            STM32_SW_PLL

+#define STM32_PLLSRC                        STM32_PLLSRC_HSE

+#define STM32_PLLM_VALUE                    8       

+#define STM32_PLLN_VALUE                    336     

+#define STM32_PLLP_VALUE                    4       

+#define STM32_PLLQ_VALUE                    7       

+#define STM32_HPRE                          STM32_HPRE_DIV1  

+#define STM32_PPRE1                         STM32_PPRE1_DIV2  

+#define STM32_PPRE2                         STM32_PPRE2_DIV1 

+#define STM32_RTCSEL                        STM32_RTCSEL_LSI

+#define STM32_RTCPRE_VALUE                  8

+#define STM32_MCO1SEL                       STM32_MCO1SEL_HSI

+#define STM32_MCO1PRE                       STM32_MCO1PRE_DIV1

+#define STM32_MCO2SEL                       STM32_MCO2SEL_SYSCLK

+#define STM32_MCO2PRE                       STM32_MCO2PRE_DIV5

+#define STM32_I2SSRC                        STM32_I2SSRC_CKIN

+#define STM32_PLLI2SN_VALUE                 192

+#define STM32_PLLI2SR_VALUE                 5

+#define STM32_PVD_ENABLE                    FALSE

+#define STM32_PLS                           STM32_PLS_LEV0

+#define STM32_BKPRAM_ENABLE                 FALSE

+

+/*

+ * ADC driver system settings.

+ */

+#define STM32_ADC_ADCPRE                    ADC_CCR_ADCPRE_DIV4   

+#define STM32_ADC_USE_ADC1                  FALSE

+#define STM32_ADC_ADC1_DMA_STREAM           STM32_DMA_STREAM_ID(2, 4)

+#define STM32_ADC_ADC1_DMA_PRIORITY         2

+#define STM32_ADC_IRQ_PRIORITY              6

+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     6

+

+/*

+ * EXT driver system settings.

+ */

+#define STM32_EXT_EXTI0_IRQ_PRIORITY        6

+#define STM32_EXT_EXTI1_IRQ_PRIORITY        6

+#define STM32_EXT_EXTI2_IRQ_PRIORITY        6

+#define STM32_EXT_EXTI3_IRQ_PRIORITY        6

+#define STM32_EXT_EXTI4_IRQ_PRIORITY        6

+#define STM32_EXT_EXTI5_9_IRQ_PRIORITY      6

+#define STM32_EXT_EXTI10_15_IRQ_PRIORITY    6

+#define STM32_EXT_EXTI16_IRQ_PRIORITY       6

+#define STM32_EXT_EXTI17_IRQ_PRIORITY       6

+#define STM32_EXT_EXTI18_IRQ_PRIORITY       6

+#define STM32_EXT_EXTI21_IRQ_PRIORITY       6

+#define STM32_EXT_EXTI22_IRQ_PRIORITY       6

+

+/*

+ * GPT driver system settings.

+ */

+#define STM32_GPT_USE_TIM1                  FALSE

+#define STM32_GPT_USE_TIM2                  FALSE

+#define STM32_GPT_USE_TIM3                  FALSE

+#define STM32_GPT_USE_TIM4                  FALSE

+#define STM32_GPT_USE_TIM5                  FALSE

+#define STM32_GPT_USE_TIM9                  FALSE

+#define STM32_GPT_USE_TIM11                 FALSE

+#define STM32_GPT_TIM1_IRQ_PRIORITY         7

+#define STM32_GPT_TIM2_IRQ_PRIORITY         7

+#define STM32_GPT_TIM3_IRQ_PRIORITY         7

+#define STM32_GPT_TIM4_IRQ_PRIORITY         7

+#define STM32_GPT_TIM5_IRQ_PRIORITY         7

+#define STM32_GPT_TIM9_IRQ_PRIORITY         7

+#define STM32_GPT_TIM11_IRQ_PRIORITY        7

+

+/*

+ * I2C driver system settings.

+ */

+#define STM32_I2C_USE_I2C1                  TRUE

+#define STM32_I2C_USE_I2C2                  FALSE

+#define STM32_I2C_USE_I2C3                  FALSE

+#define STM32_I2C_BUSY_TIMEOUT              50

+#define STM32_I2C_I2C1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 0)

+#define STM32_I2C_I2C1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 6)

+#define STM32_I2C_I2C2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

+#define STM32_I2C_I2C2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)

+#define STM32_I2C_I2C3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

+#define STM32_I2C_I2C3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)

+#define STM32_I2C_I2C1_IRQ_PRIORITY         5

+#define STM32_I2C_I2C2_IRQ_PRIORITY         5

+#define STM32_I2C_I2C3_IRQ_PRIORITY         5

+#define STM32_I2C_I2C1_DMA_PRIORITY         3

+#define STM32_I2C_I2C2_DMA_PRIORITY         3

+#define STM32_I2C_I2C3_DMA_PRIORITY         3

+#define STM32_I2C_DMA_ERROR_HOOK(i2cp)      osalSysHalt("DMA failure")

+

+/*

+ * I2S driver system settings.

+ */

+#define STM32_I2S_USE_SPI2                  FALSE

+#define STM32_I2S_USE_SPI3                  FALSE

+#define STM32_I2S_SPI2_IRQ_PRIORITY         10

+#define STM32_I2S_SPI3_IRQ_PRIORITY         10

+#define STM32_I2S_SPI2_DMA_PRIORITY         1

+#define STM32_I2S_SPI3_DMA_PRIORITY         1

+#define STM32_I2S_SPI2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 3)

+#define STM32_I2S_SPI2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)

+#define STM32_I2S_SPI3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 0)

+#define STM32_I2S_SPI3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)

+#define STM32_I2S_DMA_ERROR_HOOK(i2sp)      osalSysHalt("DMA failure")

+

+/*

+ * ICU driver system settings.

+ */

+#define STM32_ICU_USE_TIM1                  FALSE

+#define STM32_ICU_USE_TIM2                  FALSE

+#define STM32_ICU_USE_TIM3                  FALSE

+#define STM32_ICU_USE_TIM4                  FALSE

+#define STM32_ICU_USE_TIM5                  FALSE

+#define STM32_ICU_USE_TIM9                  FALSE

+#define STM32_ICU_TIM1_IRQ_PRIORITY         7

+#define STM32_ICU_TIM2_IRQ_PRIORITY         7

+#define STM32_ICU_TIM3_IRQ_PRIORITY         7

+#define STM32_ICU_TIM4_IRQ_PRIORITY         7

+#define STM32_ICU_TIM5_IRQ_PRIORITY         7

+#define STM32_ICU_TIM9_IRQ_PRIORITY         7

+

+/*

+ * PWM driver system settings.

+ */

+#define STM32_PWM_USE_ADVANCED              FALSE

+#define STM32_PWM_USE_TIM1                  FALSE

+#define STM32_PWM_USE_TIM2                  FALSE

+#define STM32_PWM_USE_TIM3                  FALSE

+#define STM32_PWM_USE_TIM4                  FALSE

+#define STM32_PWM_USE_TIM5                  FALSE

+#define STM32_PWM_USE_TIM9                  FALSE

+#define STM32_PWM_TIM1_IRQ_PRIORITY         7

+#define STM32_PWM_TIM2_IRQ_PRIORITY         7

+#define STM32_PWM_TIM3_IRQ_PRIORITY         7

+#define STM32_PWM_TIM4_IRQ_PRIORITY         7

+#define STM32_PWM_TIM5_IRQ_PRIORITY         7

+#define STM32_PWM_TIM9_IRQ_PRIORITY         7

+

+/*

+ * SERIAL driver system settings.

+ */

+#define STM32_SERIAL_USE_USART1             FALSE

+#define STM32_SERIAL_USE_USART2             TRUE

+#define STM32_SERIAL_USE_USART6             FALSE

+#define STM32_SERIAL_USART1_PRIORITY        12

+#define STM32_SERIAL_USART2_PRIORITY        12

+#define STM32_SERIAL_USART6_PRIORITY        12

+

+/*

+ * SPI driver system settings.

+ */

+#define STM32_SPI_USE_SPI1                  TRUE

+#define STM32_SPI_USE_SPI2                  FALSE

+#define STM32_SPI_USE_SPI3                  FALSE

+#define STM32_SPI_SPI1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(2, 0)

+#define STM32_SPI_SPI1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(2, 3)

+#define STM32_SPI_SPI2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 3)

+#define STM32_SPI_SPI2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)

+#define STM32_SPI_SPI3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 0)

+#define STM32_SPI_SPI3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)

+#define STM32_SPI_SPI1_DMA_PRIORITY         1

+#define STM32_SPI_SPI2_DMA_PRIORITY         1

+#define STM32_SPI_SPI3_DMA_PRIORITY         1

+#define STM32_SPI_SPI1_IRQ_PRIORITY         10

+#define STM32_SPI_SPI2_IRQ_PRIORITY         10

+#define STM32_SPI_SPI3_IRQ_PRIORITY         10

+#define STM32_SPI_DMA_ERROR_HOOK(spip)      osalSysHalt("DMA failure")

+

+/*

+ * ST driver system settings.

+ */

+#define STM32_ST_IRQ_PRIORITY               8

+#define STM32_ST_USE_TIMER                  2

+

+/*

+ * UART driver system settings.

+ */

+#define STM32_UART_USE_USART1               FALSE

+#define STM32_UART_USE_USART2               FALSE

+#define STM32_UART_USE_USART6               FALSE

+#define STM32_UART_USART1_RX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 5)

+#define STM32_UART_USART1_TX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 7)

+#define STM32_UART_USART2_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 5)

+#define STM32_UART_USART2_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 6)

+#define STM32_UART_USART6_RX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 2)

+#define STM32_UART_USART6_TX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 7)

+#define STM32_UART_USART1_IRQ_PRIORITY      12

+#define STM32_UART_USART2_IRQ_PRIORITY      12

+#define STM32_UART_USART6_IRQ_PRIORITY      12

+#define STM32_UART_USART1_DMA_PRIORITY      0

+#define STM32_UART_USART2_DMA_PRIORITY      0

+#define STM32_UART_USART6_DMA_PRIORITY      0

+#define STM32_UART_DMA_ERROR_HOOK(uartp)    osalSysHalt("DMA failure")

+

+/*

+ * USB driver system settings.

+ */

+#define STM32_USB_USE_OTG1                  TRUE

+#define STM32_USB_OTG1_IRQ_PRIORITY         14

+#define STM32_USB_OTG1_RX_FIFO_SIZE         512

+#define STM32_USB_OTG_THREAD_PRIO           LOWPRIO

+#define STM32_USB_OTG_THREAD_STACK_SIZE     128

+#define STM32_USB_OTGFIFO_FILL_BASEPRI      0

+

+/*

+ * WDG driver system settings.

+ */

+#define STM32_WDG_USE_IWDG                  FALSE

+

+#endif /* MCUCONF_H */

diff --git a/testex/STM32/STM32F4xx/I2C-BMP085/readme.txt b/testex/STM32/STM32F4xx/I2C-BMP085/readme.txt
new file mode 100644
index 000000000..1c8a70474
--- /dev/null
+++ b/testex/STM32/STM32F4xx/I2C-BMP085/readme.txt
@@ -0,0 +1,27 @@
+*****************************************************************************

+** ChibiOS/HAL + ChibiOS/EX - I2C + BMP085 demo for STM32F4xxxx.           **

+*****************************************************************************

+

+** TARGET **

+

+The demo runs on an STM32F401RE Nucleo board.

+

+** The Demo **

+

+The application demonstrates the use of the STM32F4xx I2C driver in order

+to acquire data from BMP085 sensor by using ChibiOS/EX and the shell.

+

+** Build Procedure **

+

+The demo has been tested by using the free Codesourcery GCC-based toolchain

+and YAGARTO.

+Just modify the TRGT line in the makefile in order to use different GCC ports.

+

+** Notes **

+

+Some files used by the demo are not part of ChibiOS/RT but are copyright of

+ST Microelectronics and are licensed under a different license.

+Also note that not all the files present in the ST library are distributed

+with ChibiOS/RT, you can find the whole library on the ST web site:

+

+                             http://www.st.com