aboutsummaryrefslogtreecommitdiffstats
path: root/testex
diff options
context:
space:
mode:
authorGiovanni Di Sirio <gdisirio@gmail.com>2019-01-05 11:39:55 +0000
committerGiovanni Di Sirio <gdisirio@gmail.com>2019-01-05 11:39:55 +0000
commitb798346a9760030da27022d84b2c9f258e2d7e94 (patch)
tree2466ce64a7183f07bbd612eff0f83ad9fa0c8342 /testex
parent874f246e6f54ee7db66911006e9005ad76b5147b (diff)
downloadChibiOS-b798346a9760030da27022d84b2c9f258e2d7e94.tar.gz
ChibiOS-b798346a9760030da27022d84b2c9f258e2d7e94.tar.bz2
ChibiOS-b798346a9760030da27022d84b2c9f258e2d7e94.zip
Mass update for TIM-related changes.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12526 110e8d01-0319-4d1e-a829-52ad28d1bb01
Diffstat (limited to 'testex')
-rw-r--r--testex/STM32/STM32L4xx/SPI-L3GD20/mcuconf.h11
1 files changed, 11 insertions, 0 deletions
diff --git a/testex/STM32/STM32L4xx/SPI-L3GD20/mcuconf.h b/testex/STM32/STM32L4xx/SPI-L3GD20/mcuconf.h
index 652011fdd..094544214 100644
--- a/testex/STM32/STM32L4xx/SPI-L3GD20/mcuconf.h
+++ b/testex/STM32/STM32L4xx/SPI-L3GD20/mcuconf.h
@@ -108,6 +108,10 @@
#define STM32_IRQ_EXTI19_PRIORITY 6
#define STM32_IRQ_EXTI20_PRIORITY 6
#define STM32_IRQ_EXTI21_22_PRIORITY 6
+#define STM32_IRQ_TIM1_BRK_TIM15_PRIORITY 7
+#define STM32_IRQ_TIM1_UP_TIM16_PRIORITY 7
+#define STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY 7
+#define STM32_IRQ_TIM1_CC_PRIORITY 7
/*
* ADC driver system settings.
@@ -160,6 +164,9 @@
#define STM32_GPT_USE_TIM6 FALSE
#define STM32_GPT_USE_TIM7 FALSE
#define STM32_GPT_USE_TIM8 FALSE
+#define STM32_GPT_USE_TIM15 FALSE
+#define STM32_GPT_USE_TIM16 FALSE
+#define STM32_GPT_USE_TIM17 FALSE
#define STM32_GPT_TIM1_IRQ_PRIORITY 7
#define STM32_GPT_TIM2_IRQ_PRIORITY 7
#define STM32_GPT_TIM3_IRQ_PRIORITY 7
@@ -199,6 +206,7 @@
#define STM32_ICU_USE_TIM4 FALSE
#define STM32_ICU_USE_TIM5 FALSE
#define STM32_ICU_USE_TIM8 FALSE
+#define STM32_ICU_USE_TIM15 FALSE
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
@@ -216,6 +224,9 @@
#define STM32_PWM_USE_TIM4 FALSE
#define STM32_PWM_USE_TIM5 FALSE
#define STM32_PWM_USE_TIM8 FALSE
+#define STM32_PWM_USE_TIM15 FALSE
+#define STM32_PWM_USE_TIM16 FALSE
+#define STM32_PWM_USE_TIM17 FALSE
#define STM32_PWM_TIM1_IRQ_PRIORITY 7
#define STM32_PWM_TIM2_IRQ_PRIORITY 7
#define STM32_PWM_TIM3_IRQ_PRIORITY 7