Updated testes/STM32/STM32L4xx demos to be compliant with new project organization/makefile mechanisms.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/stable_19.1.x@12613 110e8d01-0319-4d1e-a829-52ad28d1bb01

4 files changed, 51 insertions, 77 deletions

diff --git a/testex/STM32/STM32L4xx/SPI-L3GD20/Makefile b/testex/STM32/STM32L4xx/SPI-L3GD20/Makefile
index a21cb3320..14b93e61d 100644
--- a/testex/STM32/STM32L4xx/SPI-L3GD20/Makefile
+++ b/testex/STM32/STM32L4xx/SPI-L3GD20/Makefile
@@ -18,7 +18,7 @@ ifeq ($(USE_CPPOPT),)
   USE_CPPOPT = -fno-rtti

 endif

 

-# Enable this if you want the linker to remove unused code and data

+# Enable this if you want the linker to remove unused code and data.

 ifeq ($(USE_LINK_GC),)

   USE_LINK_GC = yes

 endif

@@ -28,16 +28,11 @@ ifeq ($(USE_LDOPT),)
   USE_LDOPT = 

 endif

 

-# Enable this if you want link time optimizations (LTO)

+# Enable this if you want link time optimizations (LTO).

 ifeq ($(USE_LTO),)

   USE_LTO = yes

 endif

 

-# If enabled, this option allows to compile the application in THUMB mode.

-ifeq ($(USE_THUMB),)

-  USE_THUMB = yes

-endif

-

 # Enable this if you want to see the full log while compiling.

 ifeq ($(USE_VERBOSE_COMPILE),)

   USE_VERBOSE_COMPILE = no

@@ -74,19 +69,30 @@ ifeq ($(USE_FPU),)
   USE_FPU = hard

 endif

 

+# FPU-related options.

+ifeq ($(USE_FPU_OPT),)

+  USE_FPU_OPT = -mfloat-abi=$(USE_FPU) -mfpu=fpv4-sp-d16

+endif

+

 #

 # Architecture or project specific options

 ##############################################################################

 

 ##############################################################################

-# Project, sources and paths

+# Project, target, sources and paths

 #

 

 # Define project name here

 PROJECT = ch

 

-# Imported source files and paths

-CHIBIOS = ../../../..

+# Target settings.

+MCU  = cortex-m4

+

+# Imported source files and paths.

+CHIBIOS  := ../../../..

+CONFDIR  := ./cfg

+BUILDDIR := ./build

+DEPDIR   := ./.dep

 

 # Licensing files.

 include $(CHIBIOS)/os/license/license.mk

@@ -102,10 +108,12 @@ include $(CHIBIOS)/os/rt/rt.mk
 include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk

 # EX files (optional).

 include $(CHIBIOS)/os/ex/ST/l3gd20.mk

+# Auto-build files in ./source recursively.

+include $(CHIBIOS)/tools/mk/autobuild.mk

 # Other files (optional).

 include $(CHIBIOS)/os/hal/lib/streams/streams.mk

 

-# Define linker script file here

+# Define linker script file here.

 LDSCRIPT= $(STARTUPLD)/STM32L476xG.ld

 

 # C sources that can be compiled in ARM or THUMB mode depending on the global

@@ -118,73 +126,23 @@ CSRC = $(ALLCSRC) \
 # setting.

 CPPSRC = $(ALLCPPSRC)

 

-# C sources to be compiled in ARM mode regardless of the global setting.

-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler

-#       option that results in lower performance and larger code size.

-ACSRC =

-

-# C++ sources to be compiled in ARM mode regardless of the global setting.

-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler

-#       option that results in lower performance and larger code size.

-ACPPSRC =

-

-# C sources to be compiled in THUMB mode regardless of the global setting.

-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler

-#       option that results in lower performance and larger code size.

-TCSRC =

-

-# C sources to be compiled in THUMB mode regardless of the global setting.

-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler

-#       option that results in lower performance and larger code size.

-TCPPSRC =

-

-# List ASM source files here

+# List ASM source files here.

 ASMSRC = $(ALLASMSRC)

-ASMXSRC = $(ALLXASMSRC)

-

-INCDIR = $(ALLINC) $(TESTINC)

 

-#

-# Project, sources and paths

-##############################################################################

-

-##############################################################################

-# Compiler settings

-#

+# List ASM with preprocessor source files here.

+ASMXSRC = $(ALLXASMSRC)

 

-MCU  = cortex-m4

+# Inclusion directories.

+INCDIR = $(CONFDIR) $(ALLINC) $(TESTINC)

 

-#TRGT = arm-elf-

-TRGT = arm-none-eabi-

-CC   = $(TRGT)gcc

-CPPC = $(TRGT)g++

-# Enable loading with g++ only if you need C++ runtime support.

-# NOTE: You can use C++ even without C++ support if you are careful. C++

-#       runtime support makes code size explode.

-LD   = $(TRGT)gcc

-#LD   = $(TRGT)g++

-CP   = $(TRGT)objcopy

-AS   = $(TRGT)gcc -x assembler-with-cpp

-AR   = $(TRGT)ar

-OD   = $(TRGT)objdump

-SZ   = $(TRGT)size

-HEX  = $(CP) -O ihex

-BIN  = $(CP) -O binary

-

-# ARM-specific options here

-AOPT =

-

-# THUMB-specific options here

-TOPT = -mthumb -DTHUMB

-

-# Define C warning options here

+# Define C warning options here.

 CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes

 

-# Define C++ warning options here

+# Define C++ warning options here.

 CPPWARN = -Wall -Wextra -Wundef

 

 #

-# Compiler settings

+# Project, target, sources and paths

 ##############################################################################

 

 ##############################################################################

@@ -192,8 +150,7 @@ CPPWARN = -Wall -Wextra -Wundef
 #

 

 # List all user C define here, like -D_DEBUG=1

-UDEFS = -DCHPRINTF_USE_FLOAT=1 \

-        -DL3GD20_GYRO_USE_ADVANCED=0 -DL3GD20_SHARED_SPI=0

+UDEFS = -DCHPRINTF_USE_FLOAT=1

 

 # Define ASM defines here

 UADEFS =

@@ -208,8 +165,25 @@ ULIBDIR =
 ULIBS =

 

 #

-# End of user defines

+# End of user section

+##############################################################################

+

 ##############################################################################

+# Common rules

+#

 

 RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk

+include $(RULESPATH)/arm-none-eabi.mk

 include $(RULESPATH)/rules.mk

+

+#

+# Common rules

+##############################################################################

+

+##############################################################################

+# Custom rules

+#

+

+#

+# Custom rules

+##############################################################################

diff --git a/testex/STM32/STM32L4xx/SPI-L3GD20/chconf.h b/testex/STM32/STM32L4xx/SPI-L3GD20/cfg/chconf.h
index 9cd5cbf1f..e50f15cce 100644
--- a/testex/STM32/STM32L4xx/SPI-L3GD20/chconf.h
+++ b/testex/STM32/STM32L4xx/SPI-L3GD20/cfg/chconf.h
@@ -491,7 +491,7 @@
  * @note    The default is @p FALSE.

  */

 #if !defined(CH_DBG_SYSTEM_STATE_CHECK)

-#define CH_DBG_SYSTEM_STATE_CHECK           TRUE

+#define CH_DBG_SYSTEM_STATE_CHECK           FALSE

 #endif

 

 /**

@@ -502,7 +502,7 @@
  * @note    The default is @p FALSE.

  */

 #if !defined(CH_DBG_ENABLE_CHECKS)

-#define CH_DBG_ENABLE_CHECKS                TRUE

+#define CH_DBG_ENABLE_CHECKS                FALSE

 #endif

 

 /**

@@ -514,7 +514,7 @@
  * @note    The default is @p FALSE.

  */

 #if !defined(CH_DBG_ENABLE_ASSERTS)

-#define CH_DBG_ENABLE_ASSERTS               TRUE

+#define CH_DBG_ENABLE_ASSERTS               FALSE

 #endif

 

 /**

diff --git a/testex/STM32/STM32L4xx/SPI-L3GD20/halconf.h b/testex/STM32/STM32L4xx/SPI-L3GD20/cfg/halconf.h
index 4cb8204e5..4cb8204e5 100644
--- a/testex/STM32/STM32L4xx/SPI-L3GD20/halconf.h
+++ b/testex/STM32/STM32L4xx/SPI-L3GD20/cfg/halconf.h
diff --git a/testex/STM32/STM32L4xx/SPI-L3GD20/mcuconf.h b/testex/STM32/STM32L4xx/SPI-L3GD20/cfg/mcuconf.h
index 094544214..214afa573 100644
--- a/testex/STM32/STM32L4xx/SPI-L3GD20/mcuconf.h
+++ b/testex/STM32/STM32L4xx/SPI-L3GD20/cfg/mcuconf.h
@@ -90,7 +90,7 @@
 #define STM32_CLK48SEL                      STM32_CLK48SEL_PLLSAI1

 #define STM32_ADCSEL                        STM32_ADCSEL_SYSCLK

 #define STM32_SWPMI1SEL                     STM32_SWPMI1SEL_PCLK1

-#define STM32_DFSDMSEL                      STM32_DFSDMSEL_PCLK1

+#define STM32_DFSDMSEL                      STM32_DFSDMSEL_PCLK2

 #define STM32_RTCSEL                        STM32_RTCSEL_LSI

 

 /*

@@ -107,7 +107,7 @@
 #define STM32_IRQ_EXTI18_PRIORITY           6

 #define STM32_IRQ_EXTI19_PRIORITY           6

 #define STM32_IRQ_EXTI20_PRIORITY           6

-#define STM32_IRQ_EXTI21_22_PRIORITY        6

+#define STM32_IRQ_EXTI21_22_PRIORITY        15

 #define STM32_IRQ_TIM1_BRK_TIM15_PRIORITY   7

 #define STM32_IRQ_TIM1_UP_TIM16_PRIORITY    7

 #define STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY 7