Improvements to simulator IRQ detection.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11792 110e8d01-0319-4d1e-a829-52ad28d1bb01

3 files changed, 334 insertions, 97 deletions

diff --git a/test/rt/testbuild/Makefile b/test/rt/testbuild/Makefile
index ce80802c8..fc262d8f7 100755
--- a/test/rt/testbuild/Makefile
+++ b/test/rt/testbuild/Makefile
@@ -28,7 +28,7 @@ ifeq ($(USE_LDOPT),)
   USE_LDOPT = 

 endif

 

-# Enable this if you want link time optimizations (LTO)

+# Enable this if you want link time optimizations (LTO).

 ifeq ($(USE_LTO),)

   USE_LTO = no

 endif

@@ -65,6 +65,12 @@ PROJECT = ch
 

 # Imported source files and paths

 CHIBIOS = ../../..

+CONFDIR  := ./cfg

+BUILDDIR := ./build

+DEPDIR   := ./.dep

+

+# Licensing files.

+include $(CHIBIOS)/os/license/license.mk

 # Startup files.

 # HAL-OSAL files (optional).

 include $(CHIBIOS)/os/hal/hal.mk

@@ -82,42 +88,50 @@ include $(CHIBIOS)/test/oslib/oslib_test.mk
 #include $(CHIBIOS)/os/various/shell/shell.mk

 

 # C sources here.

-CSRC = $(STARTUPSRC) \

-       $(KERNSRC) \

-       $(PORTSRC) \

-       $(OSALSRC) \

-       $(HALSRC) \

-       $(PLATFORMSRC) \

-       $(BOARDSRC) \

+CSRC = $(ALLCSRC) \

        $(TESTSRC) \

-       $(STREAMSSRC) \

-       $(SHELLSRC) \

        main.c

 

 # C++ sources here.

-CPPSRC =

-

-# List ASM source files here

-ASMSRC =

-ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM)

+CPPSRC = $(ALLCPPSRC)

 

-INCDIR = $(CHIBIOS)/os/license \

-         $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \

-         $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \

-         $(STREAMSINC) $(SHELLINC)

+# List ASM source files here.

+ASMSRC = $(ALLASMSRC)

+ASMXSRC = $(ALLXASMSRC)

 

-# GCOV files.

-GCOVSRC = $(KERNSRC)

+INCDIR = $(CONFDIR) $(ALLINC) $(TESTINC)

 

 #

 # Project, sources and paths

 ##############################################################################

 

 ##############################################################################

+# Start of user section

+#

+

+# List all user C define here, like -D_DEBUG=1

+UDEFS = -DSIMULATOR

+

+# Define ASM defines here

+UADEFS =

+

+# List all user directories here

+UINCDIR =

+

+# List the user directory to look for the libraries here

+ULIBDIR =

+

+# List all user libraries here

+ULIBS =

+

+#

+# End of user defines

+##############################################################################

+

+##############################################################################

 # Compiler settings

 #

 

-#TRGT = powerpc-eabi-

 TRGT = 

 CC   = $(TRGT)gcc

 CPPC = $(TRGT)g++

@@ -131,6 +145,7 @@ AS   = $(TRGT)gcc -x assembler-with-cpp
 AR   = $(TRGT)ar

 OD   = $(TRGT)objdump

 SZ   = $(TRGT)size

+HEX  = $(CP) -O ihex

 BIN  = $(CP) -O binary

 COV  = gcov

 

@@ -144,31 +159,5 @@ CPPWARN = -Wall -Wextra -Wundef
 # Compiler settings

 ##############################################################################

 

-##############################################################################

-# Start of user section

-#

-

-# List all user C define here, like -D_DEBUG=1

-UDEFS = -DSIMULATOR $(XDEFS)

-

-# Define ASM defines here

-UADEFS =

-

-# List all user directories here

-UINCDIR =

-

-# List the user directory to look for the libraries here

-ULIBDIR =

-

-# List all user libraries here

-ULIBS = -lgcov

-

-#

-# End of user defines

-##############################################################################

-

 RULESPATH = $(CHIBIOS)/os/common/startup/SIMIA32/compilers/GCC

 include $(RULESPATH)/rules.mk

-

-misra:

-	@wine lint-nt -v -w3 $(DEFS) pclint/co-gcc.lnt pclint/au-misra3.lnt pclint/waivers.lnt $(IINCDIR) $(KERNSRC)

diff --git a/test/rt/testbuild/Makefile_win32 b/test/rt/testbuild/Makefile_win32
index 8625d1e1b..70b17c286 100755
--- a/test/rt/testbuild/Makefile_win32
+++ b/test/rt/testbuild/Makefile_win32
@@ -28,7 +28,7 @@ ifeq ($(USE_LDOPT),)
   USE_LDOPT = 

 endif

 

-# Enable this if you want link time optimizations (LTO)

+# Enable this if you want link time optimizations (LTO).

 ifeq ($(USE_LTO),)

   USE_LTO = no

 endif

@@ -65,6 +65,12 @@ PROJECT = ch.exe
 

 # Imported source files and paths

 CHIBIOS = ../../..

+CONFDIR  := ./cfg

+BUILDDIR := ./build

+DEPDIR   := ./.dep

+

+# Licensing files.

+include $(CHIBIOS)/os/license/license.mk

 # Startup files.

 # HAL-OSAL files (optional).

 include $(CHIBIOS)/os/hal/hal.mk

@@ -82,43 +88,51 @@ include $(CHIBIOS)/test/oslib/oslib_test.mk
 #include $(CHIBIOS)/os/various/shell/shell.mk

 

 # C sources here.

-CSRC = $(STARTUPSRC) \

-       $(KERNSRC) \

-       $(PORTSRC) \

-       $(OSALSRC) \

-       $(HALSRC) \

-       $(PLATFORMSRC) \

-       $(BOARDSRC) \

+CSRC = $(ALLCSRC) \

        $(TESTSRC) \

-       $(STREAMSSRC) \

-       $(SHELLSRC) \

        main.c

 

 # C++ sources here.

-CPPSRC =

-

-# List ASM source files here

-ASMSRC =

-ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM)

+CPPSRC = $(ALLCPPSRC)

 

-INCDIR = $(CHIBIOS)/os/license \

-         $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \

-         $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \

-         $(STREAMSINC) $(SHELLINC)

+# List ASM source files here.

+ASMSRC = $(ALLASMSRC)

+ASMXSRC = $(ALLXASMSRC)

 

-# GCOV files.

-GCOVSRC = $(KERNSRC)

+INCDIR = $(CONFDIR) $(ALLINC) $(TESTINC)

 

 #

 # Project, sources and paths

 ##############################################################################

 

 ##############################################################################

+# Start of user section

+#

+

+# List all user C define here, like -D_DEBUG=1

+UDEFS = -DSIMULATOR

+

+# Define ASM defines here

+UADEFS =

+

+# List all user directories here

+UINCDIR =

+

+# List the user directory to look for the libraries here

+ULIBDIR =

+

+# List all user libraries here

+ULIBS =

+

+#

+# End of user defines

+##############################################################################

+

+##############################################################################

 # Compiler settings

 #

 

-#TRGT = powerpc-eabi-

-TRGT = mingw32-

+TRGT = 

 CC   = $(TRGT)gcc

 CPPC = $(TRGT)g++

 # Enable loading with g++ only if you need C++ runtime support.

@@ -131,6 +145,7 @@ AS   = $(TRGT)gcc -x assembler-with-cpp
 AR   = $(TRGT)ar

 OD   = $(TRGT)objdump

 SZ   = $(TRGT)size

+HEX  = $(CP) -O ihex

 BIN  = $(CP) -O binary

 COV  = gcov

 

@@ -144,31 +159,5 @@ CPPWARN = -Wall -Wextra -Wundef
 # Compiler settings

 ##############################################################################

 

-##############################################################################

-# Start of user section

-#

-

-# List all user C define here, like -D_DEBUG=1

-UDEFS = -DSIMULATOR $(XDEFS)

-

-# Define ASM defines here

-UADEFS =

-

-# List all user directories here

-UINCDIR =

-

-# List the user directory to look for the libraries here

-ULIBDIR =

-

-# List all user libraries here

-ULIBS = -lws2_32 -lgcov

-

-#

-# End of user defines

-##############################################################################

-

 RULESPATH = $(CHIBIOS)/os/common/startup/SIMIA32/compilers/GCC

 include $(RULESPATH)/rules.mk

-

-misra:

-	@lint-nt -v -w3 $(DEFS) pclint/co-gcc-win32.lnt pclint/au-misra3.lnt pclint/waivers.lnt $(IINCDIR) $(KERNSRC)

diff --git a/test/rt/testbuild/mcuconf.h b/test/rt/testbuild/mcuconf.h
new file mode 100644
index 000000000..55c62e4d1
--- /dev/null
+++ b/test/rt/testbuild/mcuconf.h
@@ -0,0 +1,259 @@
+/*

+    ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+#ifndef MCUCONF_H

+#define MCUCONF_H

+

+/*

+ * STM32F0xx drivers configuration.

+ * The following settings override the default settings present in

+ * the various device driver implementation headers.

+ * Note that the settings for each driver only have effect if the whole

+ * driver is enabled in halconf.h.

+ *

+ * IRQ priorities:

+ * 3...0       Lowest...Highest.

+ *

+ * DMA priorities:

+ * 0...3        Lowest...Highest.

+ */

+

+#define STM32F0xx_MCUCONF

+

+/*

+ * HAL driver system settings.

+ */

+#define STM32_NO_INIT                       FALSE

+#define STM32_PVD_ENABLE                    FALSE

+#define STM32_PLS                           STM32_PLS_LEV0

+#define STM32_HSI_ENABLED                   TRUE

+#define STM32_HSI14_ENABLED                 TRUE

+#define STM32_HSI48_ENABLED                 FALSE

+#define STM32_LSI_ENABLED                   TRUE

+#define STM32_HSE_ENABLED                   FALSE

+#define STM32_LSE_ENABLED                   FALSE

+#define STM32_SW                            STM32_SW_PLL

+#define STM32_PLLSRC                        STM32_PLLSRC_HSI_DIV2

+#define STM32_PREDIV_VALUE                  1

+#define STM32_PLLMUL_VALUE                  12

+#define STM32_HPRE                          STM32_HPRE_DIV1

+#define STM32_PPRE                          STM32_PPRE_DIV1

+#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK

+#define STM32_MCOPRE                        STM32_MCOPRE_DIV1

+#define STM32_PLLNODIV                      STM32_PLLNODIV_DIV2

+#define STM32_USBSW                         STM32_USBSW_HSI48

+#define STM32_CECSW                         STM32_CECSW_HSI

+#define STM32_I2C1SW                        STM32_I2C1SW_HSI

+#define STM32_USART1SW                      STM32_USART1SW_PCLK

+#define STM32_RTCSEL                        STM32_RTCSEL_LSI

+

+/*

+ * IRQ system settings.

+ */

+#define STM32_IRQ_EXTI0_1_IRQ_PRIORITY      3

+#define STM32_IRQ_EXTI2_3_IRQ_PRIORITY      3

+#define STM32_IRQ_EXTI4_15_IRQ_PRIORITY     3

+#define STM32_IRQ_EXTI16_IRQ_PRIORITY       3

+#define STM32_IRQ_EXTI17_20_IRQ_PRIORITY    3

+#define STM32_IRQ_EXTI21_22_IRQ_PRIORITY    3

+

+/*

+ * ADC driver system settings.

+ */

+#define STM32_ADC_USE_ADC1                  FALSE

+#define STM32_ADC_ADC1_CKMODE               STM32_ADC_CKMODE_ADCCLK

+#define STM32_ADC_ADC1_DMA_PRIORITY         2

+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     2

+#define STM32_ADC_ADC1_DMA_STREAM           STM32_DMA_STREAM_ID(1, 1)

+

+/*

+ * CAN driver system settings.

+ */

+#define STM32_CAN_USE_CAN1                  FALSE

+#define STM32_CAN_CAN1_IRQ_PRIORITY         3

+

+/*

+ * DAC driver system settings.

+ */

+#define STM32_DAC_DUAL_MODE                 FALSE

+#define STM32_DAC_USE_DAC1_CH1              FALSE

+#define STM32_DAC_USE_DAC1_CH2              FALSE

+#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY     2

+#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY     2

+#define STM32_DAC_DAC1_CH1_DMA_PRIORITY     2

+#define STM32_DAC_DAC1_CH2_DMA_PRIORITY     2

+#define STM32_DAC_DAC1_CH1_DMA_STREAM       STM32_DMA_STREAM_ID(1, 3)

+#define STM32_DAC_DAC1_CH2_DMA_STREAM       STM32_DMA_STREAM_ID(1, 4)

+

+/*

+ * GPT driver system settings.

+ */

+#define STM32_GPT_USE_TIM1                  FALSE

+#define STM32_GPT_USE_TIM2                  FALSE

+#define STM32_GPT_USE_TIM3                  FALSE

+#define STM32_GPT_USE_TIM6                  FALSE

+#define STM32_GPT_USE_TIM14                 FALSE

+#define STM32_GPT_TIM1_IRQ_PRIORITY         2

+#define STM32_GPT_TIM2_IRQ_PRIORITY         2

+#define STM32_GPT_TIM3_IRQ_PRIORITY         2

+#define STM32_GPT_TIM6_IRQ_PRIORITY         2

+#define STM32_GPT_TIM14_IRQ_PRIORITY        2

+

+/*

+ * I2C driver system settings.

+ */

+#define STM32_I2C_USE_I2C1                  FALSE

+#define STM32_I2C_USE_I2C2                  FALSE

+#define STM32_I2C_BUSY_TIMEOUT              50

+#define STM32_I2C_I2C1_IRQ_PRIORITY         3

+#define STM32_I2C_I2C2_IRQ_PRIORITY         3

+#define STM32_I2C_USE_DMA                   TRUE

+#define STM32_I2C_I2C1_DMA_PRIORITY         1

+#define STM32_I2C_I2C2_DMA_PRIORITY         1

+#define STM32_I2C_I2C1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 3)

+#define STM32_I2C_I2C1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

+#define STM32_I2C_I2C2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 5)

+#define STM32_I2C_I2C2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)

+#define STM32_I2C_DMA_ERROR_HOOK(i2cp)      osalSysHalt("DMA failure")

+

+/*

+ * I2S driver system settings.

+ */

+#define STM32_I2S_USE_SPI1                  FALSE

+#define STM32_I2S_USE_SPI2                  FALSE

+#define STM32_I2S_SPI1_MODE                 (STM32_I2S_MODE_MASTER |        \

+                                             STM32_I2S_MODE_RX)

+#define STM32_I2S_SPI2_MODE                 (STM32_I2S_MODE_MASTER |        \

+                                             STM32_I2S_MODE_RX)

+#define STM32_I2S_SPI1_IRQ_PRIORITY         2

+#define STM32_I2S_SPI2_IRQ_PRIORITY         2

+#define STM32_I2S_SPI1_DMA_PRIORITY         1

+#define STM32_I2S_SPI2_DMA_PRIORITY         1

+#define STM32_I2S_SPI1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

+#define STM32_I2S_SPI1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 3)

+#define STM32_I2S_SPI2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)

+#define STM32_I2S_SPI2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 5)

+#define STM32_I2S_DMA_ERROR_HOOK(i2sp)      osalSysHalt("DMA failure")

+

+/*

+ * I2S driver system settings.

+ */

+#define STM32_I2S_USE_SPI1                  FALSE

+#define STM32_I2S_USE_SPI2                  FALSE

+#define STM32_I2S_SPI1_MODE                 (STM32_I2S_MODE_MASTER |        \

+                                             STM32_I2S_MODE_RX)

+#define STM32_I2S_SPI2_MODE                 (STM32_I2S_MODE_MASTER |        \

+                                             STM32_I2S_MODE_RX)

+#define STM32_I2S_SPI1_IRQ_PRIORITY         2

+#define STM32_I2S_SPI2_IRQ_PRIORITY         2

+#define STM32_I2S_SPI1_DMA_PRIORITY         1

+#define STM32_I2S_SPI2_DMA_PRIORITY         1

+#define STM32_I2S_SPI1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

+#define STM32_I2S_SPI1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 3)

+#define STM32_I2S_SPI2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)

+#define STM32_I2S_SPI2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 5)

+#define STM32_I2S_DMA_ERROR_HOOK(i2sp)      osalSysHalt("DMA failure")

+

+/*

+ * ICU driver system settings.

+ */

+#define STM32_ICU_USE_TIM1                  FALSE

+#define STM32_ICU_USE_TIM2                  FALSE

+#define STM32_ICU_USE_TIM3                  FALSE

+#define STM32_ICU_TIM1_IRQ_PRIORITY         3

+#define STM32_ICU_TIM2_IRQ_PRIORITY         3

+#define STM32_ICU_TIM3_IRQ_PRIORITY         3

+

+/*

+ * PWM driver system settings.

+ */

+#define STM32_PWM_USE_ADVANCED              FALSE

+#define STM32_PWM_USE_TIM1                  FALSE

+#define STM32_PWM_USE_TIM2                  FALSE

+#define STM32_PWM_USE_TIM3                  FALSE

+#define STM32_PWM_TIM1_IRQ_PRIORITY         3

+#define STM32_PWM_TIM2_IRQ_PRIORITY         3

+#define STM32_PWM_TIM3_IRQ_PRIORITY         3

+

+/*

+ * SERIAL driver system settings.

+ */

+#define STM32_SERIAL_USE_USART1             FALSE

+#define STM32_SERIAL_USE_USART2             TRUE

+#define STM32_SERIAL_USE_USART3             FALSE

+#define STM32_SERIAL_USE_UART4              FALSE

+#define STM32_SERIAL_USART1_PRIORITY        3

+#define STM32_SERIAL_USART2_PRIORITY        3

+#define STM32_SERIAL_USART3_8_PRIORITY      3

+

+/*

+ * SPI driver system settings.

+ */

+#define STM32_SPI_USE_SPI1                  FALSE

+#define STM32_SPI_USE_SPI2                  FALSE

+#define STM32_SPI_SPI1_DMA_PRIORITY         1

+#define STM32_SPI_SPI2_DMA_PRIORITY         1

+#define STM32_SPI_SPI1_IRQ_PRIORITY         2

+#define STM32_SPI_SPI2_IRQ_PRIORITY         2

+#define STM32_SPI_SPI1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

+#define STM32_SPI_SPI1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 3)

+#define STM32_SPI_SPI2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)

+#define STM32_SPI_SPI2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 5)

+#define STM32_SPI_DMA_ERROR_HOOK(spip)      osalSysHalt("DMA failure")

+

+/*

+ * ST driver system settings.

+ */

+#define STM32_ST_IRQ_PRIORITY               2

+#define STM32_ST_USE_TIMER                  2

+

+/*

+ * UART driver system settings.

+ */

+#define STM32_UART_USE_USART1               FALSE

+#define STM32_UART_USE_USART2               FALSE

+#define STM32_UART_USE_USART3               FALSE

+#define STM32_UART_USE_UART4                FALSE

+#define STM32_UART_USART1_IRQ_PRIORITY      3

+#define STM32_UART_USART2_IRQ_PRIORITY      3

+#define STM32_UART_USART3_8_IRQ_PRIORITY    3

+#define STM32_UART_USART1_DMA_PRIORITY      0

+#define STM32_UART_USART2_DMA_PRIORITY      0

+#define STM32_UART_USART3_DMA_PRIORITY      0

+#define STM32_UART_UART4_DMA_PRIORITY       0

+#define STM32_UART_USART1_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 3)

+#define STM32_UART_USART1_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 2)

+#define STM32_UART_USART2_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 5)

+#define STM32_UART_USART2_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 4)

+#define STM32_UART_USART3_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 3)

+#define STM32_UART_USART3_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 2)

+#define STM32_UART_UART4_RX_DMA_STREAM      STM32_DMA_STREAM_ID(1, 6)

+#define STM32_UART_UART4_TX_DMA_STREAM      STM32_DMA_STREAM_ID(1, 7)

+#define STM32_UART_DMA_ERROR_HOOK(uartp)    osalSysHalt("DMA failure")

+

+/*

+ * USB driver system settings.

+ */

+#define STM32_USB_USE_USB1                  FALSE

+#define STM32_USB_LOW_POWER_ON_SUSPEND      FALSE

+#define STM32_USB_USB1_LP_IRQ_PRIORITY      3

+

+/*

+ * WDG driver system settings.

+ */

+#define STM32_WDG_USE_IWDG                  FALSE

+

+#endif /* MCUCONF_H */