git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@203 35acf78f-673a-0410-8e92-d51de3d6d3f4

3 files changed, 5 insertions, 191 deletions

diff --git a/ports/ARM7-LPC214x/chcore.c b/ports/ARM7-LPC214x/chcore.c
index 88f041ddd..fb627500b 100644
--- a/ports/ARM7-LPC214x/chcore.c
+++ b/ports/ARM7-LPC214x/chcore.c
@@ -34,202 +34,20 @@ void _IdleThread(void *p) {
 }

 

 /*

- * The following functions are present only if there is in the system any

- * code compiled as THUMB that may invoke them.

- * NOTE: The undefs are there in case this module is compiled in ARM mode but

- *       there are THUMB modules in the system.

- */

-#ifdef THUMB_PRESENT

-#undef chSysLock

-void chSysLock(void) {

-

-#ifdef THUMB

-  asm(".p2align 2,,                                             \n\t" \

-      "mov      r0, pc                                          \n\t" \

-      "bx       r0                                              \n\t" \

-      ".code 32                                                 \n\t");

-#endif

-

-  asm("msr      CPSR_c, #0x9F                                   \n\t" \

-      "bx       lr                                              \n\t");

-}

-

-#undef chSysUnlock

-void chSysUnlock(void) {

-

-#ifdef THUMB

-  asm(".p2align 2,,                                             \n\t" \

-      "mov      r0, pc                                          \n\t" \

-      "bx       r0                                              \n\t" \

-      ".code 32                                                 \n\t");

-#endif

-

-  asm("msr      CPSR_c, #0x1F                                   \n\t" \

-      "bx       lr                                              \n\t");

-}

-#endif

-

-void chSysSwitchI(Thread *otp, Thread *ntp) {

-

-#ifdef THUMB

-  asm(".p2align 2,,                                             \n\t" \

-      "mov      r2, pc                                          \n\t" \

-      "bx       r2                                              \n\t" \

-      ".code 32                                                 \n\t");

-#endif

-

-#ifdef CH_CURRP_REGISTER_CACHE

-  asm("stmfd    sp!, {r4, r5, r6, r8, r9, r10, r11, lr}         \n\t" \

-      "str      sp, [r0, #16]                                   \n\t" \

-      "ldr      sp, [r1, #16]                                   \n\t");

-#ifdef THUMB_PRESENT

-  asm("ldmfd    sp!, {r4, r5, r6, r8, r9, r10, r11, lr}         \n\t" \

-      "bx       lr                                              \n\t");

-#else /* !THUMB_PRESENT */

-  asm("ldmfd    sp!, {r4, r5, r6, r8, r9, r10, r11, pc}         \n\t");

-#endif /* !THUMB_PRESENT */

-#else /* !CH_CURRP_REGISTER_CACHE */

-  asm("stmfd    sp!, {r4, r5, r6, r7, r8, r9, r10, r11, lr}     \n\t" \

-      "str      sp, [r0, #16]                                   \n\t" \

-      "ldr      sp, [r1, #16]                                   \n\t");

-#ifdef THUMB_PRESENT

-  asm("ldmfd    sp!, {r4, r5, r6, r7, r8, r9, r10, r11, lr}     \n\t" \

-      "bx       lr                                              \n\t");

-#else /* !THUMB_PRESENT */

-  asm("ldmfd    sp!, {r4, r5, r6, r7, r8, r9, r10, r11, pc}     \n\t");

-#endif /* !THUMB_PRESENT */

-#endif /* !CH_CURRP_REGISTER_CACHE */

-}

-

-/*

  * System console message (not implemented).

  */

 void chSysPuts(char *msg) {

 }

 

 /*

- * Common IRQ exit code, \p chSysIRQExitI() just jumps here.

- *

- * System stack frame structure after a context switch in the

- * interrupt handler:

- *

- * High +------------+

- *      |   LR_USR   | -+

- *      |     R12    |  |

- *      |     R3     |  |

- *      |     R2     |  | External context: IRQ handler frame

- *      |     R1     |  |

- *      |     R0     |  |

- *      |   LR_IRQ   |  |   (user code return address)

- *      |    SPSR    | -+   (user code status)

- *      |    ....    | <- chSchDoRescheduleI() stack frame, optimize it for space

- *      |     LR     | -+   (system code return address)

- *      |     R11    |  |

- *      |     R10    |  |

- *      |     R9     |  |

- *      |     R8     |  | Internal context: chSysSwitchI() frame

- *      |    (R7)    |  |   (optional, see CH_CURRP_REGISTER_CACHE)

- *      |     R6     |  |

- *      |     R5     |  |

- * SP-> |     R4     | -+

- * Low  +------------+

- */

-__attribute__((naked, weak))

-void IrqCommon(void) {

-  register BOOL b asm("r0");

-

-  VICVectAddr = 0;

-  b = chSchRescRequiredI();

-#ifdef THUMB

-  asm(".p2align 2,,                                             \n\t" \

-      "mov      lr, pc                                          \n\t" \

-      "bx       lr                                              \n\t" \

-      ".code 32                                                 \n\t");

-#endif

-  /*

-   * If a reschedulation is not required then just returns from the IRQ.

-   */

-  asm("cmp      r0, #0                                          \n\t" \

-      "ldmeqfd  sp!, {r0-r3, r12, lr}                           \n\t" \

-      "subeqs   pc, lr, #4                                      \n\t");

-  /*

-   * Reschedulation required, saves the external context on the

-   * system/user stack and empties the IRQ stack.

-   */

-  asm(".set     MODE_IRQ, 0x12                                  \n\t" \

-      ".set     MODE_SYS, 0x1F                                  \n\t" \

-      ".set     F_BIT, 0x40                                     \n\t" \

-      ".set     I_BIT, 0x80                                     \n\t" \

-      "ldmfd    sp!, {r0-r3, r12, lr}                           \n\t" \

-      "msr      CPSR_c, #MODE_SYS | I_BIT                       \n\t" \

-      "stmfd    sp!, {r0-r3, r12, lr}                           \n\t" \

-      "msr      CPSR_c, #MODE_IRQ | I_BIT                       \n\t" \

-      "mrs      r0, SPSR                                        \n\t" \

-      "mov      r1, lr                                          \n\t" \

-      "msr      CPSR_c, #MODE_SYS | I_BIT                       \n\t" \

-      "stmfd    sp!, {r0, r1}                                   \n\t");

-

-#ifdef THUMB_NO_INTERWORKING

-  asm("add      r0, pc, #1                                      \n\t" \

-      "bx       r0                                              \n\t" \

-      ".code 16                                                 \n\t" \

-      "bl       chSchDoRescheduleI                              \n\t" \

-      ".p2align 2,,                                             \n\t" \

-      "mov      lr, pc                                          \n\t" \

-      "bx       lr                                              \n\t" \

-      ".code 32                                                 \n\t");

-#else

-  asm("bl       chSchDoRescheduleI                              \n\t");

-#endif

-

-  /*

-   * Restores the external context.

-   */

-  asm("ldmfd    sp!, {r0, r1}                                   \n\t" \

-      "msr      CPSR_c, #MODE_IRQ | I_BIT                       \n\t" \

-      "msr      SPSR_fsxc, r0                                   \n\t" \

-      "mov      lr, r1                                          \n\t" \

-      "msr      CPSR_c, #MODE_SYS | I_BIT                       \n\t" \

-      "ldmfd    sp!, {r0-r3, r12, lr}                           \n\t" \

-      "msr      CPSR_c, #MODE_IRQ | I_BIT                       \n\t" \

-      "subs     pc, lr, #4                                      \n\t");

-

-  /*

-   * Threads entry/exit code. It is declared weak so you can easily replace it.

-   * NOTE: It is always invoked in ARM mode, it does the mode switching.

-   * NOTE: It is included into IrqCommon to make sure the symbol refers to

-   *       32 bit code.

-   */

-  asm(".weak threadstart                                        \n\t" \

-      ".globl threadstart                                       \n\t" \

-      "threadstart:                                             \n\t" \

-      "msr      CPSR_c, #MODE_SYS                               \n\t");

-#ifndef THUMB_NO_INTERWORKING

-  asm("mov      r0, r5                                          \n\t" \

-      "mov      lr, pc                                          \n\t" \

-      "bx       r4                                              \n\t" \

-      "bl       chThdExit                                       \n\t");

-#else

-  asm("add      r0, pc, #1                                      \n\t" \

-      "bx       r0                                              \n\t" \

-      ".code 16                                                 \n\t" \

-      "mov      r0, r5                                          \n\t" \

-      "bl       jmpr4                                           \n\t" \

-      "bl       chThdExit                                       \n\t" \

-      "jmpr4:                                                   \n\t" \

-      "bx       r4                                              \n\t");

-#endif

-}

-

-/*

  * System halt.

  */

 __attribute__((naked, weak))

 void chSysHalt(void) {

 

 #ifdef THUMB

-  asm("ldr      r0, =_halt32                                    \n\t" \

-      "bx       r0                                              \n\t");

+  asm("b        _halt16");

+#else

+  asm("b        _halt32");

 #endif

-  asm("b        _halt32                                         \n\t");

 }

diff --git a/ports/ARM7-LPC214x/crt0.s b/ports/ARM7-LPC214x/crt0.s
index d501770c8..91aec34b6 100644
--- a/ports/ARM7-LPC214x/crt0.s
+++ b/ports/ARM7-LPC214x/crt0.s
@@ -169,10 +169,4 @@ AbortHandler:
 .globl FiqHandler

 FiqHandler:

 

-.weak _halt32

-.globl _halt32

-_halt32:

-       mrs      r0, CPSR

-       orr      r0, #I_BIT | F_BIT

-       msr      CPSR_c, r0

 .loop: b        .loop

diff --git a/ports/ARM7-LPC214x/lpc214x_serial.c b/ports/ARM7-LPC214x/lpc214x_serial.c
index 35dc39867..88fc9ab91 100644
--- a/ports/ARM7-LPC214x/lpc214x_serial.c
+++ b/ports/ARM7-LPC214x/lpc214x_serial.c
@@ -101,6 +101,7 @@ void UART0IrqHandler(void) {
   chSysIRQEnterI();

 

   ServeInterrupt(U0Base, &COM1);

+  VICVectAddr = 0;

 

   chSysIRQExitI();

 }

@@ -111,6 +112,7 @@ void UART1IrqHandler(void) {
   chSysIRQEnterI();

 

   ServeInterrupt(U1Base, &COM2);

+  VICVectAddr = 0;

 

   chSysIRQExitI();

 }