git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@231 35acf78f-673a-0410-8e92-d51de3d6d3f4

4 files changed, 389 insertions, 0 deletions

diff --git a/ports/ARMCM3/chcore.c b/ports/ARMCM3/chcore.c
new file mode 100644
index 000000000..a98da808b
--- /dev/null
+++ b/ports/ARMCM3/chcore.c
@@ -0,0 +1,70 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+#include <ch.h>

+

+/*

+ * System idle thread loop.

+ */

+void _IdleThread(void *p) {

+

+  while (TRUE) {

+  }

+}

+

+/*

+ * System console message (not implemented).

+ */

+void chSysPuts(char *msg) {

+}

+

+/*

+ * Context switch.

+ */

+void chSysSwitchI(Thread *otp, Thread *ntp) {

+  register struct intctx * volatile sp asm("sp"); /* Don't ask... */

+

+#ifdef CH_CURRP_REGISTER_CACHE

+  asm ("" : : : "r4", "r5", "r6", "r8", "r9", "r10", "r11", "lr");

+#else

+  asm ("" : : : "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "lr");

+#endif

+  otp->p_ctx.r13 = sp;

+  sp = ntp->p_ctx.r13;

+}

+

+/*

+ * System halt.

+ */

+__attribute__((naked, weak))

+void chSysHalt(void) {

+

+  while (TRUE) {

+  }

+}

+

+__attribute__((naked, weak))

+void threadstart(void) {

+

+  chSysUnlock();

+  asm volatile ("mov     r0, r5                                 \n\t" \

+                "blx     r4                                     \n\t" \

+                "bl      chThdExit                              ");

+

+}

diff --git a/ports/ARMCM3/chcore.h b/ports/ARMCM3/chcore.h
new file mode 100644
index 000000000..706f49c28
--- /dev/null
+++ b/ports/ARMCM3/chcore.h
@@ -0,0 +1,103 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+#ifndef _CHCORE_H_

+#define _CHCORE_H_

+

+typedef void *regarm;

+

+/*

+ * Interrupt saved context.

+ */

+struct extctx {

+  regarm  spsr_irq;

+  regarm  lr_irq;

+  regarm  r0;

+  regarm  r1;

+  regarm  r2;

+  regarm  r3;

+  regarm  r12;

+};

+

+/*

+ * System saved context.

+ */

+struct intctx {

+  regarm  r4;

+  regarm  r5;

+  regarm  r6;

+#ifndef CH_CURRP_REGISTER_CACHE

+  regarm  r7;

+#endif

+  regarm  r8;

+  regarm  r9;

+  regarm  r10;

+  regarm  r11;

+  regarm  lr;

+};

+

+/*

+ * Port dependent part of the Thread structure, you may add fields in

+ * this structure.

+ */

+typedef struct {

+  struct intctx *r13;

+} Context;

+

+/*

+ * Platform dependent part of the \p chThdCreate() API.

+ */

+#define SETUP_CONTEXT(workspace, wsize, pf, arg) {                      \

+  tp->p_ctx.r13 = (struct intctx *)((uint8_t *)workspace +              \

+                                     wsize -                            \

+                                     sizeof(struct intctx));            \

+  tp->p_ctx.r13->r4 = pf;                                               \

+  tp->p_ctx.r13->r5 = arg;                                              \

+  tp->p_ctx.r13->lr = threadstart;                                      \

+}

+

+#define chSysLock() asm("cpsid   i")

+#define chSysUnlock() asm("cpsie   i")

+

+#define INT_REQUIRED_STACK 0x10

+#define StackAlign(n) ((((n) - 1) | 3) + 1)

+#define UserStackSize(n) StackAlign(sizeof(Thread) +                    \

+                                    sizeof(struct intctx) +             \

+                                    sizeof(struct extctx) +             \

+                                    (n) +                               \

+                                    INT_REQUIRED_STACK)

+#define WorkingArea(s, n) uint32_t s[UserStackSize(n) >> 2];

+

+#define chSysIRQEnterI() {                                              \

+}

+

+#define chSysIRQExitI() {                                               \

+  asm("b        IrqCommon                       \n\t");                 \

+}

+

+/* It requires zero bytes, but better be safe.*/

+#define IDLE_THREAD_STACK_SIZE 8

+void _IdleThread(void *p) __attribute__((noreturn));

+

+void chSysHalt(void);

+void chSysSwitchI(Thread *otp, Thread *ntp);

+void chSysPuts(char *msg);

+void threadstart(void);

+

+#endif /* _CHCORE_H_ */

diff --git a/ports/ARMCM3/chtypes.h b/ports/ARMCM3/chtypes.h
new file mode 100644
index 000000000..2fd609b1f
--- /dev/null
+++ b/ports/ARMCM3/chtypes.h
@@ -0,0 +1,44 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+#ifndef _CHTYPES_H_

+#define _CHTYPES_H_

+

+#define __need_NULL

+#define __need_size_t

+#include <stddef.h>

+

+#if !defined(_STDINT_H) && !defined(__STDINT_H_)

+#include <stdint.h>

+#endif

+

+typedef int8_t          bool_t;

+typedef uint8_t         tmode_t;

+typedef uint8_t         tstate_t;

+typedef uint16_t        tid_t;

+typedef uint32_t        tprio_t;

+typedef int32_t         msg_t;

+typedef int32_t         eventid_t;

+typedef uint32_t        eventmask_t;

+typedef uint32_t        systime_t;

+typedef int32_t         cnt_t;

+

+#define INLINE      inline

+

+#endif /* _CHTYPES_H_ */

diff --git a/ports/ARMCM3/crt0.s b/ports/ARMCM3/crt0.s
new file mode 100644
index 000000000..91aec34b6
--- /dev/null
+++ b/ports/ARMCM3/crt0.s
@@ -0,0 +1,172 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+/*

+ * Generic ARM startup file for ChibiOS/RT.

+ */

+

+.extern _main

+

+.set    MODE_USR, 0x10

+.set    MODE_FIQ, 0x11

+.set    MODE_IRQ, 0x12

+.set    MODE_SVC, 0x13

+.set    MODE_ABT, 0x17

+.set    MODE_UND, 0x1B

+.set    MODE_SYS, 0x1F

+

+.equ    I_BIT, 0x80

+.equ    F_BIT, 0x40

+

+.text

+.code 32

+.balign 4

+/*

+ * System entry points.

+ */

+_start:

+        b       ResetHandler

+        ldr     pc, _undefined

+        ldr     pc, _swi

+        ldr     pc, _prefetch

+        ldr     pc, _abort

+        nop

+        ldr     pc, [pc,#-0xFF0]        /* VIC - IRQ Vector Register */

+        ldr     pc, _fiq

+

+_undefined:

+        .word   UndHandler

+_swi:

+        .word   SwiHandler

+_prefetch:

+        .word   PrefetchHandler

+_abort:

+        .word   AbortHandler

+_fiq:

+        .word   FiqHandler

+        .word   0

+        .word   0

+        .word   0

+

+/*

+ * Reset handler.

+ */

+ResetHandler:

+        /*

+         * Stack pointers initialization.

+         */

+        ldr     r0, =__ram_end__

+        /* Undefined */

+        msr     CPSR_c, #MODE_UND | I_BIT | F_BIT

+        mov     sp, r0

+        ldr     r1, =__und_stack_size__

+        sub     r0, r0, r1

+        /* Abort */

+        msr     CPSR_c, #MODE_ABT | I_BIT | F_BIT

+        mov     sp, r0

+        ldr     r1, =__abt_stack_size__

+        sub     r0, r0, r1

+        /* FIQ */

+        msr     CPSR_c, #MODE_FIQ | I_BIT | F_BIT

+        mov     sp, r0

+        ldr     r1, =__fiq_stack_size__

+        sub     r0, r0, r1

+        /* IRQ */

+        msr     CPSR_c, #MODE_IRQ | I_BIT | F_BIT

+        mov     sp, r0

+        ldr     r1, =__irq_stack_size__

+        sub     r0, r0, r1

+        /* Supervisor */

+        msr     CPSR_c, #MODE_SVC | I_BIT | F_BIT

+        mov     sp, r0

+        ldr     r1, =__svc_stack_size__

+        sub     r0, r0, r1

+        /* System */

+        msr     CPSR_c, #MODE_SYS | I_BIT | F_BIT

+        mov     sp, r0

+//        ldr     r1, =__sys_stack_size__

+//        sub     r0, r0, r1

+        /*

+         * Data initialization.

+         * NOTE: It assumes that the DATA size is a multiple of 4.

+         */

+        ldr     r1, =_textdata

+        ldr     r2, =_data

+        ldr     r3, =_edata

+dataloop:

+        cmp     r2, r3

+        ldrlo   r0, [r1], #4

+        strlo   r0, [r2], #4

+        blo     dataloop

+        /*

+         * BSS initialization.

+         * NOTE: It assumes that the BSS size is a multiple of 4.

+         */

+        mov     r0, #0

+        ldr     r1, =_bss_start

+        ldr     r2, =_bss_end

+bssloop:

+        cmp     r1, r2

+        strlo   r0, [r1], #4

+        blo     bssloop

+        /*

+         * Application-provided HW initialization routine.

+         */

+#ifndef THUMB_NO_INTERWORKING

+        bl      hwinit

+        /*

+         * main(0, NULL).

+         */

+        mov     r0, #0

+        mov     r1, r0

+        bl      main

+        bl      chSysHalt

+#else

+        add     r0, pc, #1

+        bx      r0

+.code 16

+        bl      hwinit

+        mov     r0, #0

+        mov     r1, r0

+        bl      main

+        bl      chSysHalt

+.code 32

+#endif

+

+.weak UndHandler

+.globl UndHandler

+UndHandler:

+

+.weak SwiHandler

+.globl SwiHandler

+SwiHandler:

+

+.weak PrefetchHandler

+.globl PrefetchHandler

+PrefetchHandler:

+

+.weak AbortHandler

+.globl AbortHandler

+AbortHandler:

+

+.weak FiqHandler

+.globl FiqHandler

+FiqHandler:

+

+.loop: b        .loop