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| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2016-03-05 11:03:54 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2016-03-05 11:03:54 +0000 |
| commit | ffed4a0266e0ca47c1af542602c2a45b29d0e0ad (patch) | |
| tree | d1e1cf3fefe8e225dad67434cb839a2d15ba1307 /os | |
| parent | 712ecf57f92786cded15efb214e3eea76ed0332a (diff) | |
| download | ChibiOS-ffed4a0266e0ca47c1af542602c2a45b29d0e0ad.tar.gz ChibiOS-ffed4a0266e0ca47c1af542602c2a45b29d0e0ad.tar.bz2 ChibiOS-ffed4a0266e0ca47c1af542602c2a45b29d0e0ad.zip | |
Fixed bug #723.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9017 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os')
| -rw-r--r-- | os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c | 27 | ||||
| -rw-r--r-- | os/hal/ports/STM32/LLD/GPIOv3/pal_lld.c | 27 |
2 files changed, 40 insertions, 14 deletions
diff --git a/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c b/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c index 10fc1a72b..b4545f094 100644 --- a/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c +++ b/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c @@ -171,17 +171,30 @@ void _pal_lld_setgroupmode(ioportid_t port, uint32_t altrmask, m1, m2, m4;
altrmask = altr << ((bit & 7) * 4);
- m4 = 15 << ((bit & 7) * 4);
- if (bit < 8)
- port->AFRL = (port->AFRL & ~m4) | altrmask;
- else
- port->AFRH = (port->AFRH & ~m4) | altrmask;
m1 = 1 << bit;
- port->OTYPER = (port->OTYPER & ~m1) | otyper;
m2 = 3 << (bit * 2);
+ m4 = 15 << ((bit & 7) * 4);
+ port->OTYPER = (port->OTYPER & ~m1) | otyper;
port->OSPEEDR = (port->OSPEEDR & ~m2) | ospeedr;
port->PUPDR = (port->PUPDR & ~m2) | pupdr;
- port->MODER = (port->MODER & ~m2) | moder;
+ if (moder == PAL_STM32_MODE_ALTERNATE) {
+ /* If going in alternate mode then the alternate number is set
+ before switching mode in order to avoid glitches.*/
+ if (bit < 8)
+ port->AFRL = (port->AFRL & ~m4) | altrmask;
+ else
+ port->AFRH = (port->AFRH & ~m4) | altrmask;
+ port->MODER = (port->MODER & ~m2) | moder;
+ }
+ else {
+ /* If going into a non-alternate mode then the mode is switched
+ before setting the alternate mode in order to avoid glitches.*/
+ port->MODER = (port->MODER & ~m2) | moder;
+ if (bit < 8)
+ port->AFRL = (port->AFRL & ~m4) | altrmask;
+ else
+ port->AFRH = (port->AFRH & ~m4) | altrmask;
+ }
}
mask >>= 1;
if (!mask)
diff --git a/os/hal/ports/STM32/LLD/GPIOv3/pal_lld.c b/os/hal/ports/STM32/LLD/GPIOv3/pal_lld.c index 5f96bb785..b45f7fe15 100644 --- a/os/hal/ports/STM32/LLD/GPIOv3/pal_lld.c +++ b/os/hal/ports/STM32/LLD/GPIOv3/pal_lld.c @@ -156,18 +156,31 @@ void _pal_lld_setgroupmode(ioportid_t port, uint32_t altrmask, m1, m2, m4;
altrmask = altr << ((bit & 7) * 4);
- m4 = 15 << ((bit & 7) * 4);
- if (bit < 8)
- port->AFRL = (port->AFRL & ~m4) | altrmask;
- else
- port->AFRH = (port->AFRH & ~m4) | altrmask;
m1 = 1 << bit;
+ m2 = 3 << (bit * 2);
+ m4 = 15 << ((bit & 7) * 4);
port->OTYPER = (port->OTYPER & ~m1) | otyper;
port->ASCR = (port->ASCR & ~m1) | ascr;
- m2 = 3 << (bit * 2);
port->OSPEEDR = (port->OSPEEDR & ~m2) | ospeedr;
port->PUPDR = (port->PUPDR & ~m2) | pupdr;
- port->MODER = (port->MODER & ~m2) | moder;
+ if (moder == PAL_STM32_MODE_ALTERNATE) {
+ /* If going in alternate mode then the alternate number is set
+ before switching mode in order to avoid glitches.*/
+ if (bit < 8)
+ port->AFRL = (port->AFRL & ~m4) | altrmask;
+ else
+ port->AFRH = (port->AFRH & ~m4) | altrmask;
+ port->MODER = (port->MODER & ~m2) | moder;
+ }
+ else {
+ /* If going into a non-alternate mode then the mode is switched
+ before setting the alternate mode in order to avoid glitches.*/
+ port->MODER = (port->MODER & ~m2) | moder;
+ if (bit < 8)
+ port->AFRL = (port->AFRL & ~m4) | altrmask;
+ else
+ port->AFRH = (port->AFRH & ~m4) | altrmask;
+ }
port->LOCKR = (port->LOCKR & ~m1) | lockr;
}
mask >>= 1;
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