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| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2016-06-04 08:28:16 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2016-06-04 08:28:16 +0000 |
| commit | f8f2ea1763d1494c0f51fe941e4ee324eeb0a572 (patch) | |
| tree | e3beda9939707b7510b005237b6faa98ec62df7e /os | |
| parent | f558772bb8f099bdab54fa4f431a9536937d1e3d (diff) | |
| download | ChibiOS-f8f2ea1763d1494c0f51fe941e4ee324eeb0a572.tar.gz ChibiOS-f8f2ea1763d1494c0f51fe941e4ee324eeb0a572.tar.bz2 ChibiOS-f8f2ea1763d1494c0f51fe941e4ee324eeb0a572.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9567 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os')
| -rw-r--r-- | os/ex/Micron/m25q.c | 43 | ||||
| -rw-r--r-- | os/hal/ports/STM32/LLD/QUADSPIv1/hal_qspi_lld.h | 2 |
2 files changed, 27 insertions, 18 deletions
diff --git a/os/ex/Micron/m25q.c b/os/ex/Micron/m25q.c index a8a226c7d..21ff90061 100644 --- a/os/ex/Micron/m25q.c +++ b/os/ex/Micron/m25q.c @@ -453,30 +453,38 @@ static void flash_cmd_addr_dummy_receive(M25QDriver *devp, } void flash_reset_xip(M25QDriver *devp) { + static const uint8_t flash_conf[1] = { + (M25Q_READ_DUMMY_CYCLES << 4U) | 0x0FU + }; qspi_command_t cmd; uint8_t buf[1]; /* Resetting XIP mode by reading one byte without XIP confirmation bit.*/ - cmd.cfg = QSPI_CFG_CMD(M25Q_CMD_FAST_READ) | - QSPI_CFG_ADDR_SIZE_24 | + cmd.alt = 0xFF; + cmd.addr = 0; + cmd.cfg = QSPI_CFG_CMD_MODE_NONE | + QSPI_CFG_ADDR_SIZE_24 | #if M25Q_BUS_MODE == M25Q_BUS_MODE_QSPI1L - QSPI_CFG_CMD_MODE_ONE_LINE | - QSPI_CFG_ADDR_MODE_ONE_LINE | - QSPI_CFG_DATA_MODE_ONE_LINE | + QSPI_CFG_ADDR_MODE_ONE_LINE | + QSPI_CFG_DATA_MODE_ONE_LINE | #elif M25Q_BUS_MODE == M25Q_BUS_MODE_QSPI2L - QSPI_CFG_CMD_MODE_TWO_LINES | - QSPI_CFG_ADDR_MODE_TWO_LINES | - QSPI_CFG_DATA_MODE_TWO_LINES | + QSPI_CFG_ADDR_MODE_TWO_LINES | + QSPI_CFG_DATA_MODE_TWO_LINES | #else - QSPI_CFG_CMD_MODE_FOUR_LINES | - QSPI_CFG_ADDR_MODE_FOUR_LINES | - QSPI_CFG_DATA_MODE_FOUR_LINES | + QSPI_CFG_ADDR_MODE_FOUR_LINES | + QSPI_CFG_DATA_MODE_FOUR_LINES | #endif - QSPI_CFG_ALT_MODE_FOUR_LINES | /* Always 4 lines, note.*/ - QSPI_CFG_DUMMY_CYCLES(M25Q_READ_DUMMY_CYCLES - 2); - cmd.alt = 0xFF; - cmd.addr = 0; + QSPI_CFG_ALT_MODE_FOUR_LINES | /* Always 4 lines, note.*/ + QSPI_CFG_ALT_SIZE_8 | + QSPI_CFG_DUMMY_CYCLES(M25Q_READ_DUMMY_CYCLES - 2); qspiReceive(devp->config->qspip, &cmd, 1, buf); + + /* Enabling write operation.*/ + flash_cmd(devp, M25Q_CMD_WRITE_ENABLE); + + /* Rewriting volatile configuration register.*/ + flash_cmd_send(devp, M25Q_CMD_WRITE_V_CONF_REGISTER, 1, flash_conf); + } void flash_reset_memory(M25QDriver *devp) { @@ -970,14 +978,14 @@ void m25qStart(M25QDriver *devp, const M25QConfig *config) { #if (M25Q_BUS_MODE != M25Q_BUS_MODE_SPI) { - static const uint8_t flash_status[1] = { + static const uint8_t flash_conf[1] = { (M25Q_READ_DUMMY_CYCLES << 4U) | 0x0FU }; /* Setting up the dummy cycles to be used for fast read operations.*/ flash_cmd(devp, M25Q_CMD_WRITE_ENABLE); flash_cmd_send(devp, M25Q_CMD_WRITE_V_CONF_REGISTER, - 1, flash_status); + 1, flash_conf); } #endif @@ -1067,6 +1075,7 @@ void m25qMemoryMap(M25QDriver *devp, uint8_t **addrp) { QSPI_CFG_DATA_MODE_FOUR_LINES | #endif QSPI_CFG_ALT_MODE_FOUR_LINES | /* Always 4 lines, note.*/ + QSPI_CFG_ALT_SIZE_8 | QSPI_CFG_SIOO | QSPI_CFG_DUMMY_CYCLES(M25Q_READ_DUMMY_CYCLES - 2); diff --git a/os/hal/ports/STM32/LLD/QUADSPIv1/hal_qspi_lld.h b/os/hal/ports/STM32/LLD/QUADSPIv1/hal_qspi_lld.h index 8e3acfa57..4fdb6ba14 100644 --- a/os/hal/ports/STM32/LLD/QUADSPIv1/hal_qspi_lld.h +++ b/os/hal/ports/STM32/LLD/QUADSPIv1/hal_qspi_lld.h @@ -73,7 +73,7 @@ * find the details in the data sheet.
*/
#if !defined(STM32_QSPI_QUADSPI1_PRESCALER_VALUE) || defined(__DOXYGEN__)
-#define STM32_QSPI_QUADSPI1_PRESCALER_VALUE 4
+#define STM32_QSPI_QUADSPI1_PRESCALER_VALUE 16
#endif
/**
|