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authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2014-03-07 18:01:52 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2014-03-07 18:01:52 +0000
commitf40d33139e0bd179b766d1576dfd7b494734ff67 (patch)
tree6fcbd334cee9a403af77970bcb9a7cb1e7d2738e /os
parent8028c122f6ded22262e3b2cb553722e604b99fb3 (diff)
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STM32 GPT enhancements.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@6758 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os')
-rw-r--r--os/hal/ports/STM32/LLD/TIMv1/gpt_lld.c4
-rw-r--r--os/hal/ports/STM32/LLD/TIMv1/gpt_lld.h5
2 files changed, 7 insertions, 2 deletions
diff --git a/os/hal/ports/STM32/LLD/TIMv1/gpt_lld.c b/os/hal/ports/STM32/LLD/TIMv1/gpt_lld.c
index b817c5d26..2852f383a 100644
--- a/os/hal/ports/STM32/LLD/TIMv1/gpt_lld.c
+++ b/os/hal/ports/STM32/LLD/TIMv1/gpt_lld.c
@@ -602,10 +602,10 @@ void gpt_lld_start(GPTDriver *gptp) {
/* Timer configuration.*/
gptp->tim->CR1 = 0; /* Initially stopped. */
- gptp->tim->CR2 = STM32_TIM_CR2_CCDS; /* DMA on UE (if any). */
+ gptp->tim->CR2 = gptp->config->cr2;
gptp->tim->PSC = psc; /* Prescaler value. */
gptp->tim->DIER = gptp->config->dier & /* DMA-related DIER bits. */
- STM32_TIM_DIER_IRQ_MASK;
+ ~STM32_TIM_DIER_IRQ_MASK;
gptp->tim->SR = 0; /* Clear pending IRQs. */
}
diff --git a/os/hal/ports/STM32/LLD/TIMv1/gpt_lld.h b/os/hal/ports/STM32/LLD/TIMv1/gpt_lld.h
index 56dc04f6b..4a914133e 100644
--- a/os/hal/ports/STM32/LLD/TIMv1/gpt_lld.h
+++ b/os/hal/ports/STM32/LLD/TIMv1/gpt_lld.h
@@ -387,6 +387,11 @@ typedef struct {
gptcallback_t callback;
/* End of the mandatory fields.*/
/**
+ * @brief TIM CR2 register initialization data.
+ * @note The value of this field should normally be equal to zero.
+ */
+ uint32_t cr2;
+ /**
* @brief TIM DIER register initialization data.
* @note The value of this field should normally be equal to zero.
* @note Only the DMA-related bits can be specified in this field.