aboutsummaryrefslogtreecommitdiffstats
path: root/os
diff options
context:
space:
mode:
authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2012-04-01 09:13:04 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2012-04-01 09:13:04 +0000
commitf038bffdb512f67d4f90e8cba499713458eebd67 (patch)
tree89bdebf9eecc81442ccca5db2e1a47da20deb323 /os
parent148eeef2e7ea57ee06ad8776417dca48c2d3ff6d (diff)
downloadChibiOS-f038bffdb512f67d4f90e8cba499713458eebd67.tar.gz
ChibiOS-f038bffdb512f67d4f90e8cba499713458eebd67.tar.bz2
ChibiOS-f038bffdb512f67d4f90e8cba499713458eebd67.zip
Fixed bug 3510812.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4066 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os')
-rw-r--r--os/hal/platforms/STM32L1xx/stm32l1xx.h8
-rw-r--r--os/ports/GCC/ARM/chcore.h2
-rw-r--r--os/ports/GCC/ARMCMx/chcore_v7m.h2
-rw-r--r--os/ports/GCC/AVR/chcore.h2
-rw-r--r--os/ports/GCC/MSP430/chcore.h2
-rw-r--r--os/ports/IAR/ARMCMx/chcore_v7m.h2
-rw-r--r--os/ports/RC/STM8/chcore.h2
-rw-r--r--os/ports/RVCT/ARMCMx/chcore_v7m.h2
-rw-r--r--os/ports/cosmic/STM8/chcore.h2
9 files changed, 12 insertions, 12 deletions
diff --git a/os/hal/platforms/STM32L1xx/stm32l1xx.h b/os/hal/platforms/STM32L1xx/stm32l1xx.h
index 9c665d29b..0870e768e 100644
--- a/os/hal/platforms/STM32L1xx/stm32l1xx.h
+++ b/os/hal/platforms/STM32L1xx/stm32l1xx.h
@@ -2602,10 +2602,10 @@ typedef struct
#define RCC_ICSCR_HSITRIM ((uint32_t)0x00001F00) /*!< Internal High Speed clock trimming */
#define RCC_ICSCR_MSIRANGE ((uint32_t)0x0000E000) /*!< Internal Multi Speed clock Range */
-#define RCC_ICSCR_MSIRANGE_0 ((uint32_t)0x00000000) /*!< Internal Multi Speed clock Range 65.536 KHz */
-#define RCC_ICSCR_MSIRANGE_1 ((uint32_t)0x00002000) /*!< Internal Multi Speed clock Range 131.072 KHz */
-#define RCC_ICSCR_MSIRANGE_2 ((uint32_t)0x00004000) /*!< Internal Multi Speed clock Range 262.144 KHz */
-#define RCC_ICSCR_MSIRANGE_3 ((uint32_t)0x00006000) /*!< Internal Multi Speed clock Range 524.288 KHz */
+#define RCC_ICSCR_MSIRANGE_0 ((uint32_t)0x00000000) /*!< Internal Multi Speed clock Range 65.536 kHz */
+#define RCC_ICSCR_MSIRANGE_1 ((uint32_t)0x00002000) /*!< Internal Multi Speed clock Range 131.072 kHz */
+#define RCC_ICSCR_MSIRANGE_2 ((uint32_t)0x00004000) /*!< Internal Multi Speed clock Range 262.144 kHz */
+#define RCC_ICSCR_MSIRANGE_3 ((uint32_t)0x00006000) /*!< Internal Multi Speed clock Range 524.288 kHz */
#define RCC_ICSCR_MSIRANGE_4 ((uint32_t)0x00008000) /*!< Internal Multi Speed clock Range 1.048 MHz */
#define RCC_ICSCR_MSIRANGE_5 ((uint32_t)0x0000A000) /*!< Internal Multi Speed clock Range 2.097 MHz */
#define RCC_ICSCR_MSIRANGE_6 ((uint32_t)0x0000C000) /*!< Internal Multi Speed clock Range 4.194 MHz */
diff --git a/os/ports/GCC/ARM/chcore.h b/os/ports/GCC/ARM/chcore.h
index 7629aea41..47fca447e 100644
--- a/os/ports/GCC/ARM/chcore.h
+++ b/os/ports/GCC/ARM/chcore.h
@@ -379,7 +379,7 @@ struct context {
/**
* @brief Disables all the interrupt sources.
- * @note Of course non maskable interrupt sources are not included.
+ * @note Of course non-maskable interrupt sources are not included.
* @note In this port it disables both the IRQ and FIQ sources.
* @note Implements a workaround for spurious interrupts taken from the NXP
* LPC214x datasheet.
diff --git a/os/ports/GCC/ARMCMx/chcore_v7m.h b/os/ports/GCC/ARMCMx/chcore_v7m.h
index e6b616dd6..407b6b571 100644
--- a/os/ports/GCC/ARMCMx/chcore_v7m.h
+++ b/os/ports/GCC/ARMCMx/chcore_v7m.h
@@ -414,7 +414,7 @@ struct context {
/**
* @brief Disables all the interrupt sources.
- * @note Of course non maskable interrupt sources are not included.
+ * @note Of course non-maskable interrupt sources are not included.
* @note In this port it disables all the interrupt sources by raising
* the priority mask to level 0.
*/
diff --git a/os/ports/GCC/AVR/chcore.h b/os/ports/GCC/AVR/chcore.h
index 18273c0d4..7f11de61b 100644
--- a/os/ports/GCC/AVR/chcore.h
+++ b/os/ports/GCC/AVR/chcore.h
@@ -274,7 +274,7 @@ struct context {
/**
* @brief Disables all the interrupt sources.
- * @note Of course non maskable interrupt sources are not included.
+ * @note Of course non-maskable interrupt sources are not included.
* @note Implemented as global interrupt disable.
*/
#define port_disable() asm volatile ("cli" : : : "memory")
diff --git a/os/ports/GCC/MSP430/chcore.h b/os/ports/GCC/MSP430/chcore.h
index 6a94f7394..d5cc1f512 100644
--- a/os/ports/GCC/MSP430/chcore.h
+++ b/os/ports/GCC/MSP430/chcore.h
@@ -247,7 +247,7 @@ struct context {
/**
* @brief Disables all the interrupt sources.
- * @note Of course non maskable interrupt sources are not included.
+ * @note Of course non-maskable interrupt sources are not included.
* @note Implemented as global interrupt disable.
*/
#define port_disable() asm volatile ("dint" : : : "memory")
diff --git a/os/ports/IAR/ARMCMx/chcore_v7m.h b/os/ports/IAR/ARMCMx/chcore_v7m.h
index c8b7f67ff..8615eaab6 100644
--- a/os/ports/IAR/ARMCMx/chcore_v7m.h
+++ b/os/ports/IAR/ARMCMx/chcore_v7m.h
@@ -402,7 +402,7 @@ struct context {
/**
* @brief Disables all the interrupt sources.
- * @note Of course non maskable interrupt sources are not included.
+ * @note Of course non-maskable interrupt sources are not included.
* @note In this port it disables all the interrupt sources by raising
* the priority mask to level 0.
*/
diff --git a/os/ports/RC/STM8/chcore.h b/os/ports/RC/STM8/chcore.h
index e3e853467..b72f066c4 100644
--- a/os/ports/RC/STM8/chcore.h
+++ b/os/ports/RC/STM8/chcore.h
@@ -256,7 +256,7 @@ struct stm8_startctx {
/**
* @brief Disables all the interrupt sources.
* @note Implemented as global interrupts disable.
- * @note Of course non maskable interrupt sources are not included.
+ * @note Of course non-maskable interrupt sources are not included.
*/
#define port_disable() _sim_()
diff --git a/os/ports/RVCT/ARMCMx/chcore_v7m.h b/os/ports/RVCT/ARMCMx/chcore_v7m.h
index 6feaf3af5..b568d5e5a 100644
--- a/os/ports/RVCT/ARMCMx/chcore_v7m.h
+++ b/os/ports/RVCT/ARMCMx/chcore_v7m.h
@@ -408,7 +408,7 @@ struct context {
/**
* @brief Disables all the interrupt sources.
- * @note Of course non maskable interrupt sources are not included.
+ * @note Of course non-maskable interrupt sources are not included.
* @note In this port it disables all the interrupt sources by raising
* the priority mask to level 0.
*/
diff --git a/os/ports/cosmic/STM8/chcore.h b/os/ports/cosmic/STM8/chcore.h
index 5a06eea3a..895dc717e 100644
--- a/os/ports/cosmic/STM8/chcore.h
+++ b/os/ports/cosmic/STM8/chcore.h
@@ -253,7 +253,7 @@ struct stm8_startctx {
/**
* @brief Disables all the interrupt sources.
* @note Implemented as global interrupts disable.
- * @note Of course non maskable interrupt sources are not included.
+ * @note Of course non-maskable interrupt sources are not included.
*/
#define port_disable() _asm("sim")