Unified RTC demo, more RTC and EXTI changes, not finished.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12434 110e8d01-0319-4d1e-a829-52ad28d1bb01

9 files changed, 121 insertions, 110 deletions

diff --git a/os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.c b/os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.c
index b5798bc80..2e78f49fe 100644
--- a/os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.c
+++ b/os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.c
@@ -251,46 +251,48 @@ OSAL_IRQ_HANDLER(STM32_RTC_COMMON_HANDLER) {
   RTCD1.rtc->ISR = 0U;

 

   if (RTCD1.callback != NULL) {

-    if ((isr & RTC_ISR_WUTF) != 0U) {

+    uint32_t cr = RTCD1-rtc->CR;

+    uint32_t tampcr = RTCD1.rtc->TAMPCR;

+

+    if (((cr & RTC_CR_WUTIE) != 0U) && ((isr & RTC_ISR_WUTF) != 0U)) {

       RTCD1.callback(&RTCD1, RTC_EVENT_WAKEUP);

     }

+

 #if defined(RTC_ISR_ALRAF)

-    if ((isr & RTC_ISR_ALRAF) != 0U) {

+    if (((cr & RTC_CR_ALRAIE) != 0U) && ((isr & RTC_ISR_ALRAF) != 0U)) {

       RTCD1.callback(&RTCD1, RTC_EVENT_ALARM_A);

     }

 #endif

 #if defined(RTC_ISR_ALRBF)

-    if ((isr & RTC_ISR_ALRBF) != 0U) {

+    if (((cr & RTC_CR_ALRBIE) != 0U) && ((isr & RTC_ISR_ALRBF) != 0U)) {

       RTCD1.callback(&RTCD1, RTC_EVENT_ALARM_B);

     }

 #endif

-#if defined(RTC_ISR_ITSF)

-    if ((isr & RTC_ISR_ITSF) != 0U) {

-      RTCD1.callback(&RTCD1, RTC_EVENT_ITS);

-    }

-#endif

-#if defined(RTC_ISR_TSF)

-    if ((isr & RTC_ISR_TSF) != 0U) {

-      RTCD1.callback(&RTCD1, RTC_EVENT_TS);

-    }

-#endif

-#if defined(RTC_ISR_TSOVF)

-    if ((isr & RTC_ISR_TSOVF) != 0U) {

-      RTCD1.callback(&RTCD1, RTC_EVENT_TS_OVF);

+

+    if ((cr & RTC_CR_TSIE) != 0U) {

+      if ((isr & RTC_ISR_TSF) != 0U) {

+        RTCD1.callback(&RTCD1, RTC_EVENT_TS);

+      }

+      if ((isr & RTC_ISR_TSOVF) != 0U) {

+        RTCD1.callback(&RTCD1, RTC_EVENT_TS_OVF);

+      }

     }

-#endif

+

 #if defined(RTC_ISR_TAMP1F)

-    if ((isr & RTC_ISR_TAMP1F) != 0U) {

+    if (((tampcr & RTC_TAMPCR_TAMP1IE) != 0U) &&

+        ((isr & RTC_ISR_TAMP1F) != 0U)) {

       RTCD1.callback(&RTCD1, RTC_EVENT_TAMP1);

     }

 #endif

 #if defined(RTC_ISR_TAMP2F)

-    if ((isr & RTC_ISR_TAMP2F) != 0U) {

+    if (((tampcr & RTC_TAMPCR_TAMP2IE) != 0U) &&

+        ((isr & RTC_ISR_TAMP2F) != 0U)) {

       RTCD1.callback(&RTCD1, RTC_EVENT_TAMP2);

     }

 #endif

 #if defined(RTC_ISR_TAMP3F)

-    if ((isr & RTC_ISR_TAMP3F) != 0U) {

+    if (((tampcr & RTC_TAMPCR_TAMP3IE) != 0U) &&

+        ((isr & RTC_ISR_TAMP3F) != 0U)) {

       RTCD1.callback(&RTCD1, RTC_EVENT_TAMP3);

     }

 #endif

@@ -314,15 +316,8 @@ OSAL_IRQ_HANDLER(STM32_RTC_TAMP_STAMP_HANDLER) {
   OSAL_IRQ_PROLOGUE();

 

   clear = ~(0U

-#if defined(RTC_ISR_ITSF)

-            | RTC_ISR_ITSF

-#endif

-#if defined(RTC_ISR_TSF)

             | RTC_ISR_TSF

-#endif

-#if defined(RTC_ISR_TSOVF)

             | RTC_ISR_TSOVF

-#endif

 #if defined(RTC_ISR_TAMP1F)

             | RTC_ISR_TAMP1F

 #endif

@@ -338,33 +333,34 @@ OSAL_IRQ_HANDLER(STM32_RTC_TAMP_STAMP_HANDLER) {
   RTCD1.rtc->ISR = clear;

 

   if (RTCD1.callback != NULL) {

-#if defined(RTC_ISR_ITSF)

-    if ((isr & RTC_ISR_ITSF) != 0U) {

-      RTCD1.callback(&RTCD1, RTC_EVENT_ITS);

+    uint32_t cr, tampcr;

+

+    cr = RTCD1.rtc->CR;

+    if ((cr & RTC_CR_TSIE) != 0U) {

+      if ((isr & RTC_ISR_TSF) != 0U) {

+        RTCD1.callback(&RTCD1, RTC_EVENT_TS);

+      }

+      if ((isr & RTC_ISR_TSOVF) != 0U) {

+        RTCD1.callback(&RTCD1, RTC_EVENT_TS_OVF);

+      }

     }

-#endif

-#if defined(RTC_ISR_TSF)

-    if ((isr & RTC_ISR_TSF) != 0U) {

-      RTCD1.callback(&RTCD1, RTC_EVENT_TS);

-    }

-#endif

-#if defined(RTC_ISR_TSOVF)

-    if ((isr & RTC_ISR_TSOVF) != 0U) {

-      RTCD1.callback(&RTCD1, RTC_EVENT_TS_OVF);

-    }

-#endif

+

+    tampcr = RTCD1.rtc->TAMPCR;

 #if defined(RTC_ISR_TAMP1F)

-    if ((isr & RTC_ISR_TAMP1F) != 0U) {

+    if (((tampcr & RTC_TAMPCR_TAMP1IE) != 0U) &&

+        ((isr & RTC_ISR_TAMP1F) != 0U)) {

       RTCD1.callback(&RTCD1, RTC_EVENT_TAMP1);

     }

 #endif

 #if defined(RTC_ISR_TAMP2F)

-    if ((isr & RTC_ISR_TAMP2F) != 0U) {

+    if (((tampcr & RTC_TAMPCR_TAMP2IE) != 0U) &&

+        ((isr & RTC_ISR_TAMP2F) != 0U)) {

       RTCD1.callback(&RTCD1, RTC_EVENT_TAMP2);

     }

 #endif

 #if defined(RTC_ISR_TAMP3F)

-    if ((isr & RTC_ISR_TAMP3F) != 0U) {

+    if (((tampcr & RTC_TAMPCR_TAMP3IE) != 0U) &&

+        ((isr & RTC_ISR_TAMP3F) != 0U)) {

       RTCD1.callback(&RTCD1, RTC_EVENT_TAMP3);

     }

 #endif

@@ -386,7 +382,9 @@ OSAL_IRQ_HANDLER(STM32_RTC_WKUP_HANDLER) {
   RTCD1.rtc->ISR = ~RTC_ISR_WUTF;

 

   if (RTCD1.callback != NULL) {

-    if ((isr & RTC_ISR_WUTF) != 0U) {

+    uint32_t cr = RTCD1.rtc->CR;

+

+    if (((cr & RTC_CR_WUTIE) != 0U) && ((isr & RTC_ISR_WUTF) != 0U)) {

       RTCD1.callback(&RTCD1, RTC_EVENT_WAKEUP);

     }

   }

@@ -417,13 +415,14 @@ OSAL_IRQ_HANDLER(STM32_RTC_ALARM_HANDLER) {
   RTCD1.rtc->ISR = clear;

 

   if (RTCD1.callback != NULL) {

+    uint32_t cr = RTCD1.rtc->CR;

 #if defined(RTC_ISR_ALRAF)

-    if ((isr & RTC_ISR_ALRAF) != 0U) {

+    if (((cr & RTC_CR_ALRAIE) != 0U) && ((isr & RTC_ISR_ALRAF) != 0U)) {

       RTCD1.callback(&RTCD1, RTC_EVENT_ALARM_A);

     }

 #endif

 #if defined(RTC_ISR_ALRBF)

-    if ((isr & RTC_ISR_ALRBF) != 0U) {

+    if (((cr & RTC_CR_ALRBIE) != 0U) && ((isr & RTC_ISR_ALRBF) != 0U)) {

       RTCD1.callback(&RTCD1, RTC_EVENT_ALARM_B);

     }

 #endif

diff --git a/os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.h b/os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.h
index 7686760af..5aae1ab99 100644
--- a/os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.h
+++ b/os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.h
@@ -158,9 +158,8 @@ typedef enum {
   RTC_EVENT_TAMP1       = 4,            /** Tamper 1.                       */

   RTC_EVENT_TAMP2       = 5,            /** Tamper 2-                       */

   RTC_EVENT_TAMP3       = 6,            /** Tamper 3.                       */

-  RTC_EVENT_WAKEUP      = 7,            /** Wakeup.                         */

-  RTC_EVENT_ITS         = 8             /** Internal time stamp.            */

-} rtcevent_t;

+  RTC_EVENT_WAKEUP      = 7             /** Wakeup.                         */

+ } rtcevent_t;

 

 /**

  * @brief   Type of a generic RTC callback.

diff --git a/os/hal/ports/STM32/STM32L4xx+/hal_lld.h b/os/hal/ports/STM32/STM32L4xx+/hal_lld.h
index 172a7740f..6f22c4c7a 100644
--- a/os/hal/ports/STM32/STM32L4xx+/hal_lld.h
+++ b/os/hal/ports/STM32/STM32L4xx+/hal_lld.h
@@ -2391,6 +2391,7 @@
 #include "mpu_v7m.h"

 #include "stm32_isr.h"

 #include "stm32_dma.h"

+#include "stm32_exti.h"

 #include "stm32_rcc.h"

 

 #ifdef __cplusplus

diff --git a/os/hal/ports/STM32/STM32L4xx+/platform.mk b/os/hal/ports/STM32/STM32L4xx+/platform.mk
index 074cbf131..d86232d53 100644
--- a/os/hal/ports/STM32/STM32L4xx+/platform.mk
+++ b/os/hal/ports/STM32/STM32L4xx+/platform.mk
@@ -25,6 +25,7 @@ include $(CHIBIOS)/os/hal/ports/STM32/LLD/ADCv3/driver.mk
 include $(CHIBIOS)/os/hal/ports/STM32/LLD/CANv1/driver.mk

 include $(CHIBIOS)/os/hal/ports/STM32/LLD/DACv1/driver.mk

 include $(CHIBIOS)/os/hal/ports/STM32/LLD/DMAv1/driver.mk

+include $(CHIBIOS)/os/hal/ports/STM32/LLD/EXTIv1/driver.mk

 include $(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv3/driver.mk

 include $(CHIBIOS)/os/hal/ports/STM32/LLD/I2Cv3/driver.mk

 include $(CHIBIOS)/os/hal/ports/STM32/LLD/OCTOSPIv1/driver.mk

diff --git a/os/hal/ports/STM32/STM32L4xx+/stm32_registry.h b/os/hal/ports/STM32/STM32L4xx+/stm32_registry.h
index 2c6123093..590db30f0 100644
--- a/os/hal/ports/STM32/STM32L4xx+/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32L4xx+/stm32_registry.h
@@ -35,6 +35,33 @@
  */

 

 /*===========================================================================*/

+/* Common.                                                                   */

+/*===========================================================================*/

+

+/* RNG attributes.*/

+#define STM32_HAS_RNG1                      TRUE

+

+/* RTC attributes.*/

+#define STM32_HAS_RTC                       TRUE

+#define STM32_RTC_HAS_SUBSECONDS            TRUE

+#define STM32_RTC_HAS_PERIODIC_WAKEUPS      TRUE

+#define STM32_RTC_NUM_ALARMS                2

+#define STM32_RTC_TAMP_STAMP_HANDLER        Vector48

+#define STM32_RTC_WKUP_HANDLER              Vector49

+#define STM32_RTC_ALARM_HANDLER             VectorE4

+#define STM32_RTC_TAMP_STAMP_NUMBER         2

+#define STM32_RTC_WKUP_NUMBER               3

+#define STM32_RTC_ALARM_NUMBER              41

+#define STM32_RTC_ALARM_EXTI                18

+#define STM32_RTC_TAMP_STAMP_EXTI           19

+#define STM32_RTC_WKUP_EXTI                 20

+#define STM32_RTC_IRQ_ENABLE() do {                                         \

+  nvicEnableVector(STM32_RTC_TAMP_STAMP_NUMBER, STM32_IRQ_EXTI19_PRIORITY); \

+  nvicEnableVector(STM32_RTC_WKUP_NUMBER, STM32_IRQ_EXTI20_PRIORITY);       \

+  nvicEnableVector(STM32_RTC_ALARM_NUMBER, STM32_IRQ_EXTI18_PRIORITY);      \

+} while (false)

+

+/*===========================================================================*/

 /* STM32L4yyxx+.                                                             */

 /*===========================================================================*/

 

@@ -113,6 +140,10 @@
 #define STM32_HAS_ETH                       FALSE

 

 /* EXTI attributes.*/

+#define STM32_EXTI_NUM_LINES                41

+#define STM32_EXTI_IMR1_MASK                0xFF820000U

+#define STM32_EXTI_IMR2_MASK                0xFFFFFE87U

+

 #define STM32_EXTI_LINE0_HANDLER            Vector58

 #define STM32_EXTI_LINE1_HANDLER            Vector5C

 #define STM32_EXTI_LINE2_HANDLER            Vector60

@@ -198,16 +229,6 @@
 /* QUADSPI attributes.*/

 #define STM32_HAS_QUADSPI1                  FALSE

 

-/* RNG attributes.*/

-#define STM32_HAS_RNG1                      TRUE

-

-/* RTC attributes.*/

-#define STM32_HAS_RTC                       TRUE

-#define STM32_RTC_HAS_SUBSECONDS            TRUE

-#define STM32_RTC_HAS_PERIODIC_WAKEUPS      TRUE

-#define STM32_RTC_NUM_ALARMS                2

-#define STM32_RTC_HAS_INTERRUPTS            FALSE

-

 /* SDMMC attributes.*/

 #define STM32_HAS_SDMMC1                    TRUE

 #define STM32_SDMMC1_HANDLER                Vector104

diff --git a/os/hal/ports/STM32/STM32L4xx/hal_lld.h b/os/hal/ports/STM32/STM32L4xx/hal_lld.h
index e18b5b455..75dcfb68f 100644
--- a/os/hal/ports/STM32/STM32L4xx/hal_lld.h
+++ b/os/hal/ports/STM32/STM32L4xx/hal_lld.h
@@ -2260,6 +2260,7 @@
 #include "mpu_v7m.h"

 #include "stm32_isr.h"

 #include "stm32_dma.h"

+#include "stm32_exti.h"

 #include "stm32_rcc.h"

 

 #ifdef __cplusplus

diff --git a/os/hal/ports/STM32/STM32L4xx/platform.mk b/os/hal/ports/STM32/STM32L4xx/platform.mk
index c65cf74d0..d261132a5 100644
--- a/os/hal/ports/STM32/STM32L4xx/platform.mk
+++ b/os/hal/ports/STM32/STM32L4xx/platform.mk
@@ -25,6 +25,7 @@ include $(CHIBIOS)/os/hal/ports/STM32/LLD/ADCv3/driver.mk
 include $(CHIBIOS)/os/hal/ports/STM32/LLD/CANv1/driver.mk

 include $(CHIBIOS)/os/hal/ports/STM32/LLD/DACv1/driver.mk

 include $(CHIBIOS)/os/hal/ports/STM32/LLD/DMAv1/driver.mk

+include $(CHIBIOS)/os/hal/ports/STM32/LLD/EXTIv1/driver.mk

 include $(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv3/driver.mk

 include $(CHIBIOS)/os/hal/ports/STM32/LLD/I2Cv2/driver.mk

 include $(CHIBIOS)/os/hal/ports/STM32/LLD/OTGv1/driver.mk

diff --git a/os/hal/ports/STM32/STM32L4xx/platform_l432.mk b/os/hal/ports/STM32/STM32L4xx/platform_l432.mk
index 3daf14f89..ee776e720 100644
--- a/os/hal/ports/STM32/STM32L4xx/platform_l432.mk
+++ b/os/hal/ports/STM32/STM32L4xx/platform_l432.mk
@@ -25,6 +25,7 @@ include $(CHIBIOS)/os/hal/ports/STM32/LLD/ADCv3/driver.mk
 include $(CHIBIOS)/os/hal/ports/STM32/LLD/CANv1/driver.mk

 include $(CHIBIOS)/os/hal/ports/STM32/LLD/DACv1/driver.mk

 include $(CHIBIOS)/os/hal/ports/STM32/LLD/DMAv1/driver.mk

+include $(CHIBIOS)/os/hal/ports/STM32/LLD/EXTIv1/driver.mk

 include $(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv3/driver.mk

 include $(CHIBIOS)/os/hal/ports/STM32/LLD/I2Cv2/driver.mk

 include $(CHIBIOS)/os/hal/ports/STM32/LLD/QUADSPIv1/driver.mk

diff --git a/os/hal/ports/STM32/STM32L4xx/stm32_registry.h b/os/hal/ports/STM32/STM32L4xx/stm32_registry.h
index 8ec9d3891..a6c8ac5c8 100644
--- a/os/hal/ports/STM32/STM32L4xx/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32L4xx/stm32_registry.h
@@ -35,6 +35,33 @@
  */

 

 /*===========================================================================*/

+/* Common.                                                                   */

+/*===========================================================================*/

+

+/* RNG attributes.*/

+#define STM32_HAS_RNG1                      TRUE

+

+/* RTC attributes.*/

+#define STM32_HAS_RTC                       TRUE

+#define STM32_RTC_HAS_SUBSECONDS            TRUE

+#define STM32_RTC_HAS_PERIODIC_WAKEUPS      TRUE

+#define STM32_RTC_NUM_ALARMS                2

+#define STM32_RTC_TAMP_STAMP_HANDLER        Vector48

+#define STM32_RTC_WKUP_HANDLER              Vector49

+#define STM32_RTC_ALARM_HANDLER             VectorE4

+#define STM32_RTC_TAMP_STAMP_NUMBER         2

+#define STM32_RTC_WKUP_NUMBER               3

+#define STM32_RTC_ALARM_NUMBER              41

+#define STM32_RTC_ALARM_EXTI                18

+#define STM32_RTC_TAMP_STAMP_EXTI           19

+#define STM32_RTC_WKUP_EXTI                 20

+#define STM32_RTC_IRQ_ENABLE() do {                                         \

+  nvicEnableVector(STM32_RTC_TAMP_STAMP_NUMBER, STM32_IRQ_EXTI19_PRIORITY); \

+  nvicEnableVector(STM32_RTC_WKUP_NUMBER, STM32_IRQ_EXTI20_PRIORITY);       \

+  nvicEnableVector(STM32_RTC_ALARM_NUMBER, STM32_IRQ_EXTI18_PRIORITY);      \

+} while (false)

+

+/*===========================================================================*/

 /* STM32L432xx.                                                              */

 /*===========================================================================*/

 

@@ -125,9 +152,9 @@
 #define STM32_HAS_ETH                       FALSE

 

 /* EXTI attributes.*/

-#define STM32_EXTI_NUM_LINES                37

-#define STM32_EXTI_IMR_MASK                 0xFF820000U

-#define STM32_EXTI_IMR2_MASK                0x00000087U

+#define STM32_EXTI_NUM_LINES                40

+#define STM32_EXTI_IMR1_MASK                0xFF820000U

+#define STM32_EXTI_IMR2_MASK                0xFFFFFF87U

 

 #define STM32_EXTI_LINE0_HANDLER            Vector58

 #define STM32_EXTI_LINE1_HANDLER            Vector5C

@@ -205,16 +232,6 @@
                                              STM32_DMA_STREAM_ID_MSK(2, 7))

 #define STM32_QUADSPI1_DMA_CHN              0x03050000

 

-/* RNG attributes.*/

-#define STM32_HAS_RNG1                      TRUE

-

-/* RTC attributes.*/

-#define STM32_HAS_RTC                       TRUE

-#define STM32_RTC_HAS_SUBSECONDS            TRUE

-#define STM32_RTC_HAS_PERIODIC_WAKEUPS      TRUE

-#define STM32_RTC_NUM_ALARMS                2

-#define STM32_RTC_HAS_INTERRUPTS            FALSE

-

 /* SDMMC attributes.*/

 #define STM32_HAS_SDMMC1                    FALSE

 #define STM32_HAS_SDMMC2                    FALSE

@@ -466,9 +483,9 @@
 #define STM32_HAS_ETH                       FALSE

 

 /* EXTI attributes.*/

-#define STM32_EXTI_NUM_LINES                37

-#define STM32_EXTI_IMR_MASK                 0xFF820000U

-#define STM32_EXTI_IMR2_MASK                0x00000087U

+#define STM32_EXTI_NUM_LINES                40

+#define STM32_EXTI_IMR1_MASK                0xFF820000U

+#define STM32_EXTI_IMR2_MASK                0xFFFFFF87U

 

 #define STM32_EXTI_LINE0_HANDLER            Vector58

 #define STM32_EXTI_LINE1_HANDLER            Vector5C

@@ -556,16 +573,6 @@
                                              STM32_DMA_STREAM_ID_MSK(2, 7))

 #define STM32_QUADSPI1_DMA_CHN              0x03050000

 

-/* RNG attributes.*/

-#define STM32_HAS_RNG1                      TRUE

-

-/* RTC attributes.*/

-#define STM32_HAS_RTC                       TRUE

-#define STM32_RTC_HAS_SUBSECONDS            TRUE

-#define STM32_RTC_HAS_PERIODIC_WAKEUPS      TRUE

-#define STM32_RTC_NUM_ALARMS                2

-#define STM32_RTC_HAS_INTERRUPTS            FALSE

-

 /* SDMMC attributes.*/

 #define STM32_HAS_SDMMC1                    TRUE

 #define STM32_HAS_SDMMC2                    FALSE

@@ -828,8 +835,8 @@
 #define STM32_HAS_ETH                       FALSE

 

 /* EXTI attributes.*/

-#define STM32_EXTI_NUM_LINES                39

-#define STM32_EXTI_IMR_MASK                 0xFF820000U

+#define STM32_EXTI_NUM_LINES                40

+#define STM32_EXTI_IMR1_MASK                0xFF820000U

 #define STM32_EXTI_IMR2_MASK                0xFFFFFF87U

 

 #define STM32_EXTI_LINE0_HANDLER            Vector58

@@ -922,16 +929,6 @@
                                              STM32_DMA_STREAM_ID_MSK(2, 7))

 #define STM32_QUADSPI1_DMA_CHN              0x03050000

 

-/* RNG attributes.*/

-#define STM32_HAS_RNG1                      TRUE

-

-/* RTC attributes.*/

-#define STM32_HAS_RTC                       TRUE

-#define STM32_RTC_HAS_SUBSECONDS            TRUE

-#define STM32_RTC_HAS_PERIODIC_WAKEUPS      TRUE

-#define STM32_RTC_NUM_ALARMS                2

-#define STM32_RTC_HAS_INTERRUPTS            FALSE

-

 /* SDMMC attributes.*/

 #define STM32_HAS_SDMMC1                    TRUE

 #define STM32_SDMMC1_HANDLER                Vector104

@@ -1249,8 +1246,8 @@
 #define STM32_HAS_ETH                       FALSE

 

 /* EXTI attributes.*/

-#define STM32_EXTI_NUM_LINES                39

-#define STM32_EXTI_IMR_MASK                 0xFF820000U

+#define STM32_EXTI_NUM_LINES                40

+#define STM32_EXTI_IMR1_MASK                0xFF820000U

 #define STM32_EXTI_IMR2_MASK                0xFFFFFF87U

 

 #define STM32_EXTI_LINE0_HANDLER            Vector58

@@ -1351,16 +1348,6 @@
                                              STM32_DMA_STREAM_ID_MSK(2, 7))

 #define STM32_QUADSPI1_DMA_CHN              0x03050000

 

-/* RNG attributes.*/

-#define STM32_HAS_RNG1                      TRUE

-

-/* RTC attributes.*/

-#define STM32_HAS_RTC                       TRUE

-#define STM32_RTC_HAS_SUBSECONDS            TRUE

-#define STM32_RTC_HAS_PERIODIC_WAKEUPS      TRUE

-#define STM32_RTC_NUM_ALARMS                2

-#define STM32_RTC_HAS_INTERRUPTS            FALSE

-

 /* SDMMC attributes.*/

 #define STM32_HAS_SDMMC1                    TRUE

 #define STM32_SDMMC1_HANDLER                Vector104