Cosmetic changes in SAMA clock init

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10579 35acf78f-673a-0410-8e92-d51de3d6d3f4

1 files changed, 5 insertions, 15 deletions

diff --git a/os/hal/ports/SAMA/SAMA5D2x/hal_lld.c b/os/hal/ports/SAMA/SAMA5D2x/hal_lld.c
index 92a25bc0f..8de8f498b 100644
--- a/os/hal/ports/SAMA/SAMA5D2x/hal_lld.c
+++ b/os/hal/ports/SAMA/SAMA5D2x/hal_lld.c
@@ -79,8 +79,9 @@ void sama_clock_init(void) {
   /* Disabling PMC write protection. */

   pmcDisableWP();

 

-  /* Enforces the reset default configuration of clock tree. */

-{

+  /* 

+   * Enforcing the reset default configuration of clock tree. 

+   */  

   /* Setting Slow Clock source to OSCRC. */

   SCKC->SCKC_CR = 0U;

 

@@ -110,12 +111,10 @@ void sama_clock_init(void) {
   /* Counter Clock Source to MOSCRC. */

   PMC->CKGR_MCFR &= ~CKGR_MCFR_CCSS;

 

-}

 

   /*

    * Main oscillator configuration block.

    */

-{

   /* Setting Slow clock source. */

   SCKC->SCKC_CR = SAMA_OSC_SEL;

   while ((SAMA_OSC_SEL && !(PMC->PMC_SR & PMC_SR_OSCSELS)) ||

@@ -139,11 +138,8 @@ void sama_clock_init(void) {
     ;

   mainf = CKGR_MCFR_MAINF(PMC->CKGR_MCFR);

   /*

-   * TODO: check mainf

-   * select alternate clock source if mainf is out of range:

-   * if the system is configured to use crystal osc,

-   * this function should start trying to use crystal osc sources and

-   * should switch to alternate sources if mainf is invalid.

+   * @TODO: add mainf check and eventual clock source fallback. This mechanism

+   * should be activable through a switch.

    */

   (void)mainf;

 

@@ -156,12 +152,10 @@ void sama_clock_init(void) {
 #if !SAMA_MOSCRC_ENABLED

   PMC->CKGR_MOR &= ~ CKGR_MOR_MOSCRCEN;

 #endif

-}

 

 /*

  * PLLA configuration block.

  */

-{

   pllar = SAMA_PLLA_ONE | CKGR_PLLAR_PLLACOUNT(0x3F);

 #if SAMA_ACTIVATE_PLLA

   pllar |= CKGR_PLLAR_DIVA_BYPASS | SAMA_PLLA_MUL;

@@ -172,12 +166,10 @@ void sama_clock_init(void) {
   while (!(PMC->PMC_SR & PMC_SR_LOCKA))

     ;                                       /* Waits until PLLA is locked.  */

 #endif

-}

 

 /*

  * Master clock configuration block.

  */

-{

   mckr = PMC->PMC_MCKR;

   mckr &= ~PMC_MCKR_CSS_Msk;

   mckr |= SAMA_MCK_SEL;

@@ -196,8 +188,6 @@ void sama_clock_init(void) {
   while (!(PMC->PMC_SR & PMC_SR_MCKRDY))

     ;                                       /* Waits until MCK is stable.   */

 

-}

-

   /* Enabling write protection.  */

   pmcEnableWP();