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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2014-07-28 12:21:17 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2014-07-28 12:21:17 +0000 |
| commit | a91b8d62dd80e0a93c17070df7a624b9696d65da (patch) | |
| tree | e0689dfdb84d8127d2438be97ae8c42d87f8832e /os | |
| parent | ff9bc27d92273bb5c0fb6fbe026567f25fe93fa3 (diff) | |
| download | ChibiOS-a91b8d62dd80e0a93c17070df7a624b9696d65da.tar.gz ChibiOS-a91b8d62dd80e0a93c17070df7a624b9696d65da.tar.bz2 ChibiOS-a91b8d62dd80e0a93c17070df7a624b9696d65da.zip | |
Fixed bug #520.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7106 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os')
| -rw-r--r-- | os/hal/ports/STM32/STM32L1xx/adc_lld.c | 2 | ||||
| -rw-r--r-- | os/hal/ports/STM32/STM32L1xx/adc_lld.h | 14 | ||||
| -rw-r--r-- | os/hal/ports/STM32/STM32L1xx/hal_lld.h | 5 |
3 files changed, 16 insertions, 5 deletions
diff --git a/os/hal/ports/STM32/STM32L1xx/adc_lld.c b/os/hal/ports/STM32/STM32L1xx/adc_lld.c index 424d5cf1f..ad7700fb6 100644 --- a/os/hal/ports/STM32/STM32L1xx/adc_lld.c +++ b/os/hal/ports/STM32/STM32L1xx/adc_lld.c @@ -159,6 +159,8 @@ void adc_lld_start(ADCDriver *adcp) { }
#endif /* STM32_ADC_USE_ADC1 */
+ ADC->CCR = (ADC->CCR & ADC_CCR_TSVREFE) | (STM32_ADC_ADCPRE << 16);
+
/* ADC initial setup, starting the analog part here in order to reduce
the latency when starting a conversion.*/
adcp->adc->CR1 = 0;
diff --git a/os/hal/ports/STM32/STM32L1xx/adc_lld.h b/os/hal/ports/STM32/STM32L1xx/adc_lld.h index aa8e1ddef..758cd918d 100644 --- a/os/hal/ports/STM32/STM32L1xx/adc_lld.h +++ b/os/hal/ports/STM32/STM32L1xx/adc_lld.h @@ -175,6 +175,20 @@ #define STM32_DMA_REQUIRED
#endif
+/**
+ * * @brief ADC frequency.
+ * */
+/* ADC clock related settings and checks.*/
+#if STM32_ADC_ADCPRE == ADC_CCR_ADCPRE_DIV1
+#define STM32_ADCCLK STM32_HSICLK
+#elif STM32_ADC_ADCPRE == ADC_CCR_ADCPRE_DIV2
+#define STM32_ADCCLK (STM32_HSICLK / 2)
+#elif STM32_ADC_ADCPRE == ADC_CCR_ADCPRE_DIV4
+#define STM32_ADCCLK (STM32_HSICLK / 4)
+#else
+#error "invalid STM32_ADC_ADCPRE value specified"
+#endif
+
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
diff --git a/os/hal/ports/STM32/STM32L1xx/hal_lld.h b/os/hal/ports/STM32/STM32L1xx/hal_lld.h index e952e302f..00e52892d 100644 --- a/os/hal/ports/STM32/STM32L1xx/hal_lld.h +++ b/os/hal/ports/STM32/STM32L1xx/hal_lld.h @@ -771,11 +771,6 @@ #endif
/**
- * @brief ADC frequency.
- */
-#define STM32_ADCCLK STM32_HSICLK
-
-/**
* @brief USB frequency.
*/
#define STM32_USBCLK (STM32_PLLVCO / 2)
|