diff options
| author | acirillo87 <acirillo87@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-03-29 10:20:12 +0000 |
|---|---|---|
| committer | acirillo87 <acirillo87@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-03-29 10:20:12 +0000 |
| commit | a782151cc5873d28679b54bb010247439265b8c6 (patch) | |
| tree | 2304ce5556e81d4cd04785eca99edfd602494dc6 /os | |
| parent | c450b544c1a35478fd07c093e82ba5cc000f078e (diff) | |
| download | ChibiOS-a782151cc5873d28679b54bb010247439265b8c6.tar.gz ChibiOS-a782151cc5873d28679b54bb010247439265b8c6.tar.bz2 ChibiOS-a782151cc5873d28679b54bb010247439265b8c6.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5515 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os')
| -rw-r--r-- | os/hal/platforms/SPC5xx/FlexPWM_v1/pwm_lld.c | 153 | ||||
| -rw-r--r-- | os/hal/platforms/SPC5xx/FlexPWM_v1/pwm_lld.h | 117 | ||||
| -rw-r--r-- | os/hal/platforms/SPC5xx/eTimer_v1/icu_lld.c | 24 | ||||
| -rw-r--r-- | os/hal/platforms/SPC5xx/eTimer_v1/icu_lld.h | 294 |
4 files changed, 219 insertions, 369 deletions
diff --git a/os/hal/platforms/SPC5xx/FlexPWM_v1/pwm_lld.c b/os/hal/platforms/SPC5xx/FlexPWM_v1/pwm_lld.c index ad87420b8..3c379af9e 100644 --- a/os/hal/platforms/SPC5xx/FlexPWM_v1/pwm_lld.c +++ b/os/hal/platforms/SPC5xx/FlexPWM_v1/pwm_lld.c @@ -127,7 +127,7 @@ void pwm_lld_start_submodule(PWMDriver *pwmp, uint8_t sid) { pwmp->flexpwmp->SUB[sid].STS.R = 0xFFFF;
/* Clears LDOK and initializes the registers.*/
- pwmp->flexpwmp->MCTRL.B.CLDOK |= (0x0 | (1U << sid));
+ pwmp->flexpwmp->MCTRL.B.CLDOK |= 1U << sid;
/* Setting PWM clock frequency and submodule prescaler.*/
psc = SPC5_FLEXPWM0_CLK / pwmp->config->frequency;
@@ -167,13 +167,13 @@ void pwm_lld_start_submodule(PWMDriver *pwmp, uint8_t sid) { }
/* Disables PWM FAULT function. */
- pwmp->flexpwmp->SUB[sid].DISMAP.R = 0x0000;
- pwmp->flexpwmp->SUB[sid].CTRL2.B.INDEP = 1;
+ pwmp->flexpwmp->SUB[sid].DISMAP.R = 0;
+ pwmp->flexpwmp->SUB[sid].CTRL2.B.INDEP = 1U;
/* Sets PWM period.*/
pwmperiod = pwmp->period;
pwmp->flexpwmp->SUB[sid].INIT.R = ~(pwmperiod / 2) + 1U;
- pwmp->flexpwmp->SUB[sid].VAL[0].R = 0x0000;
+ pwmp->flexpwmp->SUB[sid].VAL[0].R = 0;
pwmp->flexpwmp->SUB[sid].VAL[1].R = pwmperiod / 2;
/* Sets the submodule channels.*/
@@ -200,21 +200,24 @@ void pwm_lld_start_submodule(PWMDriver *pwmp, uint8_t sid) { switch (pwmp->config->channels[0].mode & PWM_OUTPUT_MASK) {
case PWM_OUTPUT_ACTIVE_LOW:
pwmp->flexpwmp->SUB[sid].OCTRL.B.POLA = 1;
- /* Enables CHA mask.*/
- pwmp->flexpwmp->MASK.B.MASKA |= (0x0 | (1U << sid));
- /* Enables CHA.*/
- pwmp->flexpwmp->OUTEN.B.PWMA_EN |= (0x0 | (1U << sid));
+
+ /* Enables CHA mask and CHA.*/
+ pwmp->flexpwmp->MASK.B.MASKA |= 1U << sid;
+ pwmp->flexpwmp->OUTEN.B.PWMA_EN |= 1U << sid;
+
break;
case PWM_OUTPUT_ACTIVE_HIGH:
pwmp->flexpwmp->SUB[sid].OCTRL.B.POLA = 0;
- /* Enables CHA mask.*/
- pwmp->flexpwmp->MASK.B.MASKA |= (0x0 | (1U << sid));
- /* Enables CHA.*/
- pwmp->flexpwmp->OUTEN.B.PWMA_EN |= (0x0 | (1U << sid));
+
+ /* Enables CHA mask and CHA.*/
+ pwmp->flexpwmp->MASK.B.MASKA |= 1U << sid;
+ pwmp->flexpwmp->OUTEN.B.PWMA_EN |= 1U << sid;
+
break;
case PWM_OUTPUT_DISABLED:
/* Enables CHA mask.*/
- pwmp->flexpwmp->MASK.B.MASKA |= (0x0 | (1U << sid));
+ pwmp->flexpwmp->MASK.B.MASKA |= 1U << sid;
+
break;
default:
;
@@ -222,21 +225,24 @@ void pwm_lld_start_submodule(PWMDriver *pwmp, uint8_t sid) { switch (pwmp->config->channels[1].mode & PWM_OUTPUT_MASK) {
case PWM_OUTPUT_ACTIVE_LOW:
pwmp->flexpwmp->SUB[sid].OCTRL.B.POLB = 1;
- /* Enables CHB mask.*/
- pwmp->flexpwmp->MASK.B.MASKB |= (0x0 | (1U << sid));
- /* Enables CHB.*/
- pwmp->flexpwmp->OUTEN.B.PWMB_EN |= (0x0 | (1U << sid));
+
+ /* Enables CHB mask and CHB.*/
+ pwmp->flexpwmp->MASK.B.MASKB |= 1U << sid;
+ pwmp->flexpwmp->OUTEN.B.PWMB_EN |= 1U << sid;
+
break;
case PWM_OUTPUT_ACTIVE_HIGH:
pwmp->flexpwmp->SUB[sid].OCTRL.B.POLB = 0;
- /* Enables CHB mask.*/
- pwmp->flexpwmp->MASK.B.MASKB |= (0x0 | (1U << sid));
- /* Enables CHB.*/
- pwmp->flexpwmp->OUTEN.B.PWMB_EN |= (0x0 | (1U << sid));
+
+ /* Enables CHB mask and CHB.*/
+ pwmp->flexpwmp->MASK.B.MASKB |= 1U << sid;
+ pwmp->flexpwmp->OUTEN.B.PWMB_EN |= 1U << sid;
+
break;
case PWM_OUTPUT_DISABLED:
/* Enables CHB mask.*/
- pwmp->flexpwmp->MASK.B.MASKB |= (0x0 | (1U << sid));
+ pwmp->flexpwmp->MASK.B.MASKB |= 1U << sid;
+
break;
default:
;
@@ -250,14 +256,14 @@ void pwm_lld_start_submodule(PWMDriver *pwmp, uint8_t sid) { "the PWM chB must be set in PWM_OUTPUT_ACTIVE_LOW");
pwmp->flexpwmp->SUB[sid].OCTRL.B.POLA = 1;
pwmp->flexpwmp->SUB[sid].CTRL2.B.INDEP = 0;
- pwmp->flexpwmp->OUTEN.B.PWMA_EN |= (0x0 | (1U << sid));
+ pwmp->flexpwmp->OUTEN.B.PWMA_EN |= 1U << sid;
break;
case PWM_COMPLEMENTARY_OUTPUT_ACTIVE_HIGH:
chDbgAssert(pwmp->config->channels[1].mode == PWM_OUTPUT_ACTIVE_HIGH,
"pwm_lld_start_submodule(), #3",
"the PWM chB must be set in PWM_OUTPUT_ACTIVE_HIGH");
pwmp->flexpwmp->SUB[sid].CTRL2.B.INDEP = 0;
- pwmp->flexpwmp->OUTEN.B.PWMA_EN |= (0x0 | (1U << sid));
+ pwmp->flexpwmp->OUTEN.B.PWMA_EN |= 1U << sid;
break;
default:
;
@@ -269,17 +275,17 @@ void pwm_lld_start_submodule(PWMDriver *pwmp, uint8_t sid) { "pwm_lld_start_submodule(), #4",
"the PWM chA must be set in PWM_OUTPUT_ACTIVE_LOW");
pwmp->flexpwmp->SUB[sid].CTRL2.B.INDEP = 0;
- pwmp->flexpwmp->MCTRL.B.IPOL &= ~ (0x0 | (1U << sid));
+ pwmp->flexpwmp->MCTRL.B.IPOL &= ~ (1U << sid);
pwmp->flexpwmp->SUB[sid].OCTRL.B.POLB = 1;
- pwmp->flexpwmp->OUTEN.B.PWMB_EN |= (0x0 | (1U << sid));
+ pwmp->flexpwmp->OUTEN.B.PWMB_EN |= 1U << sid;
break;
case PWM_COMPLEMENTARY_OUTPUT_ACTIVE_HIGH:
chDbgAssert(pwmp->config->channels[0].mode == PWM_OUTPUT_ACTIVE_HIGH,
"pwm_lld_start_submodule(), #5",
"the PWM chA must be set in PWM_OUTPUT_ACTIVE_HIGH");
pwmp->flexpwmp->SUB[sid].CTRL2.B.INDEP = 0;
- pwmp->flexpwmp->MCTRL.B.IPOL |= (0x0 | (1U << sid));
- pwmp->flexpwmp->OUTEN.B.PWMB_EN |= (0x0 | (1U << sid));
+ pwmp->flexpwmp->MCTRL.B.IPOL |= 1U << sid;
+ pwmp->flexpwmp->OUTEN.B.PWMB_EN |= 1U << sid;
break;
default:
;
@@ -290,8 +296,8 @@ void pwm_lld_start_submodule(PWMDriver *pwmp, uint8_t sid) { pwmp->flexpwmp->SUB[sid].CTRL2.B.FORCE = 1U;
/* Updates SMOD registers and starts SMOD.*/
- pwmp->flexpwmp->MCTRL.B.LDOK |= (0x0 | (1U << sid));
- pwmp->flexpwmp->MCTRL.B.RUN |= (0x0 | (1U << sid));
+ pwmp->flexpwmp->MCTRL.B.LDOK |= 1U << sid;
+ pwmp->flexpwmp->MCTRL.B.RUN |= 1U << sid;
}
/**
@@ -313,7 +319,7 @@ void pwm_lld_enable_submodule_channel(PWMDriver *pwmp, nwidth = width - (pwmperiod / 2);
/* Clears LDOK.*/
- pwmp->flexpwmp->MCTRL.B.CLDOK |= (0x0 | (1U << sid));
+ pwmp->flexpwmp->MCTRL.B.CLDOK |= 1U << sid;
/* Active the width interrupt.*/
if (channel == 0) {
@@ -340,11 +346,11 @@ void pwm_lld_enable_submodule_channel(PWMDriver *pwmp, }
/* Removes the channel mask if it is necessary.*/
- if ((pwmp->flexpwmp->MASK.B.MASKA & (0x0 | (1U << sid))) == 1)
- pwmp->flexpwmp->MASK.B.MASKA &= ~(0x0 | (1U << sid));
+ if ((pwmp->flexpwmp->MASK.B.MASKA & (1U << sid)) == 1)
+ pwmp->flexpwmp->MASK.B.MASKA &= ~ (1U << sid);
if ((pwmp->config->channels[0].mode & PWM_COMPLEMENTARY_OUTPUT_MASK) != 0) {
- pwmp->flexpwmp->MASK.B.MASKB &= ~(0x0 | (1U << sid));
+ pwmp->flexpwmp->MASK.B.MASKB &= ~ (1U << sid);
}
}
/* Active the width interrupt.*/
@@ -371,11 +377,11 @@ void pwm_lld_enable_submodule_channel(PWMDriver *pwmp, }
/* Removes the channel mask if it is necessary.*/
- if ((pwmp->flexpwmp->MASK.B.MASKB & (0x0 | (1U << sid))) == 1)
- pwmp->flexpwmp->MASK.B.MASKB &= ~(0x0 | (1U << sid));
+ if ((pwmp->flexpwmp->MASK.B.MASKB & (1U << sid)) == 1)
+ pwmp->flexpwmp->MASK.B.MASKB &= ~ (1U << sid);
if ((pwmp->config->channels[1].mode & PWM_COMPLEMENTARY_OUTPUT_MASK) != 0) {
- pwmp->flexpwmp->MASK.B.MASKA &= ~(0x0 | (1U << sid));
+ pwmp->flexpwmp->MASK.B.MASKA &= ~ (1U << sid);
}
}
@@ -391,7 +397,7 @@ void pwm_lld_enable_submodule_channel(PWMDriver *pwmp, pwmp->flexpwmp->SUB[sid].CTRL2.B.FORCE = 1U;
/* Forces reload of the VALUE registers.*/
- pwmp->flexpwmp->MCTRL.B.LDOK |= (0x0 | (1U << sid));
+ pwmp->flexpwmp->MCTRL.B.LDOK |= 1U << sid;
}
/**
@@ -407,7 +413,7 @@ void pwm_lld_disable_submodule_channel(PWMDriver *pwmp, pwmchannel_t channel,
uint8_t sid) {
- pwmp->flexpwmp->MCTRL.B.CLDOK |= (0x0 | (1U << sid));
+ pwmp->flexpwmp->MCTRL.B.CLDOK |= 1U << sid;
/* Disable the width interrupt.*/
if (channel == 0) {
@@ -419,11 +425,11 @@ void pwm_lld_disable_submodule_channel(PWMDriver *pwmp, /* Active the channel mask.*/
if ((pwmp->config->channels[0].mode & PWM_COMPLEMENTARY_OUTPUT_MASK) != 0) {
- pwmp->flexpwmp->MASK.B.MASKA |= (0x0 | (1U << sid));
- pwmp->flexpwmp->MASK.B.MASKB |= (0x0 | (1U << sid));
+ pwmp->flexpwmp->MASK.B.MASKA |= 1U << sid;
+ pwmp->flexpwmp->MASK.B.MASKB |= 1U << sid;
}
else
- pwmp->flexpwmp->MASK.B.MASKA |= (0x0 | (1U << sid));
+ pwmp->flexpwmp->MASK.B.MASKA |= 1U << sid;
}
/* Disable the width interrupt.*/
else if (channel == 1) {
@@ -435,11 +441,11 @@ void pwm_lld_disable_submodule_channel(PWMDriver *pwmp, /* Active the channel mask.*/
if ((pwmp->config->channels[1].mode & PWM_COMPLEMENTARY_OUTPUT_MASK) != 0) {
- pwmp->flexpwmp->MASK.B.MASKA |= (0x0 | (1U << sid));
- pwmp->flexpwmp->MASK.B.MASKB |= (0x0 | (1U << sid));
+ pwmp->flexpwmp->MASK.B.MASKA |= 1U << sid;
+ pwmp->flexpwmp->MASK.B.MASKB |= 1U << sid;
}
else
- pwmp->flexpwmp->MASK.B.MASKB |= (0x0 | (1U << sid));
+ pwmp->flexpwmp->MASK.B.MASKB |= 1U << sid;
}
/* Sets the MASK registers.*/
@@ -447,15 +453,15 @@ void pwm_lld_disable_submodule_channel(PWMDriver *pwmp, pwmp->flexpwmp->SUB[sid].CTRL2.B.FORCE = 1U;
/* Disable RIE interrupt to prevent reload interrupt.*/
- if ((pwmp->flexpwmp->MASK.B.MASKA & (0x0 | (1U << sid))) &&
- (pwmp->flexpwmp->MASK.B.MASKB & (0x0 | (1U << sid))) == 1) {
+ if ((pwmp->flexpwmp->MASK.B.MASKA & (1U << sid)) &&
+ (pwmp->flexpwmp->MASK.B.MASKB & (1U << sid)) == 1) {
pwmp->flexpwmp->SUB[sid].INTEN.B.RIE = 0;
/* Clear the reload flag.*/
pwmp->flexpwmp->SUB[sid].STS.B.RF = 1U;
}
- pwmp->flexpwmp->MCTRL.B.LDOK |= (0x0 | (1U << sid));
+ pwmp->flexpwmp->MCTRL.B.LDOK |= (1U << sid);
}
/**
@@ -1136,7 +1142,7 @@ void pwm_lld_start(PWMDriver *pwmp) { #if SPC5_PWM_USE_SMOD0
if (&PWMD1 == pwmp) {
/* Disable the interrupts.*/
- pwmp->flexpwmp->SUB[0].INTEN.R = 0x0000;
+ pwmp->flexpwmp->SUB[0].INTEN.R = 0;
/* Disable the submodule.*/
pwmp->flexpwmp->OUTEN.B.PWMA_EN &= 0xE;
@@ -1154,7 +1160,7 @@ void pwm_lld_start(PWMDriver *pwmp) { #if SPC5_PWM_USE_SMOD1
if (&PWMD2 == pwmp) {
/* Disable the interrupts.*/
- pwmp->flexpwmp->SUB[1].INTEN.R = 0x0000;
+ pwmp->flexpwmp->SUB[1].INTEN.R = 0;
/* Disable the submodule.*/
pwmp->flexpwmp->OUTEN.B.PWMA_EN &= 0xD;
@@ -1172,7 +1178,7 @@ void pwm_lld_start(PWMDriver *pwmp) { #if SPC5_PWM_USE_SMOD2
if (&PWMD3 == pwmp) {
/* Disable the interrupts.*/
- pwmp->flexpwmp->SUB[2].INTEN.R = 0x0000;
+ pwmp->flexpwmp->SUB[2].INTEN.R = 0;
/* Disable the submodule.*/
pwmp->flexpwmp->OUTEN.B.PWMA_EN &= 0xB;
@@ -1190,7 +1196,7 @@ void pwm_lld_start(PWMDriver *pwmp) { #if SPC5_PWM_USE_SMOD3
if (&PWMD4 == pwmp) {
/* Disable the interrupts.*/
- pwmp->flexpwmp->SUB[3].INTEN.R = 0x0000;
+ pwmp->flexpwmp->SUB[3].INTEN.R = 0;
/* Disable the submodule.*/
pwmp->flexpwmp->OUTEN.B.PWMA_EN &= 0x7;
@@ -1208,7 +1214,7 @@ void pwm_lld_start(PWMDriver *pwmp) { #if SPC5_PWM_USE_SMOD4
if (&PWMD5 == pwmp) {
/* Disable the interrupts.*/
- pwmp->flexpwmp->SUB[0].INTEN.R = 0x0000;
+ pwmp->flexpwmp->SUB[0].INTEN.R = 0;
/* Disable the submodule.*/
pwmp->flexpwmp->OUTEN.B.PWMA_EN &= 0xE;
@@ -1226,7 +1232,7 @@ void pwm_lld_start(PWMDriver *pwmp) { #if SPC5_PWM_USE_SMOD5
if (&PWMD6 == pwmp) {
/* Disable the interrupts.*/
- pwmp->flexpwmp->SUB[1].INTEN.R = 0x0000;
+ pwmp->flexpwmp->SUB[1].INTEN.R = 0;
/* Disable the submodule.*/
pwmp->flexpwmp->OUTEN.B.PWMA_EN &= 0xD;
@@ -1244,7 +1250,7 @@ void pwm_lld_start(PWMDriver *pwmp) { #if SPC5_PWM_USE_SMOD6
if (&PWMD7 == pwmp) {
/* Disable the interrupts.*/
- pwmp->flexpwmp->SUB[2].INTEN.R = 0x0000;
+ pwmp->flexpwmp->SUB[2].INTEN.R = 0;
/* Disable the submodule.*/
pwmp->flexpwmp->OUTEN.B.PWMA_EN &= 0xB;
@@ -1262,7 +1268,7 @@ void pwm_lld_start(PWMDriver *pwmp) { #if SPC5_PWM_USE_SMOD7
if (&PWMD8 == pwmp) {
/* Disable the interrupts.*/
- pwmp->flexpwmp->SUB[3].INTEN.R = 0x0000;
+ pwmp->flexpwmp->SUB[3].INTEN.R = 0;
/* Disable the submodule.*/
pwmp->flexpwmp->OUTEN.B.PWMA_EN &= 0x7;
@@ -1349,7 +1355,7 @@ void pwm_lld_stop(PWMDriver *pwmp) { if (&PWMD1 == pwmp) {
/* SMOD stop.*/
pwmp->flexpwmp->MCTRL.B.CLDOK |= 1U;
- pwmp->flexpwmp->SUB[0].INTEN.R = 0x0000;
+ pwmp->flexpwmp->SUB[0].INTEN.R = 0;
pwmp->flexpwmp->SUB[0].STS.R = 0xFFFF;
pwmp->flexpwmp->OUTEN.B.PWMA_EN &= 0xE;
pwmp->flexpwmp->OUTEN.B.PWMB_EN &= 0xE;
@@ -1361,7 +1367,7 @@ void pwm_lld_stop(PWMDriver *pwmp) { if (&PWMD2 == pwmp) {
/* SMOD stop.*/
pwmp->flexpwmp->MCTRL.B.CLDOK |= 2U;
- pwmp->flexpwmp->SUB[1].INTEN.R = 0x0000;
+ pwmp->flexpwmp->SUB[1].INTEN.R = 0;
pwmp->flexpwmp->SUB[1].STS.R = 0xFFFF;
pwmp->flexpwmp->OUTEN.B.PWMA_EN &= 0xD;
pwmp->flexpwmp->OUTEN.B.PWMB_EN &= 0xD;
@@ -1373,7 +1379,7 @@ void pwm_lld_stop(PWMDriver *pwmp) { if (&PWMD3 == pwmp) {
/* SMOD stop.*/
pwmp->flexpwmp->MCTRL.B.CLDOK |= 4U;
- pwmp->flexpwmp->SUB[2].INTEN.R = 0x0000;
+ pwmp->flexpwmp->SUB[2].INTEN.R = 0;
pwmp->flexpwmp->SUB[2].STS.R = 0xFFFF;
pwmp->flexpwmp->OUTEN.B.PWMA_EN &= 0xB;
pwmp->flexpwmp->OUTEN.B.PWMB_EN &= 0xB;
@@ -1385,7 +1391,7 @@ void pwm_lld_stop(PWMDriver *pwmp) { if (&PWMD4 == pwmp) {
/* SMOD stop.*/
pwmp->flexpwmp->MCTRL.B.CLDOK |= 8U;
- pwmp->flexpwmp->SUB[3].INTEN.R = 0x0000;
+ pwmp->flexpwmp->SUB[3].INTEN.R = 0;
pwmp->flexpwmp->SUB[3].STS.R = 0xFFFF;
pwmp->flexpwmp->OUTEN.B.PWMA_EN &= 0x7;
pwmp->flexpwmp->OUTEN.B.PWMB_EN &= 0x7;
@@ -1397,7 +1403,7 @@ void pwm_lld_stop(PWMDriver *pwmp) { if (&PWMD5 == pwmp) {
/* SMOD stop.*/
pwmp->flexpwmp->MCTRL.B.CLDOK |= 1U;
- pwmp->flexpwmp->SUB[0].INTEN.R = 0x0000;
+ pwmp->flexpwmp->SUB[0].INTEN.R = 0;
pwmp->flexpwmp->SUB[0].STS.R = 0xFFFF;
pwmp->flexpwmp->OUTEN.B.PWMA_EN &= 0xE;
pwmp->flexpwmp->OUTEN.B.PWMB_EN &= 0xE;
@@ -1409,7 +1415,7 @@ void pwm_lld_stop(PWMDriver *pwmp) { if (&PWMD6 == pwmp) {
/* SMOD stop.*/
pwmp->flexpwmp->MCTRL.B.CLDOK |= 2U;
- pwmp->flexpwmp->SUB[1].INTEN.R = 0x0000;
+ pwmp->flexpwmp->SUB[1].INTEN.R = 0;
pwmp->flexpwmp->SUB[1].STS.R = 0xFFFF;
pwmp->flexpwmp->OUTEN.B.PWMA_EN &= 0xD;
pwmp->flexpwmp->OUTEN.B.PWMB_EN &= 0xD;
@@ -1421,7 +1427,7 @@ void pwm_lld_stop(PWMDriver *pwmp) { if (&PWMD7 == pwmp) {
/* SMOD stop.*/
pwmp->flexpwmp->MCTRL.B.CLDOK |= 4U;
- pwmp->flexpwmp->SUB[2].INTEN.R = 0x0000;
+ pwmp->flexpwmp->SUB[2].INTEN.R = 0;
pwmp->flexpwmp->SUB[2].STS.R = 0xFFFF;
pwmp->flexpwmp->OUTEN.B.PWMA_EN &= 0xB;
pwmp->flexpwmp->OUTEN.B.PWMB_EN &= 0xB;
@@ -1433,7 +1439,7 @@ void pwm_lld_stop(PWMDriver *pwmp) { if (&PWMD8 == pwmp) {
/* SMOD stop.*/
pwmp->flexpwmp->MCTRL.B.CLDOK |= 8U;
- pwmp->flexpwmp->SUB[3].INTEN.R = 0x0000;
+ pwmp->flexpwmp->SUB[3].INTEN.R = 0;
pwmp->flexpwmp->SUB[3].STS.R = 0xFFFF;
pwmp->flexpwmp->OUTEN.B.PWMA_EN &= 0x7;
pwmp->flexpwmp->OUTEN.B.PWMB_EN &= 0x7;
@@ -1602,7 +1608,7 @@ void pwm_lld_change_period(PWMDriver *pwmp, pwmcnt_t period) { /* Setting PWM period.*/
pwmp->flexpwmp->SUB[0].INIT.R = ~(pwmperiod / 2) + 1U;
- pwmp->flexpwmp->SUB[0].VAL[0].R = 0x0000;
+ pwmp->flexpwmp->SUB[0].VAL[0].R = 0;
pwmp->flexpwmp->SUB[0].VAL[1].R = pwmperiod / 2;
switch (pwmp->config->mode & PWM_OUTPUT_MASK) {
@@ -1624,7 +1630,7 @@ void pwm_lld_change_period(PWMDriver *pwmp, pwmcnt_t period) { /* Setting PWM period.*/
pwmp->flexpwmp->SUB[1].INIT.R = ~(pwmperiod / 2) + 1U;
- pwmp->flexpwmp->SUB[1].VAL[0].R = 0x0000;
+ pwmp->flexpwmp->SUB[1].VAL[0].R = 0;
pwmp->flexpwmp->SUB[1].VAL[1].R = pwmperiod / 2;
switch (pwmp->config->mode & PWM_OUTPUT_MASK) {
@@ -1646,7 +1652,7 @@ void pwm_lld_change_period(PWMDriver *pwmp, pwmcnt_t period) { /* Setting PWM period.*/
pwmp->flexpwmp->SUB[2].INIT.R = ~(pwmperiod / 2) + 1U;
- pwmp->flexpwmp->SUB[2].VAL[0].R = 0x0000;
+ pwmp->flexpwmp->SUB[2].VAL[0].R = 0;
pwmp->flexpwmp->SUB[2].VAL[1].R = pwmperiod / 2;
switch (pwmp->config->mode & PWM_OUTPUT_MASK) {
@@ -1668,7 +1674,7 @@ void pwm_lld_change_period(PWMDriver *pwmp, pwmcnt_t period) { /* Setting PWM period.*/
pwmp->flexpwmp->SUB[3].INIT.R = ~(pwmperiod / 2) + 1U;
- pwmp->flexpwmp->SUB[3].VAL[0].R = 0x0000;
+ pwmp->flexpwmp->SUB[3].VAL[0].R = 0;
pwmp->flexpwmp->SUB[3].VAL[1].R = pwmperiod / 2;
switch (pwmp->config->mode & PWM_OUTPUT_MASK) {
@@ -1689,12 +1695,11 @@ void pwm_lld_change_period(PWMDriver *pwmp, pwmcnt_t period) { /* Setting PWM period.*/
pwmp->flexpwmp->SUB[0].INIT.R = ~(pwmperiod / 2) + 1U;
- pwmp->flexpwmp->SUB[0].VAL[0].R = 0x0000;
+ pwmp->flexpwmp->SUB[0].VAL[0].R = 0;
pwmp->flexpwmp->SUB[0].VAL[1].R = pwmperiod / 2;
switch (pwmp->config->mode & PWM_OUTPUT_MASK) {
case EDGE_ALIGNED_PWM:
-
/* Setting active front of PWM channels.*/
pwmp->flexpwmp->SUB[0].VAL[2].R = ~(pwmperiod / 2) + 1U;
pwmp->flexpwmp->SUB[0].VAL[4].R = ~(pwmperiod / 2) + 1U;
@@ -1711,12 +1716,11 @@ void pwm_lld_change_period(PWMDriver *pwmp, pwmcnt_t period) { /* Setting PWM period.*/
pwmp->flexpwmp->SUB[1].INIT.R = ~(pwmperiod / 2) + 1U;
- pwmp->flexpwmp->SUB[1].VAL[0].R = 0x0000;
+ pwmp->flexpwmp->SUB[1].VAL[0].R = 0;
pwmp->flexpwmp->SUB[1].VAL[1].R = pwmperiod / 2;
switch (pwmp->config->mode & PWM_OUTPUT_MASK) {
case EDGE_ALIGNED_PWM:
-
/* Setting active front of PWM channels.*/
pwmp->flexpwmp->SUB[1].VAL[2].R = ~(pwmperiod / 2) + 1U;
pwmp->flexpwmp->SUB[1].VAL[4].R = ~(pwmperiod / 2) + 1U;
@@ -1733,12 +1737,11 @@ void pwm_lld_change_period(PWMDriver *pwmp, pwmcnt_t period) { /* Setting PWM period.*/
pwmp->flexpwmp->SUB[2].INIT.R = ~(pwmperiod / 2) + 1U;
- pwmp->flexpwmp->SUB[2].VAL[0].R = 0x0000;
+ pwmp->flexpwmp->SUB[2].VAL[0].R = 0;
pwmp->flexpwmp->SUB[2].VAL[1].R = pwmperiod / 2;
switch (pwmp->config->mode & PWM_OUTPUT_MASK) {
case EDGE_ALIGNED_PWM:
-
/* Setting active front of PWM channels.*/
pwmp->flexpwmp->SUB[2].VAL[2].R = ~(pwmperiod / 2) + 1U;
pwmp->flexpwmp->SUB[2].VAL[4].R = ~(pwmperiod / 2) + 1U;
@@ -1755,7 +1758,7 @@ void pwm_lld_change_period(PWMDriver *pwmp, pwmcnt_t period) { /* Setting PWM period.*/
pwmp->flexpwmp->SUB[3].INIT.R = ~(pwmperiod / 2) + 1U;
- pwmp->flexpwmp->SUB[3].VAL[0].R = 0x0000;
+ pwmp->flexpwmp->SUB[3].VAL[0].R = 0;
pwmp->flexpwmp->SUB[3].VAL[1].R = pwmperiod / 2;
switch (pwmp->config->mode & PWM_OUTPUT_MASK) {
diff --git a/os/hal/platforms/SPC5xx/FlexPWM_v1/pwm_lld.h b/os/hal/platforms/SPC5xx/FlexPWM_v1/pwm_lld.h index 207f314d3..1f7a68a34 100644 --- a/os/hal/platforms/SPC5xx/FlexPWM_v1/pwm_lld.h +++ b/os/hal/platforms/SPC5xx/FlexPWM_v1/pwm_lld.h @@ -35,31 +35,31 @@ * @name STS register bits definitions
* @{
*/
-#define SPC5_FLEXPWM_STS_CMPF0 (1U << 0)
-#define SPC5_FLEXPWM_STS_CMPF1 (1U << 1)
-#define SPC5_FLEXPWM_STS_CMPF2 (1U << 2)
-#define SPC5_FLEXPWM_STS_CMPF3 (1U << 3)
-#define SPC5_FLEXPWM_STS_CMPF4 (1U << 4)
-#define SPC5_FLEXPWM_STS_CMPF5 (1U << 5)
-#define SPC5_FLEXPWM_STS_CFX0 (1U << 6)
-#define SPC5_FLEXPWM_STS_CFX1 (1U << 7)
-#define SPC5_FLEXPWM_STS_RF (1U << 12)
-#define SPC5_FLEXPWM_STS_REF (1U << 13)
-#define SPC5_FLEXPWM_STS_RUF (1U << 14)
+#define SPC5_FLEXPWM_STS_CMPF0 (1U << 0)
+#define SPC5_FLEXPWM_STS_CMPF1 (1U << 1)
+#define SPC5_FLEXPWM_STS_CMPF2 (1U << 2)
+#define SPC5_FLEXPWM_STS_CMPF3 (1U << 3)
+#define SPC5_FLEXPWM_STS_CMPF4 (1U << 4)
+#define SPC5_FLEXPWM_STS_CMPF5 (1U << 5)
+#define SPC5_FLEXPWM_STS_CFX0 (1U << 6)
+#define SPC5_FLEXPWM_STS_CFX1 (1U << 7)
+#define SPC5_FLEXPWM_STS_RF (1U << 12)
+#define SPC5_FLEXPWM_STS_REF (1U << 13)
+#define SPC5_FLEXPWM_STS_RUF (1U << 14)
/** @} */
/**
* @name PSC values definition
* @{
*/
-#define SPC5_FLEXPWM_PSC_1 0U
-#define SPC5_FLEXPWM_PSC_2 1U
-#define SPC5_FLEXPWM_PSC_4 2U
-#define SPC5_FLEXPWM_PSC_8 3U
-#define SPC5_FLEXPWM_PSC_16 4U
-#define SPC5_FLEXPWM_PSC_32 5U
-#define SPC5_FLEXPWM_PSC_64 6U
-#define SPC5_FLEXPWM_PSC_128 7U
+#define SPC5_FLEXPWM_PSC_1 0U
+#define SPC5_FLEXPWM_PSC_2 1U
+#define SPC5_FLEXPWM_PSC_4 2U
+#define SPC5_FLEXPWM_PSC_8 3U
+#define SPC5_FLEXPWM_PSC_16 4U
+#define SPC5_FLEXPWM_PSC_32 5U
+#define SPC5_FLEXPWM_PSC_64 6U
+#define SPC5_FLEXPWM_PSC_128 7U
/** @} */
/**
@@ -115,37 +115,37 @@ /**
* @brief PWMD1 driver enable switch.
* @details If set to @p TRUE the support for PWMD1 is included.
- * @note The default is @p TRUE.
+ * @note The default is @p FALSE.
*/
#if !defined(SPC5_PWM_USE_SMOD0) || defined(__DOXYGEN__)
-#define SPC5_PWM_USE_SMOD0 TRUE
+#define SPC5_PWM_USE_SMOD0 FALSE
#endif
/**
* @brief PWMD2 driver enable switch.
* @details If set to @p TRUE the support for PWMD2 is included.
- * @note The default is @p TRUE.
+ * @note The default is @p FALSE.
*/
#if !defined(SPC5_PWM_USE_SMOD1) || defined(__DOXYGEN__)
-#define SPC5_PWM_USE_SMOD1 TRUE
+#define SPC5_PWM_USE_SMOD1 FALSE
#endif
/**
* @brief PWMD3 driver enable switch.
* @details If set to @p TRUE the support for PWMD3 is included.
- * @note The default is @p TRUE.
+ * @note The default is @p FALSE.
*/
#if !defined(SPC5_PWM_USE_SMOD2) || defined(__DOXYGEN__)
-#define SPC5_PWM_USE_SMOD2 TRUE
+#define SPC5_PWM_USE_SMOD2 FALSE
#endif
/**
* @brief PWMD4 driver enable switch.
* @details If set to @p TRUE the support for PWMD4 is included.
- * @note The default is @p TRUE.
+ * @note The default is @p FALSE.
*/
#if !defined(SPC5_PWM_USE_SMOD3) || defined(__DOXYGEN__)
-#define SPC5_PWM_USE_SMOD3 TRUE
+#define SPC5_PWM_USE_SMOD3 FALSE
#endif
/**
@@ -203,25 +203,25 @@ /**
* @brief PWMD5 driver enable switch.
* @details If set to @p TRUE the support for PWMD4 is included.
- * @note The default is @p TRUE.
+ * @note The default is @p FALSE.
*/
#if !defined(SPC5_PWM_USE_SMOD4) || defined(__DOXYGEN__)
-#define SPC5_PWM_USE_SMOD4 TRUE
+#define SPC5_PWM_USE_SMOD4 FALSE
#endif
/**
* @brief PWMD6 driver enable switch.
* @details If set to @p TRUE the support for PWMD4 is included.
- * @note The default is @p TRUE.
+ * @note The default is @p FALSE.
*/
#if !defined(SPC5_PWM_USE_SMOD5) || defined(__DOXYGEN__)
-#define SPC5_PWM_USE_SMOD5 TRUE
+#define SPC5_PWM_USE_SMOD5 FALSE
#endif
/**
* @brief PWMD7 driver enable switch.
* @details If set to @p TRUE the support for PWMD4 is included.
- * @note The default is @p TRUE.
+ * @note The default is @p FALSE.
*/
#if !defined(SPC5_PWM_USE_SMOD6) || defined(__DOXYGEN__)
#define SPC5_PWM_USE_SMOD6 FALSE
@@ -230,10 +230,10 @@ /**
* @brief PWMD8 driver enable switch.
* @details If set to @p TRUE the support for PWMD4 is included.
- * @note The default is @p TRUE.
+ * @note The default is @p FALSE.
*/
#if !defined(SPC5_PWM_USE_SMOD7) || defined(__DOXYGEN__)
-#define SPC5_PWM_USE_SMOD7 TRUE
+#define SPC5_PWM_USE_SMOD7 FALSE
#endif
/**
@@ -290,47 +290,26 @@ /*===========================================================================*/
/* Configuration checks. */
/*===========================================================================*/
-
-#if SPC5_PWM_USE_SMOD0 && !SPC5_HAS_FLEXPWM0
-#error "SMOD0 not present in the selected device"
-#endif
-
-#if SPC5_PWM_USE_SMOD1 && !SPC5_HAS_FLEXPWM0
-#error "SMOD1 not present in the selected device"
+#if !SPC5_HAS_FLEXPWM0
+#error "FlexPWM0 not present in the selected device"
#endif
-#if SPC5_PWM_USE_SMDO2 && !SPC5_HAS_FLEXPWM0
-#error "SMOD2 not present in the selected device"
+#if !SPC5_HAS_FLEXPWM1
+#error "FlexPWM1 not present in the selected device"
#endif
-#if SPC5_PWM_USE_SMOD3 && !SPC5_HAS_FLEXPWM0
-#error "SMOD3 not present in the selected device"
-#endif
+#define SPC5_PWM_USE_FLEXPWM0 (SPC5_PWM_USE_SMOD0 || \
+ SPC5_PWM_USE_SMOD1 || \
+ SPC5_PWM_USE_SMOD2 || \
+ SPC5_PWM_USE_SMOD3)
-#if (!SPC5_PWM_USE_SMOD0 && !SPC5_PWM_USE_SMOD1 && \
- !SPC5_PWM_USE_SMOD2 && !SPC5_PWM_USE_SMOD3) && SPC5_PWM_USE_FLEXPWM0
-#error "PWM driver activated but no SubModule assigned"
-#endif
-
-#if SPC5_PWM_USE_SMOD4 && !SPC5_HAS_FLEXPWM1
-#error "SMOD4 not present in the selected device"
-#endif
-
-#if SPC5_PWM_USE_SMOD5 && !SPC5_HAS_FLEXPWM1
-#error "SMOD5 not present in the selected device"
-#endif
-
-#if SPC5_PWM_USE_SMDO6 && !SPC5_HAS_FLEXPWM1
-#error "SMOD6 not present in the selected device"
-#endif
-
-#if SPC5_PWM_USE_SMOD7 && !SPC5_HAS_FLEXPWM1
-#error "SMOD7 not present in the selected device"
-#endif
+#define SPC5_PWM_USE_FLEXPWM1 (SPC5_PWM_USE_SMOD4 || \
+ SPC5_PWM_USE_SMOD5 || \
+ SPC5_PWM_USE_SMOD6 || \
+ SPC5_PWM_USE_SMOD7)
-#if (!SPC5_PWM_USE_SMOD4 && !SPC5_PWM_USE_SMOD5 && \
- !SPC5_PWM_USE_SMOD6 && !SPC5_PWM_USE_SMOD7) && SPC5_PWM_USE_FLEXPWM1
-#error "PWM driver activated but no SubModule assigned"
+#if !SPC5_PWM_USE_FLEXPWM0 && !SPC5_PWM_USE_FLEXPWM1
+#error "PWM driver activated but no PWM peripheral assigned"
#endif
/*===========================================================================*/
diff --git a/os/hal/platforms/SPC5xx/eTimer_v1/icu_lld.c b/os/hal/platforms/SPC5xx/eTimer_v1/icu_lld.c index 0d65b67ce..006c5e30c 100644 --- a/os/hal/platforms/SPC5xx/eTimer_v1/icu_lld.c +++ b/os/hal/platforms/SPC5xx/eTimer_v1/icu_lld.c @@ -216,7 +216,7 @@ static void icu_lld_serve_interrupt(ICUDriver *icup) { }
else {
icup->etimerp->CHANNEL[icup->smod_number].STS.B.ICF1 = 1U;
- icup->etimerp->CHANNEL[icup->smod_number].CNTR.R = 0x0000;
+ icup->etimerp->CHANNEL[icup->smod_number].CNTR.R = 0;
_icu_isr_invoke_period_cb(icup);
}
}
@@ -224,7 +224,7 @@ static void icu_lld_serve_interrupt(ICUDriver *icup) { if (icup->etimerp->CHANNEL[icup->smod_number].CTRL.B.CNTMODE ==
SPC5_ETIMER_CNTMODE_RFE_SIHA) {
icup->etimerp->CHANNEL[icup->smod_number].STS.B.ICF2 = 1U;
- icup->etimerp->CHANNEL[icup->smod_number].CNTR.R = 0x0000;
+ icup->etimerp->CHANNEL[icup->smod_number].CNTR.R = 0;
}
else {
icup->etimerp->CHANNEL[icup->smod_number].STS.B.ICF2 = 1U;
@@ -238,7 +238,7 @@ static void icu_lld_serve_interrupt(ICUDriver *icup) { }
if ((sr & 0x0040) != 0) { /* ICF1 */
icup->etimerp->CHANNEL[icup->smod_number].STS.B.ICF1 = 1U;
- icup->etimerp->CHANNEL[icup->smod_number].CNTR.R = 0x0000;
+ icup->etimerp->CHANNEL[icup->smod_number].CNTR.R = 0;
_icu_isr_invoke_period_cb(icup);
}
else if ((sr & 0x0080) != 0) { /* ICF2 */
@@ -1043,6 +1043,7 @@ void icu_lld_start(ICUDriver *icup) { SPC5_ICU_ETIMER0_START_PCTL);
}
#endif
+
/* Set eTimer1 Clock.*/
#if SPC5_ICU_USE_SMOD6 || SPC5_ICU_USE_SMOD7 || SPC5_ICU_USE_SMOD8 || \
SPC5_ICU_USE_SMOD9 || SPC5_ICU_USE_SMOD10 || SPC5_ICU_USE_SMOD11
@@ -1052,6 +1053,7 @@ void icu_lld_start(ICUDriver *icup) { SPC5_ICU_ETIMER1_START_PCTL);
}
#endif
+
/* Set eTimer2 Clock.*/
#if SPC5_ICU_USE_SMOD12 || SPC5_ICU_USE_SMOD13 || SPC5_ICU_USE_SMOD14 || \
SPC5_ICU_USE_SMOD15 || SPC5_ICU_USE_SMOD16 || SPC5_ICU_USE_SMOD17
@@ -1072,17 +1074,13 @@ void icu_lld_start(ICUDriver *icup) { /* All IRQs and DMA requests disabled.*/
icup->etimerp->CHANNEL[icup->smod_number].INTDMA.R = 0U;
- /* Compare Load 1 disabled.*/
+ /* Compare Load 1 and Compare Load 2 disabled.*/
icup->etimerp->CHANNEL[icup->smod_number].CCCTRL.B.CLC1 = 0U;
-
- /* Compare Load 2 disabled.*/
icup->etimerp->CHANNEL[icup->smod_number].CCCTRL.B.CLC2 = 0U;
- /* Capture 1 disabled.*/
+ /* Capture 1 and Capture 2 disabled.*/
icup->etimerp->CHANNEL[icup->smod_number].CCCTRL.B.CPT1MODE =
SPC5_ETIMER_CPT1MODE_DISABLED;
-
- /* Capture 2 disabled.*/
icup->etimerp->CHANNEL[icup->smod_number].CCCTRL.B.CPT2MODE =
SPC5_ETIMER_CPT2MODE_DISABLED;
@@ -1242,29 +1240,31 @@ void icu_lld_stop(ICUDriver *icup) { SPC5_ICU_USE_SMOD3 || SPC5_ICU_USE_SMOD4 || SPC5_ICU_USE_SMOD5
/* If it is the last active submodules then the eTimer0 is disabled.*/
if (icu_active_submodules0 == 0) {
- if (icup->etimerp->ENBL.B.ENBL == 0x00) {
+ if (icup->etimerp->ENBL.B.ENBL == 0) {
halSPCSetPeripheralClockMode(SPC5_ETIMER0_PCTL,
SPC5_ICU_ETIMER0_STOP_PCTL);
}
}
#endif
+
/* eTimer1 clock deactivation.*/
#if SPC5_ICU_USE_SMOD6 || SPC5_ICU_USE_SMOD7 || SPC5_ICU_USE_SMOD8 || \
SPC5_ICU_USE_SMOD9 || SPC5_ICU_USE_SMOD10 || SPC5_ICU_USE_SMOD11
/* If it is the last active submodules then the eTimer1 is disabled.*/
if (icu_active_submodules1 == 0) {
- if (icup->etimerp->ENBL.B.ENBL == 0x00) {
+ if (icup->etimerp->ENBL.B.ENBL == 0) {
halSPCSetPeripheralClockMode(SPC5_ETIMER1_PCTL,
SPC5_ICU_ETIMER1_STOP_PCTL);
}
}
#endif
+
/* eTimer2 clock deactivation.*/
#if SPC5_ICU_USE_SMOD12 || SPC5_ICU_USE_SMOD13 || SPC5_ICU_USE_SMOD14 || \
SPC5_ICU_USE_SMOD15 || SPC5_ICU_USE_SMOD16 || SPC5_ICU_USE_SMOD17
/* If it is the last active submodules then the eTimer2 is disabled.*/
if (icu_active_submodules2 == 0) {
- if (icup->etimerp->ENBL.B.ENBL == 0x00) {
+ if (icup->etimerp->ENBL.B.ENBL == 0) {
halSPCSetPeripheralClockMode(SPC5_ETIMER2_PCTL,
SPC5_ICU_ETIMER2_STOP_PCTL);
}
diff --git a/os/hal/platforms/SPC5xx/eTimer_v1/icu_lld.h b/os/hal/platforms/SPC5xx/eTimer_v1/icu_lld.h index 8ba13b760..74ce6e5fc 100644 --- a/os/hal/platforms/SPC5xx/eTimer_v1/icu_lld.h +++ b/os/hal/platforms/SPC5xx/eTimer_v1/icu_lld.h @@ -92,104 +92,62 @@ /**
* @brief ICUD1 driver enable switch.
* @details If set to @p TRUE the support for ICUD1 is included.
- * @note The default is @p TRUE.
+ * @note The default is @p FALSE.
*/
#if !defined(SPC5_ICU_USE_SMOD0) || defined(__DOXYGEN__)
-#define SPC5_ICU_USE_SMOD0 TRUE
+#define SPC5_ICU_USE_SMOD0 FALSE
#endif
/**
* @brief ICUD2 driver enable switch.
* @details If set to @p TRUE the support for ICUD2 is included.
- * @note The default is @p TRUE.
+ * @note The default is @p FALSE.
*/
#if !defined(SPC5_ICU_USE_SMOD1) || defined(__DOXYGEN__)
-#define SPC5_ICU_USE_SMOD1 TRUE
+#define SPC5_ICU_USE_SMOD1 FALSE
#endif
/**
* @brief ICUD3 driver enable switch.
* @details If set to @p TRUE the support for ICUD3 is included.
- * @note The default is @p TRUE.
+ * @note The default is @p FALSE.
*/
#if !defined(SPC5_ICU_USE_SMOD2) || defined(__DOXYGEN__)
-#define SPC5_ICU_USE_SMOD2 TRUE
+#define SPC5_ICU_USE_SMOD2 FALSE
#endif
/**
* @brief ICUD4 driver enable switch.
* @details If set to @p TRUE the support for ICUD4 is included.
- * @note The default is @p TRUE.
+ * @note The default is @p FALSE.
*/
#if !defined(SPC5_ICU_USE_SMOD3) || defined(__DOXYGEN__)
-#define SPC5_ICU_USE_SMOD3 TRUE
+#define SPC5_ICU_USE_SMOD3 FALSE
#endif
/**
* @brief ICUD5 driver enable switch.
* @details If set to @p TRUE the support for ICUD5 is included.
- * @note The default is @p TRUE.
+ * @note The default is @p FALSE.
*/
#if !defined(SPC5_ICU_USE_SMOD4) || defined(__DOXYGEN__)
-#define SPC5_ICU_USE_SMOD4 TRUE
+#define SPC5_ICU_USE_SMOD4 FALSE
#endif
/**
* @brief ICUD6 driver enable switch.
* @details If set to @p TRUE the support for ICUD6 is included.
- * @note The default is @p TRUE.
+ * @note The default is @p FALSE.
*/
#if !defined(SPC5_ICU_USE_SMOD5) || defined(__DOXYGEN__)
-#define SPC5_ICU_USE_SMOD5 TRUE
+#define SPC5_ICU_USE_SMOD5 FALSE
#endif
/**
* @brief eTimer0 interrupt priority level setting.
*/
#if !defined(SPC5_ICU_ETIMER0_PRIORITY) || defined(__DOXYGEN__)
-#define SPC5_ICU_ETIMER0_PRIORITY 7
-#endif
-
-/**
- * @brief ICUD1 interrupt priority level setting.
- */
-#if !defined(SPC5_ICU_SMOD0_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define SPC5_ICU_SMOD0_IRQ_PRIORITY 7
-#endif
-
-/**
- * @brief ICUD2 interrupt priority level setting.
- */
-#if !defined(SPC5_ICU_SMOD1_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define SPC5_ICU_SMOD1_IRQ_PRIORITY 7
-#endif
-
-/**
- * @brief ICUD3 interrupt priority level setting.
- */
-#if !defined(SPC5_ICU_SMOD2_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define SPC5_ICU_SMOD2_IRQ_PRIORITY 7
-#endif
-
-/**
- * @brief ICUD4 interrupt priority level setting.
- */
-#if !defined(SPC5_ICU_SMOD3_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define SPC5_ICU_SMOD3_IRQ_PRIORITY 7
-#endif
-
-/**
- * @brief ICUD5 interrupt priority level setting.
- */
-#if !defined(SPC5_ICU_SMOD4_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define SPC5_ICU_SMOD4_IRQ_PRIORITY 7
-#endif
-
-/**
- * @brief ICUD6 interrupt priority level setting.
- */
-#if !defined(SPC5_ICU_SMOD5_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define SPC5_ICU_SMOD5_IRQ_PRIORITY 7
+#define SPC5_ICU_ETIMER0_PRIORITY 7
#endif
/**
@@ -199,8 +157,8 @@ * are defined in @p hal_lld.h.
*/
#if !defined(SPC5_ICU_ETIMER0_START_PCTL) || defined(__DOXYGEN__)
-#define SPC5_ICU_ETIMER0_START_PCTL (SPC5_ME_PCTL_RUN(1) | \
- SPC5_ME_PCTL_LP(2))
+#define SPC5_ICU_ETIMER0_START_PCTL (SPC5_ME_PCTL_RUN(1) | \
+ SPC5_ME_PCTL_LP(2))
#endif
/**
@@ -210,8 +168,8 @@ * are defined in @p hal_lld.h.
*/
#if !defined(SPC5_ICU_ETIMER0_STOP_PCTL) || defined(__DOXYGEN__)
-#define SPC5_ICU_ETIMER0_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \
- SPC5_ME_PCTL_LP(0))
+#define SPC5_ICU_ETIMER0_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \
+ SPC5_ME_PCTL_LP(0))
#endif
#endif
@@ -219,104 +177,62 @@ /**
* @brief ICUD6 driver enable switch.
* @details If set to @p TRUE the support for ICUD6 is included.
- * @note The default is @p TRUE.
+ * @note The default is @p FALSE.
*/
#if !defined(SPC5_ICU_USE_SMOD6) || defined(__DOXYGEN__)
-#define SPC5_ICU_USE_SMOD6 TRUE
+#define SPC5_ICU_USE_SMOD6 FALSE
#endif
/**
* @brief ICUD7 driver enable switch.
* @details If set to @p TRUE the support for ICUD7 is included.
- * @note The default is @p TRUE.
+ * @note The default is @p FALSE.
*/
#if !defined(SPC5_ICU_USE_SMOD7) || defined(__DOXYGEN__)
-#define SPC5_ICU_USE_SMOD7 TRUE
+#define SPC5_ICU_USE_SMOD7 FALSE
#endif
/**
* @brief ICUD8 driver enable switch.
* @details If set to @p TRUE the support for ICUD8 is included.
- * @note The default is @p TRUE.
+ * @note The default is @p FALSE.
*/
#if !defined(SPC5_ICU_USE_SMOD8) || defined(__DOXYGEN__)
-#define SPC5_ICU_USE_SMOD8 TRUE
+#define SPC5_ICU_USE_SMOD8 FALSE
#endif
/**
* @brief ICUD9 driver enable switch.
* @details If set to @p TRUE the support for ICUD9 is included.
- * @note The default is @p TRUE.
+ * @note The default is @p FALSE.
*/
#if !defined(SPC5_ICU_USE_SMOD9) || defined(__DOXYGEN__)
-#define SPC5_ICU_USE_SMOD9 TRUE
+#define SPC5_ICU_USE_SMOD9 FALSE
#endif
/**
* @brief ICUD10 driver enable switch.
* @details If set to @p TRUE the support for ICUD10 is included.
- * @note The default is @p TRUE.
+ * @note The default is @p FALSE.
*/
#if !defined(SPC5_ICU_USE_SMOD10) || defined(__DOXYGEN__)
-#define SPC5_ICU_USE_SMOD10 TRUE
+#define SPC5_ICU_USE_SMOD10 FALSE
#endif
/**
* @brief ICUD11 driver enable switch.
* @details If set to @p TRUE the support for ICUD11 is included.
- * @note The default is @p TRUE.
+ * @note The default is @p FALSE.
*/
#if !defined(SPC5_ICU_USE_SMOD11) || defined(__DOXYGEN__)
-#define SPC5_ICU_USE_SMOD11 TRUE
+#define SPC5_ICU_USE_SMOD11 FALSE
#endif
/**
* @brief eTimer1 interrupt priority level setting.
*/
#if !defined(SPC5_ICU_ETIMER1_PRIORITY) || defined(__DOXYGEN__)
-#define SPC5_ICU_ETIMER1_PRIORITY 7
-#endif
-
-/**
- * @brief ICUD7 interrupt priority level setting.
- */
-#if !defined(SPC5_ICU_SMOD6_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define SPC5_ICU_SMOD6_IRQ_PRIORITY 7
-#endif
-
-/**
- * @brief ICUD8 interrupt priority level setting.
- */
-#if !defined(SPC5_ICU_SMOD7_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define SPC5_ICU_SMOD7_IRQ_PRIORITY 7
-#endif
-
-/**
- * @brief ICUD9 interrupt priority level setting.
- */
-#if !defined(SPC5_ICU_SMOD8_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define SPC5_ICU_SMOD8_IRQ_PRIORITY 7
-#endif
-
-/**
- * @brief ICUD10 interrupt priority level setting.
- */
-#if !defined(SPC5_ICU_SMOD9_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define SPC5_ICU_SMOD9_IRQ_PRIORITY 7
-#endif
-
-/**
- * @brief ICUD11 interrupt priority level setting.
- */
-#if !defined(SPC5_ICU_SMOD10_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define SPC5_ICU_SMOD10_IRQ_PRIORITY 7
-#endif
-
-/**
- * @brief ICUD12 interrupt priority level setting.
- */
-#if !defined(SPC5_ICU_SMOD11_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define SPC5_ICU_SMOD11_IRQ_PRIORITY 7
+#define SPC5_ICU_ETIMER1_PRIORITY 7
#endif
/**
@@ -326,8 +242,8 @@ * are defined in @p hal_lld.h.
*/
#if !defined(SPC5_ICU_ETIMER1_START_PCTL) || defined(__DOXYGEN__)
-#define SPC5_ICU_ETIMER1_START_PCTL (SPC5_ME_PCTL_RUN(1) | \
- SPC5_ME_PCTL_LP(2))
+#define SPC5_ICU_ETIMER1_START_PCTL (SPC5_ME_PCTL_RUN(1) | \
+ SPC5_ME_PCTL_LP(2))
#endif
/**
@@ -337,8 +253,8 @@ * are defined in @p hal_lld.h.
*/
#if !defined(SPC5_ICU_ETIMER1_STOP_PCTL) || defined(__DOXYGEN__)
-#define SPC5_ICU_ETIMER1_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \
- SPC5_ME_PCTL_LP(0))
+#define SPC5_ICU_ETIMER1_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \
+ SPC5_ME_PCTL_LP(0))
#endif
#endif
@@ -346,104 +262,62 @@ /**
* @brief ICUD13 driver enable switch.
* @details If set to @p TRUE the support for ICUD13 is included.
- * @note The default is @p TRUE.
+ * @note The default is @p FALSE.
*/
#if !defined(SPC5_ICU_USE_SMOD12) || defined(__DOXYGEN__)
-#define SPC5_ICU_USE_SMOD12 TRUE
+#define SPC5_ICU_USE_SMOD12 FALSE
#endif
/**
* @brief ICUD14 driver enable switch.
* @details If set to @p TRUE the support for ICUD14 is included.
- * @note The default is @p TRUE.
+ * @note The default is @p FALSE.
*/
#if !defined(SPC5_ICU_USE_SMOD13) || defined(__DOXYGEN__)
-#define SPC5_ICU_USE_SMOD13 TRUE
+#define SPC5_ICU_USE_SMOD13 FALSE
#endif
/**
* @brief ICUD15 driver enable switch.
* @details If set to @p TRUE the support for ICUD15 is included.
- * @note The default is @p TRUE.
+ * @note The default is @p FALSE.
*/
#if !defined(SPC5_ICU_USE_SMOD14) || defined(__DOXYGEN__)
-#define SPC5_ICU_USE_SMOD14 TRUE
+#define SPC5_ICU_USE_SMOD14 FALSE
#endif
/**
* @brief ICUD16 driver enable switch.
* @details If set to @p TRUE the support for ICUD16 is included.
- * @note The default is @p TRUE.
+ * @note The default is @p FALSE.
*/
#if !defined(SPC5_ICU_USE_SMOD15) || defined(__DOXYGEN__)
-#define SPC5_ICU_USE_SMOD15 TRUE
+#define SPC5_ICU_USE_SMOD15 FALSE
#endif
/**
* @brief ICUD17 driver enable switch.
* @details If set to @p TRUE the support for ICUD17 is included.
- * @note The default is @p TRUE.
+ * @note The default is @p FALSE.
*/
#if !defined(SPC5_ICU_USE_SMOD16) || defined(__DOXYGEN__)
-#define SPC5_ICU_USE_SMOD16 TRUE
+#define SPC5_ICU_USE_SMOD16 FALSE
#endif
/**
* @brief ICUD18 driver enable switch.
* @details If set to @p TRUE the support for ICUD18 is included.
- * @note The default is @p TRUE.
+ * @note The default is @p FALSE.
*/
#if !defined(SPC5_ICU_USE_SMOD17) || defined(__DOXYGEN__)
-#define SPC5_ICU_USE_SMOD17 TRUE
+#define SPC5_ICU_USE_SMOD17 FALSE
#endif
/**
* @brief eTimer2 interrupt priority level setting.
*/
-#if !defined(SPC5_ICU_ETIMER12_PRIORITY) || defined(__DOXYGEN__)
-#define SPC5_ICU_ETIMER2_PRIORITY 7
-#endif
-
-/**
- * @brief ICUD13 interrupt priority level setting.
- */
-#if !defined(SPC5_ICU_SMOD12_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define SPC5_ICU_SMOD12_IRQ_PRIORITY 7
-#endif
-
-/**
- * @brief ICUD14 interrupt priority level setting.
- */
-#if !defined(SPC5_ICU_SMOD13_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define SPC5_ICU_SMOD13_IRQ_PRIORITY 7
-#endif
-
-/**
- * @brief ICUD15 interrupt priority level setting.
- */
-#if !defined(SPC5_ICU_SMOD14_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define SPC5_ICU_SMOD14_IRQ_PRIORITY 7
-#endif
-
-/**
- * @brief ICUD16 interrupt priority level setting.
- */
-#if !defined(SPC5_ICU_SMOD15_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define SPC5_ICU_SMOD15_IRQ_PRIORITY 7
-#endif
-
-/**
- * @brief ICUD17 interrupt priority level setting.
- */
-#if !defined(SPC5_ICU_SMOD16_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define SPC5_ICU_SMOD16_IRQ_PRIORITY 7
-#endif
-
-/**
- * @brief ICUD18 interrupt priority level setting.
- */
-#if !defined(SPC5_ICU_SMOD17_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define SPC5_ICU_SMOD17_IRQ_PRIORITY 7
+#if !defined(SPC5_ICU_ETIMER2_PRIORITY) || defined(__DOXYGEN__)
+#define SPC5_ICU_ETIMER2_PRIORITY 7
#endif
/**
@@ -453,8 +327,8 @@ * are defined in @p hal_lld.h.
*/
#if !defined(SPC5_ICU_ETIMER2_START_PCTL) || defined(__DOXYGEN__)
-#define SPC5_ICU_ETIMER2_START_PCTL (SPC5_ME_PCTL_RUN(1) | \
- SPC5_ME_PCTL_LP(2))
+#define SPC5_ICU_ETIMER2_START_PCTL (SPC5_ME_PCTL_RUN(1) | \
+ SPC5_ME_PCTL_LP(2))
#endif
/**
@@ -464,8 +338,8 @@ * are defined in @p hal_lld.h.
*/
#if !defined(SPC5_ICU_ETIMER2_STOP_PCTL) || defined(__DOXYGEN__)
-#define SPC5_ICU_ETIMER2_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \
- SPC5_ME_PCTL_LP(0))
+#define SPC5_ICU_ETIMER2_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \
+ SPC5_ME_PCTL_LP(0))
#endif
#endif
/** @} */
@@ -474,39 +348,40 @@ /* Derived constants and error checks. */
/*===========================================================================*/
-#if (SPC5_ICU_USE_SMOD0 || SPC5_ICU_USE_SMOD1 || \
- SPC5_ICU_USE_SMOD2 || SPC5_ICU_USE_SMOD3 || \
- SPC5_ICU_USE_SMOD4 || SPC5_ICU_USE_SMOD5) && !SPC5_HAS_ETIMER0
+#if !SPC5_HAS_ETIMER0
#error "ETIMER0 not present in the selected device"
#endif
-#if (SPC5_ICU_USE_SMOD6 || SPC5_ICU_USE_SMOD7 || \
- SPC5_ICU_USE_SMOD8 || SPC5_ICU_USE_SMOD9 || \
- SPC5_ICU_USE_SMOD10 || SPC5_ICU_USE_SMOD11) && !SPC5_HAS_ETIMER1
+#if !SPC5_HAS_ETIMER1
#error "ETIMER1 not present in the selected device"
#endif
-#if (SPC5_ICU_USE_SMOD12 || SPC5_ICU_USE_SMOD13 || \
- SPC5_ICU_USE_SMOD14 || SPC5_ICU_USE_SMOD15 || \
- SPC5_ICU_USE_SMOD116 || SPC5_ICU_USE_SMOD17) && !SPC5_HAS_ETIMER2
+#if !SPC5_HAS_ETIMER2
#error "ETIMER2 not present in the selected device"
#endif
-#if (!SPC5_ICU_USE_SMOD0 && !SPC5_ICU_USE_SMOD1 && \
- !SPC5_ICU_USE_SMOD2 && !SPC5_ICU_USE_SMOD3 && \
- !SPC5_ICU_USE_SMOD4 && !SPC5_ICU_USE_SMOD5) && SPC5_ICU_USE_ETIMER0
-#error "ICU driver activated but no SMOD peripheral assigned"
-#endif
-
-#if (!SPC5_ICU_USE_SMOD6 && !SPC5_ICU_USE_SMOD7 && \
- !SPC5_ICU_USE_SMOD8 && !SPC5_ICU_USE_SMOD9 && \
- !SPC5_ICU_USE_SMOD10 && !SPC5_ICU_USE_SMOD11) && SPC5_ICU_USE_ETIMER1
-#error "ICU driver activated but no SMOD peripheral assigned"
-#endif
-
-#if (!SPC5_ICU_USE_SMOD12 && !SPC5_ICU_USE_SMOD13 && \
- !SPC5_ICU_USE_SMOD14 && !SPC5_ICU_USE_SMOD15 && \
- !SPC5_ICU_USE_SMOD16 && !SPC5_ICU_USE_SMOD17) && SPC5_ICU_USE_ETIMER2
+#define SPC5_ICU_USE_ETIMER0 (SPC5_ICU_USE_SMOD6 || \
+ SPC5_ICU_USE_SMOD7 || \
+ SPC5_ICU_USE_SMOD8 || \
+ SPC5_ICU_USE_SMOD9 || \
+ SPC5_ICU_USE_SMOD10 || \
+ SPC5_ICU_USE_SMOD11)
+
+#define SPC5_ICU_USE_ETIMER1 (SPC5_ICU_USE_SMOD12 || \
+ SPC5_ICU_USE_SMOD13 || \
+ SPC5_ICU_USE_SMOD14 || \
+ SPC5_ICU_USE_SMOD15 || \
+ SPC5_ICU_USE_SMOD16 || \
+ SPC5_ICU_USE_SMOD17)
+
+#define SPC5_ICU_USE_ETIMER2 (SPC5_ICU_USE_SMOD18 || \
+ SPC5_ICU_USE_SMOD19 || \
+ SPC5_ICU_USE_SMOD20 || \
+ SPC5_ICU_USE_SMOD21 || \
+ SPC5_ICU_USE_SMOD22 || \
+ SPC5_ICU_USE_SMOD23)
+
+#if !SPC5_ICU_USE_TIMER0 && !SPC5_ICU_USE_TIMER1 && !SPC5_ICU_USE_TIMER2
#error "ICU driver activated but no SMOD peripheral assigned"
#endif
@@ -519,7 +394,7 @@ */
typedef enum {
ICU_INPUT_ACTIVE_HIGH = 0, /**< Trigger on rising edge. */
- ICU_INPUT_ACTIVE_LOW = 1, /**< Trigger on falling edge. */
+ ICU_INPUT_ACTIVE_LOW = 1, /**< Trigger on falling edge. */
}icumode_t;
/**
@@ -571,12 +446,11 @@ typedef struct { * @brief Callback for timer overflow.
*/
icucallback_t overflow_cb;
- /* End of the mandatory fields.*/
/**
- * @brief Timer input channel to be used.
- * @note Only inputs TIMx 1 and 2 are supported.
+ * @brief eTimer input channel to be used.
*/
icuchannel_t channel;
+ /* End of the mandatory fields.*/
}ICUConfig;
/**
@@ -596,16 +470,10 @@ struct ICUDriver { */
const ICUConfig *config;
/**
- * @brief Pointer to the CAN registers.
- */
-#if defined(ICU_DRIVER_EXT_FIELDS)
- ICU_DRIVER_EXT_FIELDS
-#endif
- /* End of the mandatory fields.*/
- /**
* @brief Timer base clock.
*/
uint32_t clock;
+ /* End of the mandatory fields.*/
/**
* @brief Pointer to the eTimerx registers block.
*/
|