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authorbarthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4>2011-12-08 14:34:44 +0000
committerbarthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4>2011-12-08 14:34:44 +0000
commita524ec87f1fffcfea724d8485911fe94a503265f (patch)
treecd462976f8c482b41bba910e2ed29ada65b64d68 /os
parentffdf5831594cbe5f5326b537e49aad6caf2fbf70 (diff)
downloadChibiOS-a524ec87f1fffcfea724d8485911fe94a503265f.tar.gz
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3581 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os')
-rw-r--r--os/hal/platforms/STM32/i2c_lld.c10
-rw-r--r--os/hal/src/i2c.c8
2 files changed, 12 insertions, 6 deletions
diff --git a/os/hal/platforms/STM32/i2c_lld.c b/os/hal/platforms/STM32/i2c_lld.c
index 1345c847b..bda0ba17b 100644
--- a/os/hal/platforms/STM32/i2c_lld.c
+++ b/os/hal/platforms/STM32/i2c_lld.c
@@ -490,6 +490,8 @@ void i2c_lld_reset(I2CDriver *i2cp){
/**
* @brief Receive data via the I2C bus as master.
+ * @details Number of receiving bytes must be more than 1 because of stm32
+ * hardware restrictions.
*
* @param[in] i2cp pointer to the @p I2CDriver object
* @param[in] slave_addr slave device address
@@ -501,6 +503,8 @@ void i2c_lld_master_receive(I2CDriver *i2cp, uint8_t slave_addr,
uint32_t mode = 0;
+ chDbgCheck((rxbytes > 1), "i2c_lld_master_receive");
+
/* init driver fields */
i2cp->slave_addr = (slave_addr << 1) | 0x01; /* LSB = 1 -> receive */
i2cp->rxbytes = rxbytes;
@@ -529,6 +533,9 @@ void i2c_lld_master_receive(I2CDriver *i2cp, uint8_t slave_addr,
/**
* @brief Transmits data via the I2C bus as master.
*
+ * @details Number of receiving bytes must be 0 or more than 1 because of stm32
+ * hardware restrictions.
+ *
* @param[in] i2cp pointer to the @p I2CDriver object
* @param[in] slave_addr slave device address
* @param[in] txbuf pointer to the transmit buffer
@@ -542,6 +549,9 @@ void i2c_lld_master_transmit(I2CDriver *i2cp, uint8_t slave_addr,
uint32_t mode = 0;
+ chDbgCheck(((rxbytes == 0) || ((rxbytes > 1) && (rxbuf != NULL))),
+ "i2cMasterTransmit");
+
/* init driver fields */
i2cp->slave_addr = (slave_addr << 1) & 0x00FE; /* LSB = 0 -> write */
i2cp->txbytes = txbytes;
diff --git a/os/hal/src/i2c.c b/os/hal/src/i2c.c
index ae5f9f7a8..63c03565a 100644
--- a/os/hal/src/i2c.c
+++ b/os/hal/src/i2c.c
@@ -137,8 +137,6 @@ void i2cStop(I2CDriver *i2cp) {
* @details Function designed to realize "read-through-write" transfer
* paradigm. If you want transmit data without any further read,
* than set @b rxbytes field to 0.
- * Number of receiving byts must be 0 or more than 1 because of stm32
- * hardware restrictions.
*
* @param[in] i2cp pointer to the @p I2CDriver object
* @param[in] slave_addr Slave device address (7 bits) without R/W bit
@@ -159,7 +157,7 @@ i2cflags_t i2cMasterTransmit(I2CDriver *i2cp,
chDbgCheck((i2cp != NULL) && (slave_addr != 0) &&
(txbytes > 0) && (txbuf != NULL) &&
- ((rxbytes == 0) || ((rxbytes > 1) && (rxbuf != NULL))),
+ ((rxbytes == 0) || ((rxbytes > 0) && (rxbuf != NULL))),
"i2cMasterTransmit");
i2c_lld_wait_bus_free(i2cp);
@@ -178,8 +176,6 @@ i2cflags_t i2cMasterTransmit(I2CDriver *i2cp,
/**
* @brief Receives data from the I2C bus.
- * Number of receiving byts must be more than 1 because of stm32
- * hardware restrictions.
*
* @param[in] i2cp pointer to the @p I2CDriver object
* @param[in] slave_addr slave device address (7 bits) without R/W bit
@@ -194,7 +190,7 @@ i2cflags_t i2cMasterReceive(I2CDriver *i2cp,
size_t rxbytes){
chDbgCheck((i2cp != NULL) && (slave_addr != 0) &&
- (rxbytes > 1) && (rxbuf != NULL),
+ (rxbytes > 0) && (rxbuf != NULL),
"i2cMasterReceive");
i2c_lld_wait_bus_free(i2cp);