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authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2009-10-24 18:25:31 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2009-10-24 18:25:31 +0000
commit81f043865e8bc737cadd82e919d334f24df6e50f (patch)
treef29cb9e235a79e02f05521c30acae2da22e1e6a6 /os
parent216990672983c3c551f2aaf45cf27d8f9ce68036 (diff)
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1253 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os')
-rw-r--r--os/io/platforms/STM32/spi_lld.c53
-rw-r--r--os/io/platforms/STM32/spi_lld.h36
-rw-r--r--os/io/templates/spi_lld.c12
3 files changed, 89 insertions, 12 deletions
diff --git a/os/io/platforms/STM32/spi_lld.c b/os/io/platforms/STM32/spi_lld.c
index a143bb463..6c203358f 100644
--- a/os/io/platforms/STM32/spi_lld.c
+++ b/os/io/platforms/STM32/spi_lld.c
@@ -40,6 +40,36 @@ SPIDriver SPID1;
SPIDriver SPID2;
#endif
+/*===========================================================================*/
+/* Low Level Driver local functions. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Low Level Driver interrupt handlers. */
+/*===========================================================================*/
+
+#if USE_STM32_SPI1 || defined(__DOXYGEN__)
+CH_IRQ_HANDLER(Vector70) {
+
+ CH_IRQ_PROLOGUE();
+
+ CH_IRQ_EPILOGUE();
+}
+#endif
+
+#if USE_STM32_SPI2 || defined(__DOXYGEN__)
+CH_IRQ_HANDLER(Vector78) {
+
+ CH_IRQ_PROLOGUE();
+
+ CH_IRQ_EPILOGUE();
+}
+#endif
+
+/*===========================================================================*/
+/* Low Level Driver exported functions. */
+/*===========================================================================*/
+
/**
* @brief Low level SPI driver initialization.
*/
@@ -47,18 +77,20 @@ void spi_lld_init(void) {
#if USE_STM32_SPI1
spiObjectInit(&SPID1);
- SPID1.spd_spi = SPI1;
- SPID1.spd_dmarx = DMA1_Channel2;
- SPID1.spd_dmatx = DMA1_Channel3;
+ SPID1.spd_spi = SPI1;
+ SPID1.spd_dmarx = DMA1_Channel2;
+ SPID1.spd_dmatx = DMA1_Channel3;
+ SPID1.spd_dmaprio = SPI1_DMA_PRIORITY << 12;
RCC->APB2ENR |= RCC_APB2ENR_SPI1EN;
GPIOA->CRH = (GPIOA->CRH & 0x000FFFFF) | 0xB4B00000;
#endif
#if USE_STM32_SPI2
spiObjectInit(&SPID2);
- SPID2.spd_spi = SPI2;
- SPID2.spd_dmarx = DMA1_Channel4;
- SPID2.spd_dmatx = DMA1_Channel5;
+ SPID2.spd_spi = SPI2;
+ SPID2.spd_dmarx = DMA1_Channel4;
+ SPID2.spd_dmatx = DMA1_Channel5;
+ SPID2.spd_dmaprio = SPI2_DMA_PRIORITY << 12;
RCC->APB1ENR |= RCC_APB1ENR_SPI2EN;
GPIOB->CRL = (GPIOB->CRL & 0x000FFFFF) | 0xB4B00000;
#endif
@@ -114,6 +146,15 @@ void spi_lld_unselect(SPIDriver *spip) {
*/
void spi_lld_exchange(SPIDriver *spip, size_t n, void *rxbuf, void *txbuf) {
+ /*
+ * DMA setup.
+ */
+ spip->spd_dmarx->CNDTR = (uint32_t)n;
+ spip->spd_dmarx->CPAR = (uint32_t)&spip->spd_spi->DR;
+ spip->spd_dmarx->CMAR = (uint32_t)rxbuf;
+ spip->spd_dmarx->CCR = spip->spd_dmaprio |
+ DMA_CCR1_MSIZE_0 | DMA_CCR1_MSIZE_0 |
+ DMA_CCR1_MINC | DMA_CCR1_TEIE | DMA_CCR1_TCIE;
}
/** @} */
diff --git a/os/io/platforms/STM32/spi_lld.h b/os/io/platforms/STM32/spi_lld.h
index b6698e1b2..5e5c26106 100644
--- a/os/io/platforms/STM32/spi_lld.h
+++ b/os/io/platforms/STM32/spi_lld.h
@@ -41,7 +41,7 @@
/**
* @brief SPI1 driver enable switch.
- * @details If set to @p TRUE the support for SPI is included.
+ * @details If set to @p TRUE the support for SPI1 is included.
* @note The default is @p TRUE.
*/
#if !defined(USE_STM32_SPI1) || defined(__DOXYGEN__)
@@ -49,14 +49,34 @@
#endif
/**
- * @brief SPI1 driver enable switch.
- * @details If set to @p TRUE the support for SPI is included.
+ * @brief SPI2 driver enable switch.
+ * @details If set to @p TRUE the support for SPI2 is included.
* @note The default is @p TRUE.
*/
#if !defined(USE_STM32_SPI2) || defined(__DOXYGEN__)
#define USE_STM32_SPI2 TRUE
#endif
+/**
+ * @brief SPI1 DMA priority (0..3).
+ * @note The priority level is used for both the TX and RX DMA channels but
+ * because of the channels ordering the RX channel has always priority
+ * over the TX channel.
+ */
+#if !defined(SPI1_DMA_PRIORITY) || defined(__DOXYGEN__)
+#define SPI1_DMA_PRIORITY 2
+#endif
+
+/**
+ * @brief SPI2 DMA priority (0..3).
+ * @note The priority level is used for both the TX and RX DMA channels but
+ * because of the channels ordering the RX channel has always priority
+ * over the TX channel.
+ */
+#if !defined(SPI2_DMA_PRIORITY) || defined(__DOXYGEN__)
+#define SPI2_DMA_PRIORITY 2
+#endif
+
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
@@ -65,9 +85,9 @@
* @brief Driver state machine possible states.
*/
typedef enum {
- SPI_UNINIT = 0,
- SPI_IDLE = 1,
- SPI_ACTIVE = 2
+ SPI_UNINIT = 0,//!< SPI_UNINIT
+ SPI_IDLE = 1, //!< SPI_IDLE
+ SPI_ACTIVE = 2 //!< SPI_ACTIVE
} spistate_t;
/**
@@ -128,6 +148,10 @@ typedef struct {
* @brief Pointer to the transmit DMA channel registers block.
*/
DMA_Channel_TypeDef *spd_dmatx;
+ /**
+ * @brief DMA priority bit mask.
+ */
+ uint32_t spd_dmaprio;
} SPIDriver;
/*===========================================================================*/
diff --git a/os/io/templates/spi_lld.c b/os/io/templates/spi_lld.c
index e98ecea14..ca938fe7b 100644
--- a/os/io/templates/spi_lld.c
+++ b/os/io/templates/spi_lld.c
@@ -27,6 +27,18 @@
#include <ch.h>
#include <spi.h>
+/*===========================================================================*/
+/* Low Level Driver local functions. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Low Level Driver interrupt handlers. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Low Level Driver exported functions. */
+/*===========================================================================*/
+
/**
* @brief Low level SPI driver initialization.
*/