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author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-09-10 12:31:51 +0000 |
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committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-09-10 12:31:51 +0000 |
commit | 5c37d04ebf697e07592952ecf7fcccf558dbb23e (patch) | |
tree | 97041dec90890c26782c65e5eff7a5b0c8eacad7 /os | |
parent | 29c73be182b70fd08a44f1fb597a3eac6aff777d (diff) | |
download | ChibiOS-5c37d04ebf697e07592952ecf7fcccf558dbb23e.tar.gz ChibiOS-5c37d04ebf697e07592952ecf7fcccf558dbb23e.tar.bz2 ChibiOS-5c37d04ebf697e07592952ecf7fcccf558dbb23e.zip |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2171 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os')
-rw-r--r-- | os/ports/GCC/ARM7/chcore.h | 2 | ||||
-rw-r--r-- | os/ports/GCC/ARMCMx/chcore.h | 2 | ||||
-rw-r--r-- | os/ports/GCC/AVR/chcore.h | 2 | ||||
-rw-r--r-- | os/ports/GCC/MSP430/chcore.h | 2 | ||||
-rw-r--r-- | os/ports/GCC/PPC/chcore.h | 2 | ||||
-rw-r--r-- | os/ports/GCC/SIMIA32/chcore.h | 2 |
6 files changed, 6 insertions, 6 deletions
diff --git a/os/ports/GCC/ARM7/chcore.h b/os/ports/GCC/ARM7/chcore.h index 8651c22e9..22fbf2137 100644 --- a/os/ports/GCC/ARM7/chcore.h +++ b/os/ports/GCC/ARM7/chcore.h @@ -170,7 +170,7 @@ struct context { * @details This macro is used to allocate a static thread working area
* aligned as both position and size.
*/
-#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)];
+#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)]
/**
* @brief IRQ prologue code.
diff --git a/os/ports/GCC/ARMCMx/chcore.h b/os/ports/GCC/ARMCMx/chcore.h index ae3ec2b8e..4995013e5 100644 --- a/os/ports/GCC/ARMCMx/chcore.h +++ b/os/ports/GCC/ARMCMx/chcore.h @@ -290,7 +290,7 @@ struct context { * @details This macro is used to allocate a static thread working area
* aligned as both position and size.
*/
-#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)];
+#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)]
/* Includes the architecture-specific implementation part.*/
#if defined(CH_ARCHITECTURE_ARM_v6M)
diff --git a/os/ports/GCC/AVR/chcore.h b/os/ports/GCC/AVR/chcore.h index a974b5a1a..77af268c0 100644 --- a/os/ports/GCC/AVR/chcore.h +++ b/os/ports/GCC/AVR/chcore.h @@ -192,7 +192,7 @@ struct context { * @details This macro is used to allocate a static thread working area
* aligned as both position and size.
*/
-#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)];
+#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)]
/**
* @brief IRQ prologue code.
diff --git a/os/ports/GCC/MSP430/chcore.h b/os/ports/GCC/MSP430/chcore.h index 7ff87f41d..15efad59e 100644 --- a/os/ports/GCC/MSP430/chcore.h +++ b/os/ports/GCC/MSP430/chcore.h @@ -164,7 +164,7 @@ struct context { * @details This macro is used to allocate a static thread working area
* aligned as both position and size.
*/
-#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)];
+#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)]
/**
* @brief IRQ prologue code.
diff --git a/os/ports/GCC/PPC/chcore.h b/os/ports/GCC/PPC/chcore.h index 77056b6bd..162469a1b 100644 --- a/os/ports/GCC/PPC/chcore.h +++ b/os/ports/GCC/PPC/chcore.h @@ -226,7 +226,7 @@ struct context { * @details This macro is used to allocate a static thread working area
* aligned as both position and size.
*/
-#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)];
+#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)]
/**
* @brief IRQ prologue code.
diff --git a/os/ports/GCC/SIMIA32/chcore.h b/os/ports/GCC/SIMIA32/chcore.h index aa5e5a5ae..bfb9c4cb5 100644 --- a/os/ports/GCC/SIMIA32/chcore.h +++ b/os/ports/GCC/SIMIA32/chcore.h @@ -139,7 +139,7 @@ struct context { * Macro used to allocate a thread working area aligned as both position and
* size.
*/
-#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)];
+#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)]
/**
* IRQ prologue code, inserted at the start of all IRQ handlers enabled to
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