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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-05-03 20:36:44 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-05-03 20:36:44 +0000 |
| commit | 3e42a8fe7620e26912ed27f626f771b6bd757b31 (patch) | |
| tree | 8da8feb9fa2075b58bff8e074bbbd939f77b2d34 /os | |
| parent | f6ed2f2a8427129c0d24dee81536dbcedaf2d793 (diff) | |
| download | ChibiOS-3e42a8fe7620e26912ed27f626f771b6bd757b31.tar.gz ChibiOS-3e42a8fe7620e26912ed27f626f771b6bd757b31.tar.bz2 ChibiOS-3e42a8fe7620e26912ed27f626f771b6bd757b31.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2917 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os')
| -rw-r--r-- | os/hal/platforms/STM32/sdc_lld.c | 5 | ||||
| -rw-r--r-- | os/hal/platforms/STM32/spi_lld.c | 6 |
2 files changed, 8 insertions, 3 deletions
diff --git a/os/hal/platforms/STM32/sdc_lld.c b/os/hal/platforms/STM32/sdc_lld.c index 43493d8dd..69c04a41a 100644 --- a/os/hal/platforms/STM32/sdc_lld.c +++ b/os/hal/platforms/STM32/sdc_lld.c @@ -319,6 +319,11 @@ bool_t sdc_lld_read_blocks(SDCDriver *sdcp, uint8_t *buf, uint32_t n) { msg_t msg;
chSysLock();
+ dmaChannelSetup(&STM32_DMA2->channels[STM32_DMA_CHANNEL_4],
+ n * SDC_BLOCK_SIZE, buf,
+ (STM32_SDC_SDIO_DMA_PRIORITY << 12) |
+ DMA_CCR1_MINC | DMA_CCR1_EN);
+
chDbgAssert(sdcp->thread == NULL, "sdc_lld_read_blocks(), #1", "not NULL");
sdcp->thread = chThdSelf();
chSchGoSleepS(THD_STATE_SUSPENDED);
diff --git a/os/hal/platforms/STM32/spi_lld.c b/os/hal/platforms/STM32/spi_lld.c index e5f4ed6c5..d8ae657a7 100644 --- a/os/hal/platforms/STM32/spi_lld.c +++ b/os/hal/platforms/STM32/spi_lld.c @@ -230,11 +230,11 @@ void spi_lld_start(SPIDriver *spip) { /* More DMA setup.*/
if ((spip->config->cr1 & SPI_CR1_DFF) == 0)
spip->dmaccr = (STM32_SPI_SPI2_DMA_PRIORITY << 12) |
- DMA_CCR1_TEIE; /* 8 bits transfers. */
+ DMA_CCR1_TEIE; /* 8 bits transfers. */
else
spip->dmaccr = (STM32_SPI_SPI2_DMA_PRIORITY << 12) |
- DMA_CCR1_TEIE | DMA_CCR1_MSIZE_0 |
- DMA_CCR1_PSIZE_0; /* 16 bits transfers. */
+ DMA_CCR1_TEIE | DMA_CCR1_MSIZE_0 |
+ DMA_CCR1_PSIZE_0; /* 16 bits transfers. */
/* SPI setup and enable.*/
spip->spi->CR1 = 0;
|