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authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2012-02-26 11:30:50 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2012-02-26 11:30:50 +0000
commit3c7d97c61e32d7ca023ff0c308fd52015f9abdd4 (patch)
tree3bbe7debcf70128424b613c7a7a92876c3c7ce32 /os
parentf23c3ab18e0a92bfa89919b2dd1c964d0a79f9c6 (diff)
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STM32 Ethernet driver apparently working, it needs extensive testing.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3987 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os')
-rw-r--r--os/hal/platforms/STM32/mac_lld.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/os/hal/platforms/STM32/mac_lld.c b/os/hal/platforms/STM32/mac_lld.c
index 01eb1e4c3..236f96fc4 100644
--- a/os/hal/platforms/STM32/mac_lld.c
+++ b/os/hal/platforms/STM32/mac_lld.c
@@ -258,7 +258,7 @@ void mac_lld_init(void) {
#endif
/* PHY in power down mode until the driver will be started.*/
-// mii_write(&ETHD1, MII_BMCR, mii_read(&ETHD1, MII_BMCR) | BMCR_PDOWN);
+ mii_write(&ETHD1, MII_BMCR, mii_read(&ETHD1, MII_BMCR) | BMCR_PDOWN);
/* MAC clocks stopped again.*/
rccDisableETH(FALSE);
@@ -292,7 +292,7 @@ void mac_lld_start(MACDriver *macp) {
nvicEnableVector(ETH_IRQn, CORTEX_PRIORITY_MASK(STM32_ETH1_IRQ_PRIORITY));
/* PHY in power up mode.*/
-// mii_write(macp, MII_BMCR, mii_read(macp, MII_BMCR) & ~BMCR_PDOWN);
+ mii_write(macp, MII_BMCR, mii_read(macp, MII_BMCR) & ~BMCR_PDOWN);
/* MAC configuration.*/
ETH->MACFFR = 0;
@@ -317,7 +317,7 @@ void mac_lld_start(MACDriver *macp) {
/* Enabling required interrupt sources.*/
ETH->DMASR = ETH->DMASR;
- ETH->DMAIER = ETH_DMAIER_RIE | ETH_DMAIER_TIE;
+ ETH->DMAIER = ETH_DMAIER_NISE | ETH_DMAIER_RIE | ETH_DMAIER_TIE;
/* DMA general settings.*/
ETH->DMABMR = ETH_DMABMR_AAB | ETH_DMABMR_RDP_1Beat | ETH_DMABMR_PBL_1Beat;
@@ -343,7 +343,7 @@ void mac_lld_stop(MACDriver *macp) {
if (macp->state != MAC_STOP) {
/* PHY in power down mode until the driver will be restarted.*/
-// mii_write(macp, MII_BMCR, mii_read(macp, MII_BMCR) | BMCR_PDOWN);
+ mii_write(macp, MII_BMCR, mii_read(macp, MII_BMCR) | BMCR_PDOWN);
/* MAC and DMA stopped.*/
ETH->MACCR = 0;