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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-03-30 17:35:00 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-03-30 17:35:00 +0000 |
| commit | 3846f18c1279ab30944e3dd63cc002379be6a5e1 (patch) | |
| tree | be9176a8b2023e9fc6ded97cdee570e372351d56 /os | |
| parent | 1134fe2a87e70cad601394793f0f01cfef066b70 (diff) | |
| download | ChibiOS-3846f18c1279ab30944e3dd63cc002379be6a5e1.tar.gz ChibiOS-3846f18c1279ab30944e3dd63cc002379be6a5e1.tar.bz2 ChibiOS-3846f18c1279ab30944e3dd63cc002379be6a5e1.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1815 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os')
| -rw-r--r-- | os/hal/platforms/STM32/hal_lld.c | 4 | ||||
| -rw-r--r-- | os/ports/GCC/ARMCM3/chcore.h | 1 | ||||
| -rw-r--r-- | os/ports/GCC/ARMCMx/chcore.h | 59 |
3 files changed, 33 insertions, 31 deletions
diff --git a/os/hal/platforms/STM32/hal_lld.c b/os/hal/platforms/STM32/hal_lld.c index 817147026..a533b205c 100644 --- a/os/hal/platforms/STM32/hal_lld.c +++ b/os/hal/platforms/STM32/hal_lld.c @@ -73,10 +73,6 @@ const STM32GPIOConfig pal_default_config = */
void hal_lld_init(void) {
- /* Note: PRIGROUP 4:0 (4:4).*/
- SCB->AIRCR = (0x05FA << SCB_AIRCR_VECTKEY_Pos) |
- (3 << SCB_AIRCR_PRIGROUP_Pos);
-
/* SysTick initialization using the system clock.*/
SysTick->LOAD = SYSCLK / CH_FREQUENCY - 1;
SysTick->VAL = 0;
diff --git a/os/ports/GCC/ARMCM3/chcore.h b/os/ports/GCC/ARMCM3/chcore.h index a720d9ffb..e627d2302 100644 --- a/os/ports/GCC/ARMCM3/chcore.h +++ b/os/ports/GCC/ARMCM3/chcore.h @@ -362,6 +362,7 @@ struct context { * @brief Port-related initialization code.
*/
#define port_init() { \
+ SCB_AIRCR = AIRCR_VECTKEY | AIRCR_PRIGROUP(0); \
NVICSetSystemHandlerPriority(HANDLER_SVCALL, \
CORTEX_PRIORITY_MASK(CORTEX_PRIORITY_SVCALL)); \
NVICSetSystemHandlerPriority(HANDLER_PENDSV, \
diff --git a/os/ports/GCC/ARMCMx/chcore.h b/os/ports/GCC/ARMCMx/chcore.h index d858a806d..aec560565 100644 --- a/os/ports/GCC/ARMCMx/chcore.h +++ b/os/ports/GCC/ARMCMx/chcore.h @@ -28,6 +28,8 @@ #ifndef _CHCORE_H_
#define _CHCORE_H_
+#include "nvic.h"
+
/*===========================================================================*/
/* Port constants. */
/*===========================================================================*/
@@ -257,13 +259,13 @@ struct context { * @details This code usually setup the context switching frame represented
* by an @p intctx structure.
*/
-#define SETUP_CONTEXT(workspace, wsize, pf, arg) { \
- tp->p_ctx.r13 = (struct intctx *)((uint8_t *)workspace + \
- wsize - \
- sizeof(struct intctx)); \
- tp->p_ctx.r13->r4 = pf; \
- tp->p_ctx.r13->r5 = arg; \
- tp->p_ctx.r13->lr = _port_thread_start; \
+#define SETUP_CONTEXT(workspace, wsize, pf, arg) { \
+ tp->p_ctx.r13 = (struct intctx *)((uint8_t *)workspace + \
+ wsize - \
+ sizeof(struct intctx)); \
+ tp->p_ctx.r13->r4 = pf; \
+ tp->p_ctx.r13->r5 = arg; \
+ tp->p_ctx.r13->lr = _port_thread_start; \
}
/**
@@ -299,9 +301,9 @@ struct context { /**
* @brief Computes the thread working area global size.
*/
-#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
- sizeof(struct intctx) + \
- sizeof(struct extctx) + \
+#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
+ sizeof(struct intctx) + \
+ sizeof(struct extctx) + \
(n) + (INT_REQUIRED_STACK))
/**
@@ -316,10 +318,10 @@ struct context { * @details This macro must be inserted at the start of all IRQ handlers
* enabled to invoke system APIs.
*/
-#define PORT_IRQ_PROLOGUE() { \
- chSysLockFromIsr(); \
- _port_irq_nesting++; \
- chSysUnlockFromIsr(); \
+#define PORT_IRQ_PROLOGUE() { \
+ chSysLockFromIsr(); \
+ _port_irq_nesting++; \
+ chSysUnlockFromIsr(); \
}
/**
@@ -327,17 +329,17 @@ struct context { * @details This macro must be inserted at the end of all IRQ handlers
* enabled to invoke system APIs.
*/
-#define PORT_IRQ_EPILOGUE() { \
- chSysLockFromIsr(); \
- if ((--_port_irq_nesting == 0) && chSchIsRescRequiredExI()) { \
- register struct cmxctx *ctxp asm ("r3"); \
- \
- asm volatile ("mrs %0, PSP" : "=r" (ctxp) : "r" (ctxp)); \
- _port_saved_pc = ctxp->pc; \
- ctxp->pc = _port_switch_from_irq; \
- return; \
- } \
- chSysUnlockFromIsr(); \
+#define PORT_IRQ_EPILOGUE() { \
+ chSysLockFromIsr(); \
+ if ((--_port_irq_nesting == 0) && chSchIsRescRequiredExI()) { \
+ register struct cmxctx *ctxp asm ("r3"); \
+ \
+ asm volatile ("mrs %0, PSP" : "=r" (ctxp) : "r" (ctxp)); \
+ _port_saved_pc = ctxp->pc; \
+ ctxp->pc = _port_switch_from_irq; \
+ return; \
+ } \
+ chSysUnlockFromIsr(); \
}
/**
@@ -350,8 +352,11 @@ struct context { /**
* @brief Port-related initialization code.
*/
-#define port_init() { \
- _port_irq_nesting = 0; \
+#define port_init() { \
+ _port_irq_nesting = 0; \
+ SCB_AIRCR = AIRCR_VECTKEY | AIRCR_PRIGROUP(0); \
+ NVICSetSystemHandlerPriority(HANDLER_SYSTICK, \
+ CORTEX_PRIORITY_MASK(CORTEX_PRIORITY_SYSTICK)); \
}
/**
|