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| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-07-08 14:08:25 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-07-08 14:08:25 +0000 |
| commit | 2cec1789e1291f2ce1c1ebe1b942784e6767ab2b (patch) | |
| tree | b80ce69b828b1723000a73b5a2d339b692a8f8b9 /os | |
| parent | 32d4ce8ee43227c7a630c7511b3f69a93c1a821e (diff) | |
| download | ChibiOS-2cec1789e1291f2ce1c1ebe1b942784e6767ab2b.tar.gz ChibiOS-2cec1789e1291f2ce1c1ebe1b942784e6767ab2b.tar.bz2 ChibiOS-2cec1789e1291f2ce1c1ebe1b942784e6767ab2b.zip | |
Added analog watchdog functionality to STM32 ADCv2 driver.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12149 110e8d01-0319-4d1e-a829-52ad28d1bb01
Diffstat (limited to 'os')
| -rw-r--r-- | os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.c | 20 | ||||
| -rw-r--r-- | os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.h | 27 |
2 files changed, 43 insertions, 4 deletions
diff --git a/os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.c b/os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.c index b69fb3172..ab3fbf462 100644 --- a/os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.c +++ b/os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.c @@ -124,7 +124,11 @@ OSAL_IRQ_HANDLER(STM32_ADC_HANDLER) { if (ADCD1.grpp != NULL)
_adc_isr_error_code(&ADCD1, ADC_ERR_OVERFLOW);
}
- /* TODO: Add here analog watchdog handling.*/
+ if (sr & ADC_SR_AWD) {
+ if (ADCD1.grpp != NULL) {
+ _adc_isr_error_code(&ADCD1, ADC_ERR_WATCHDOG);
+ }
+ }
#if defined(STM32_ADC_ADC1_IRQ_HOOK)
STM32_ADC_ADC1_IRQ_HOOK
#endif
@@ -141,7 +145,11 @@ OSAL_IRQ_HANDLER(STM32_ADC_HANDLER) { if (ADCD2.grpp != NULL)
_adc_isr_error_code(&ADCD2, ADC_ERR_OVERFLOW);
}
- /* TODO: Add here analog watchdog handling.*/
+ if (sr & ADC_SR_AWD) {
+ if (ADCD2.grpp != NULL) {
+ _adc_isr_error_code(&ADCD2, ADC_ERR_WATCHDOG);
+ }
+ }
#if defined(STM32_ADC_ADC2_IRQ_HOOK)
STM32_ADC_ADC2_IRQ_HOOK
#endif
@@ -158,7 +166,11 @@ OSAL_IRQ_HANDLER(STM32_ADC_HANDLER) { if (ADCD3.grpp != NULL)
_adc_isr_error_code(&ADCD3, ADC_ERR_OVERFLOW);
}
- /* TODO: Add here analog watchdog handling.*/
+ if (sr & ADC_SR_AWD) {
+ if (ADCD3.grpp != NULL) {
+ _adc_isr_error_code(&ADCD3, ADC_ERR_WATCHDOG);
+ }
+ }
#if defined(STM32_ADC_ADC3_IRQ_HOOK)
STM32_ADC_ADC3_IRQ_HOOK
#endif
@@ -350,6 +362,8 @@ void adc_lld_start_conversion(ADCDriver *adcp) { adcp->adc->SR = 0;
adcp->adc->SMPR1 = grpp->smpr1;
adcp->adc->SMPR2 = grpp->smpr2;
+ adcp->adc->HTR = grpp->htr;
+ adcp->adc->LTR = grpp->ltr;
adcp->adc->SQR1 = grpp->sqr1 | ADC_SQR1_NUM_CH(grpp->num_channels);
adcp->adc->SQR2 = grpp->sqr2;
adcp->adc->SQR3 = grpp->sqr3;
diff --git a/os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.h b/os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.h index ecdd5ba0e..3fe808a8e 100644 --- a/os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.h +++ b/os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.h @@ -313,7 +313,8 @@ typedef uint16_t adc_channels_num_t; */
typedef enum {
ADC_ERR_DMAFAILURE = 0, /**< DMA operations failure. */
- ADC_ERR_OVERFLOW = 1 /**< ADC overflow condition. */
+ ADC_ERR_OVERFLOW = 1, /**< ADC overflow condition. */
+ ADC_ERR_WATCHDOG = 2 /**< ADC watchdog condition. */
} adcerror_t;
/**
@@ -392,6 +393,16 @@ typedef struct { */
uint32_t smpr2;
/**
+ * @brief ADC watchdog high threshold register.
+ * @details This field defines the high threshold of the analog watchdog.
+ */
+ uint16_t htr;
+ /**
+ * @brief ADC watchdog low threshold register.
+ * @details This field defines the low threshold of the analog watchdog.
+ */
+ uint16_t ltr;
+ /**
* @brief ADC SQR1 register initialization data.
* @details Conversion group sequence 13...16 + sequence length.
*/
@@ -531,6 +542,20 @@ struct ADCDriver { #define ADC_SMPR1_SMP_VBAT(n) ((n) << 24) /**< @brief VBAT sampling time. */
/** @} */
+/**
+ * @name Threshold settings helper macros
+ * @{
+ */
+/**
+ * @brief High threshold limitation.
+ */
+#define ADC_HTR(n) ((n > ADC_HTR_HT) ? ADC_HTR_HT : n)
+/**
+ * @brief Low threshold limitation.
+ */
+#define ADC_LTR(n) ((n > ADC_LTR_LT) ? ADC_LTR_LT : n)
+/** @} */
+
/*===========================================================================*/
/* External declarations. */
/*===========================================================================*/
|