Fixed bug 3075354.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2194 35acf78f-673a-0410-8e92-d51de3d6d3f4

1 files changed, 10 insertions, 1 deletions

diff --git a/os/hal/platforms/AT91SAM7/hal_lld.c b/os/hal/platforms/AT91SAM7/hal_lld.c
index 841a4d2d7..370b7cad5 100644
--- a/os/hal/platforms/AT91SAM7/hal_lld.c
+++ b/os/hal/platforms/AT91SAM7/hal_lld.c
@@ -105,7 +105,12 @@ void at91sam7_clock_init(void) {
   AT91C_BASE_RSTC->RSTC_RMR = ((0xA5 << 24) | AT91C_RSTC_URSTEN);

 

   /* Flash Memory: 1 wait state, about 50 cycles in a microsecond.*/

+#if SAM7_PLATFORM == SAM7X512

+  AT91C_BASE_MC->MC0_FMR = (AT91C_MC_FMCN & (50 << 16)) | AT91C_MC_FWS_1FWS;

+  AT91C_BASE_MC->MC1_FMR = (AT91C_MC_FMCN & (50 << 16)) | AT91C_MC_FWS_1FWS;

+#else

   AT91C_BASE_MC->MC_FMR = (AT91C_MC_FMCN & (50 << 16)) | AT91C_MC_FWS_1FWS;

+#endif

 

   /* Enables the main oscillator and waits 56 slow cycles as startup time.*/

   AT91C_BASE_PMC->PMC_MOR = (AT91C_CKGR_OSCOUNT & (7 << 8)) | AT91C_CKGR_MOSCEN;

@@ -122,7 +127,11 @@ void at91sam7_clock_init(void) {
     ;

 

   /* Master clock = PLLfreq / 2 = 48054858 Hz (rounded).*/

-  AT91C_BASE_PMC->PMC_MCKR = AT91C_PMC_CSS_PLL_CLK | AT91C_PMC_PRES_CLK_2;

+  AT91C_BASE_PMC->PMC_MCKR = AT91C_PMC_PRES_CLK_2;

+  while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY))

+    ;

+

+  AT91C_BASE_PMC->PMC_MCKR |= AT91C_PMC_CSS_PLL_CLK;

   while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY))

     ;

 }