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authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2009-08-20 12:53:46 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2009-08-20 12:53:46 +0000
commit0b8f1183fe1f321fdd71e9d1fc5a28323f9036a7 (patch)
treeee7377804987aca48f47113819ae0e374327d643 /os
parent6c11580166f3b6cdb32b3c0d02d34d911dbc2f13 (diff)
downloadChibiOS-0b8f1183fe1f321fdd71e9d1fc5a28323f9036a7.tar.gz
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1090 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os')
-rw-r--r--os/io/platforms/STM32F103/serial_lld.c2
-rw-r--r--os/io/readme.txt7
-rw-r--r--os/io/templates/pal_lld.c2
-rw-r--r--os/io/templates/pal_lld.h2
-rw-r--r--os/io/templates/serial_lld.c3
-rw-r--r--os/io/templates/serial_lld.h4
-rw-r--r--os/ports/GCC/ARM7/chcore.lst376
-rw-r--r--os/ports/GCC/ARM7/crt0.lst451
8 files changed, 574 insertions, 273 deletions
diff --git a/os/io/platforms/STM32F103/serial_lld.c b/os/io/platforms/STM32F103/serial_lld.c
index f671f2be6..55074f51b 100644
--- a/os/io/platforms/STM32F103/serial_lld.c
+++ b/os/io/platforms/STM32F103/serial_lld.c
@@ -65,7 +65,7 @@ static const SerialDriverConfig default_config =
* @param[in] u pointer to an USART I/O block
* @param[in] config the architecture-dependent serial driver configuration
*/
-static void usart_init(USART_TypeDef *u, const SerialDriverConfig* config) {
+static void usart_init(USART_TypeDef *u, const SerialDriverConfig *config) {
/*
* Baud rate setting.
diff --git a/os/io/readme.txt b/os/io/readme.txt
index 2f13a937f..24aace302 100644
--- a/os/io/readme.txt
+++ b/os/io/readme.txt
@@ -1,3 +1,4 @@
-ChibiOS/RT I/O abstraction code, available modules:
-- PAL, digital I/O ports abstraction layer.
-- serial, abstract serial communication port using channels and events.
+ChibiOS/RT I/O abstraction layer, available drivers:
+- PAL. Digital I/O ports abstraction layer.
+- Serial. Buffered, interrupt driven, serial communication driver using OS
+ queues, channels and events.
diff --git a/os/io/templates/pal_lld.c b/os/io/templates/pal_lld.c
index b830de338..547db75b6 100644
--- a/os/io/templates/pal_lld.c
+++ b/os/io/templates/pal_lld.c
@@ -18,7 +18,7 @@
*/
/**
- * @file os/io/templates/pal_lld.c
+ * @file templates/pal_lld.c
* @brief PAL subsystem low level driver template
* @addtogroup PAL_LLD
* @{
diff --git a/os/io/templates/pal_lld.h b/os/io/templates/pal_lld.h
index cd68f605d..3da1c6d7d 100644
--- a/os/io/templates/pal_lld.h
+++ b/os/io/templates/pal_lld.h
@@ -18,7 +18,7 @@
*/
/**
- * @file os/io/templates/pal_lld.h
+ * @file templates/pal_lld.h
* @brief PAL subsystem low level driver header template
* @addtogroup PAL_LLD
* @{
diff --git a/os/io/templates/serial_lld.c b/os/io/templates/serial_lld.c
index 211307f16..505a80378 100644
--- a/os/io/templates/serial_lld.c
+++ b/os/io/templates/serial_lld.c
@@ -18,13 +18,14 @@
*/
/**
- * @file os/io/templates/serial_lld.c
+ * @file templates/serial_lld.c
* @brief Serial Driver subsystem low level driver source template
* @addtogroup SERIAL_LLD
* @{
*/
#include <ch.h>
+#include <serial.h>
/** @brief Driver default configuration.*/
static const SerialDriverConfig default_config = {
diff --git a/os/io/templates/serial_lld.h b/os/io/templates/serial_lld.h
index 2c133f91c..ab6d8e7a2 100644
--- a/os/io/templates/serial_lld.h
+++ b/os/io/templates/serial_lld.h
@@ -18,7 +18,7 @@
*/
/**
- * @file os/io/templates/serial_lld.h
+ * @file templates/serial_lld.h
* @brief Serial Driver subsystem low level driver header template
* @addtogroup SERIAL_LLD
* @{
@@ -96,10 +96,10 @@ typedef struct {
#ifdef __cplusplus
extern "C" {
+#endif
void sd_lld_init(void);
void sd_lld_start(SerialDriver *sdp, const SerialDriverConfig *config);
void sd_lld_stop(SerialDriver *sdp);
-#endif
#ifdef __cplusplus
}
#endif
diff --git a/os/ports/GCC/ARM7/chcore.lst b/os/ports/GCC/ARM7/chcore.lst
index db8b7a12c..2ffc986fb 100644
--- a/os/ports/GCC/ARM7/chcore.lst
+++ b/os/ports/GCC/ARM7/chcore.lst
@@ -1,48 +1,332 @@
- 1 .file "chcore.c"
- 2 __SREG__ = 0x3f
- 3 __SP_H__ = 0x3e
- 4 __SP_L__ = 0x3d
- 5 __CCP__ = 0x34
- 6 __tmp_reg__ = 0
- 7 __zero_reg__ = 1
- 8 .global __do_copy_data
- 9 .global __do_clear_bss
- 17 .Ltext0:
- 18 .weak port_halt
- 20 port_halt:
- 21 .LFB7:
- 22 .LM1:
- 23 ???? 3F92 push r3
- 24 /* prologue: function */
- 25 /* frame size = 0 */
- 26 .LM2:
- 27 /* #APP */
- 28 ; 37 "../../os/ports/GCC/ARM7/chcore.c" 1
- 29 mrs r3, CPSR
- 30 orr r3, #0x80
- 31 msr CPSR_c, r3
- 32 orr r3, #0x40
- 33 msr CPSR_c, r3
- 34 ; 0 "" 2
- 35 /* #NOAPP */
- 36 .L2:
- 37 ???? 00C0 rjmp .L2
- 38 .LFE7:
- 64 .Letext0:
+ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp/cc8HqpiL.s page 1
+
+
+ 1 .file "chcore.c"
+ 2 .section .debug_abbrev,"",%progbits
+ 3 .Ldebug_abbrev0:
+ 4 .section .debug_info,"",%progbits
+ 5 .Ldebug_info0:
+ 6 .section .debug_line,"",%progbits
+ 7 .Ldebug_line0:
+ 8 0000 4D000000 .text
+ 8 02003700
+ 8 00000201
+ 8 FB0E0D00
+ 8 01010101
+ 9 .Ltext0:
+ 10 .section .text.port_halt,"ax",%progbits
+ 11 .align 2
+ 12 .p2align 4,,15
+ 13 .weak port_halt
+ 14 .type port_halt, %function
+ 15 port_halt:
+ 16 .LFB7:
+ 17 .file 1 "../../os/ports/GCC/ARM7/chcore.c"
+ 18 .loc 1 35 0
+ 19 @ args = 0, pretend = 0, frame = 0
+ 20 @ frame_needed = 0, uses_anonymous_args = 0
+ 21 @ link register save eliminated.
+ 22 .loc 1 37 0
+ 23 @ 37 "../../os/ports/GCC/ARM7/chcore.c" 1
+ 24 0000 00300FE1 mrs r3, CPSR
+ 25 0004 803083E3 orr r3, #0x80
+ 26 0008 03F021E1 msr CPSR_c, r3
+ 27 000c 403083E3 orr r3, #0x40
+ 28 0010 03F021E1 msr CPSR_c, r3
+ 29 @ 0 "" 2
+ 30 .L2:
+ 31 0014 FEFFFFEA b .L2
+ 32 .LFE7:
+ 33 .size port_halt, .-port_halt
+ 34 0018 0000A0E1 .section .debug_frame,"",%progbits
+ 34 0000A0E1
+ 35 .Lframe0:
+ 36 0000 0C000000 .4byte .LECIE0-.LSCIE0
+ 37 .LSCIE0:
+ 38 0004 FFFFFFFF .4byte 0xffffffff
+ 39 0008 01 .byte 0x1
+ 40 0009 00 .ascii "\000"
+ 41 000a 01 .uleb128 0x1
+ 42 000b 7C .sleb128 -4
+ 43 000c 0E .byte 0xe
+ 44 000d 0C .byte 0xc
+ 45 000e 0D .uleb128 0xd
+ 46 000f 00 .uleb128 0x0
+ 47 .align 2
+ 48 .LECIE0:
+ 49 .LSFDE0:
+ 50 0010 0C000000 .4byte .LEFDE0-.LASFDE0
+ 51 .LASFDE0:
+ 52 0014 00000000 .4byte .Lframe0
+ ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp/cc8HqpiL.s page 2
+
+
+ 53 0018 00000000 .4byte .LFB7
+ 54 001c 18000000 .4byte .LFE7-.LFB7
+ 55 .align 2
+ 56 .LEFDE0:
+ 57 .text
+ 58 .Letext0:
+ 59 .section .debug_info
+ 60 0000 82000000 .4byte 0x82
+ 61 0004 0200 .2byte 0x2
+ 62 0006 00000000 .4byte .Ldebug_abbrev0
+ 63 000a 04 .byte 0x4
+ 64 000b 01 .uleb128 0x1
+ 65 000c 1F000000 .4byte .LASF9
+ 66 0010 01 .byte 0x1
+ 67 0011 39000000 .4byte .LASF10
+ 68 0015 BB000000 .4byte .LASF11
+ 69 0019 00000000 .4byte 0x0
+ 70 001d 00000000 .4byte 0x0
+ 71 0021 00000000 .4byte .Ldebug_ranges0+0x0
+ 72 0025 00000000 .4byte .Ldebug_line0
+ 73 0029 02 .uleb128 0x2
+ 74 002a 04 .byte 0x4
+ 75 002b 05 .byte 0x5
+ 76 002c A4000000 .4byte .LASF0
+ 77 0030 02 .uleb128 0x2
+ 78 0031 04 .byte 0x4
+ 79 0032 07 .byte 0x7
+ 80 0033 0D000000 .4byte .LASF1
+ 81 0037 02 .uleb128 0x2
+ 82 0038 01 .byte 0x1
+ 83 0039 06 .byte 0x6
+ 84 003a 5A000000 .4byte .LASF2
+ 85 003e 02 .uleb128 0x2
+ 86 003f 01 .byte 0x1
+ 87 0040 08 .byte 0x8
+ 88 0041 2B000000 .4byte .LASF3
+ 89 0045 02 .uleb128 0x2
+ 90 0046 02 .byte 0x2
+ 91 0047 05 .byte 0x5
+ 92 0048 70000000 .4byte .LASF4
+ 93 004c 02 .uleb128 0x2
+ 94 004d 02 .byte 0x2
+ 95 004e 07 .byte 0x7
+ 96 004f 91000000 .4byte .LASF5
+ 97 0053 02 .uleb128 0x2
+ 98 0054 08 .byte 0x8
+ 99 0055 05 .byte 0x5
+ 100 0056 AD000000 .4byte .LASF6
+ 101 005a 02 .uleb128 0x2
+ 102 005b 08 .byte 0x8
+ 103 005c 07 .byte 0x7
+ 104 005d 7A000000 .4byte .LASF7
+ 105 0061 03 .uleb128 0x3
+ 106 0062 04 .byte 0x4
+ 107 0063 05 .byte 0x5
+ 108 0064 696E7400 .ascii "int\000"
+ 109 0068 02 .uleb128 0x2
+ ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp/cc8HqpiL.s page 3
+
+
+ 110 0069 04 .byte 0x4
+ 111 006a 07 .byte 0x7
+ 112 006b 00000000 .4byte .LASF8
+ 113 006f 04 .uleb128 0x4
+ 114 0070 04 .byte 0x4
+ 115 0071 07 .byte 0x7
+ 116 0072 05 .uleb128 0x5
+ 117 0073 01 .byte 0x1
+ 118 0074 66000000 .4byte .LASF12
+ 119 0078 01 .byte 0x1
+ 120 0079 23 .byte 0x23
+ 121 007a 01 .byte 0x1
+ 122 007b 00000000 .4byte .LFB7
+ 123 007f 18000000 .4byte .LFE7
+ 124 0083 01 .byte 0x1
+ 125 0084 5D .byte 0x5d
+ 126 0085 00 .byte 0x0
+ 127 .section .debug_abbrev
+ 128 0000 01 .uleb128 0x1
+ 129 0001 11 .uleb128 0x11
+ 130 0002 01 .byte 0x1
+ 131 0003 25 .uleb128 0x25
+ 132 0004 0E .uleb128 0xe
+ 133 0005 13 .uleb128 0x13
+ 134 0006 0B .uleb128 0xb
+ 135 0007 03 .uleb128 0x3
+ 136 0008 0E .uleb128 0xe
+ 137 0009 1B .uleb128 0x1b
+ 138 000a 0E .uleb128 0xe
+ 139 000b 11 .uleb128 0x11
+ 140 000c 01 .uleb128 0x1
+ 141 000d 52 .uleb128 0x52
+ 142 000e 01 .uleb128 0x1
+ 143 000f 55 .uleb128 0x55
+ 144 0010 06 .uleb128 0x6
+ 145 0011 10 .uleb128 0x10
+ 146 0012 06 .uleb128 0x6
+ 147 0013 00 .byte 0x0
+ 148 0014 00 .byte 0x0
+ 149 0015 02 .uleb128 0x2
+ 150 0016 24 .uleb128 0x24
+ 151 0017 00 .byte 0x0
+ 152 0018 0B .uleb128 0xb
+ 153 0019 0B .uleb128 0xb
+ 154 001a 3E .uleb128 0x3e
+ 155 001b 0B .uleb128 0xb
+ 156 001c 03 .uleb128 0x3
+ 157 001d 0E .uleb128 0xe
+ 158 001e 00 .byte 0x0
+ 159 001f 00 .byte 0x0
+ 160 0020 03 .uleb128 0x3
+ 161 0021 24 .uleb128 0x24
+ 162 0022 00 .byte 0x0
+ 163 0023 0B .uleb128 0xb
+ 164 0024 0B .uleb128 0xb
+ 165 0025 3E .uleb128 0x3e
+ 166 0026 0B .uleb128 0xb
+ ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp/cc8HqpiL.s page 4
+
+
+ 167 0027 03 .uleb128 0x3
+ 168 0028 08 .uleb128 0x8
+ 169 0029 00 .byte 0x0
+ 170 002a 00 .byte 0x0
+ 171 002b 04 .uleb128 0x4
+ 172 002c 24 .uleb128 0x24
+ 173 002d 00 .byte 0x0
+ 174 002e 0B .uleb128 0xb
+ 175 002f 0B .uleb128 0xb
+ 176 0030 3E .uleb128 0x3e
+ 177 0031 0B .uleb128 0xb
+ 178 0032 00 .byte 0x0
+ 179 0033 00 .byte 0x0
+ 180 0034 05 .uleb128 0x5
+ 181 0035 2E .uleb128 0x2e
+ 182 0036 00 .byte 0x0
+ 183 0037 3F .uleb128 0x3f
+ 184 0038 0C .uleb128 0xc
+ 185 0039 03 .uleb128 0x3
+ 186 003a 0E .uleb128 0xe
+ 187 003b 3A .uleb128 0x3a
+ 188 003c 0B .uleb128 0xb
+ 189 003d 3B .uleb128 0x3b
+ 190 003e 0B .uleb128 0xb
+ 191 003f 27 .uleb128 0x27
+ 192 0040 0C .uleb128 0xc
+ 193 0041 11 .uleb128 0x11
+ 194 0042 01 .uleb128 0x1
+ 195 0043 12 .uleb128 0x12
+ 196 0044 01 .uleb128 0x1
+ 197 0045 40 .uleb128 0x40
+ 198 0046 0A .uleb128 0xa
+ 199 0047 00 .byte 0x0
+ 200 0048 00 .byte 0x0
+ 201 0049 00 .byte 0x0
+ 202 .section .debug_pubnames,"",%progbits
+ 203 0000 1C000000 .4byte 0x1c
+ 204 0004 0200 .2byte 0x2
+ 205 0006 00000000 .4byte .Ldebug_info0
+ 206 000a 86000000 .4byte 0x86
+ 207 000e 72000000 .4byte 0x72
+ 208 0012 706F7274 .ascii "port_halt\000"
+ 208 5F68616C
+ 208 7400
+ 209 001c 00000000 .4byte 0x0
+ 210 .section .debug_aranges,"",%progbits
+ 211 0000 1C000000 .4byte 0x1c
+ 212 0004 0200 .2byte 0x2
+ 213 0006 00000000 .4byte .Ldebug_info0
+ 214 000a 04 .byte 0x4
+ 215 000b 00 .byte 0x0
+ 216 000c 0000 .2byte 0x0
+ 217 000e 0000 .2byte 0x0
+ 218 0010 00000000 .4byte .LFB7
+ 219 0014 18000000 .4byte .LFE7-.LFB7
+ 220 0018 00000000 .4byte 0x0
+ 221 001c 00000000 .4byte 0x0
+ ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp/cc8HqpiL.s page 5
+
+
+ 222 .section .debug_ranges,"",%progbits
+ 223 .Ldebug_ranges0:
+ 224 0000 00000000 .4byte .Ltext0
+ 225 0004 00000000 .4byte .Letext0
+ 226 0008 00000000 .4byte .LFB7
+ 227 000c 18000000 .4byte .LFE7
+ 228 0010 00000000 .4byte 0x0
+ 229 0014 00000000 .4byte 0x0
+ 230 .section .debug_str,"MS",%progbits,1
+ 231 .LASF8:
+ 232 0000 756E7369 .ascii "unsigned int\000"
+ 232 676E6564
+ 232 20696E74
+ 232 00
+ 233 .LASF1:
+ 234 000d 6C6F6E67 .ascii "long unsigned int\000"
+ 234 20756E73
+ 234 69676E65
+ 234 6420696E
+ 234 7400
+ 235 .LASF9:
+ 236 001f 474E5520 .ascii "GNU C 4.3.3\000"
+ 236 4320342E
+ 236 332E3300
+ 237 .LASF3:
+ 238 002b 756E7369 .ascii "unsigned char\000"
+ 238 676E6564
+ 238 20636861
+ 238 7200
+ 239 .LASF10:
+ 240 0039 2E2E2F2E .ascii "../../os/ports/GCC/ARM7/chcore.c\000"
+ 240 2E2F6F73
+ 240 2F706F72
+ 240 74732F47
+ 240 43432F41
+ 241 .LASF2:
+ 242 005a 7369676E .ascii "signed char\000"
+ 242 65642063
+ 242 68617200
+ 243 .LASF12:
+ 244 0066 706F7274 .ascii "port_halt\000"
+ 244 5F68616C
+ 244 7400
+ 245 .LASF4:
+ 246 0070 73686F72 .ascii "short int\000"
+ 246 7420696E
+ 246 7400
+ 247 .LASF7:
+ 248 007a 6C6F6E67 .ascii "long long unsigned int\000"
+ 248 206C6F6E
+ 248 6720756E
+ 248 7369676E
+ 248 65642069
+ 249 .LASF5:
+ 250 0091 73686F72 .ascii "short unsigned int\000"
+ 250 7420756E
+ 250 7369676E
+ ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp/cc8HqpiL.s page 6
+
+
+ 250 65642069
+ 250 6E7400
+ 251 .LASF0:
+ 252 00a4 6C6F6E67 .ascii "long int\000"
+ 252 20696E74
+ 252 00
+ 253 .LASF6:
+ 254 00ad 6C6F6E67 .ascii "long long int\000"
+ 254 206C6F6E
+ 254 6720696E
+ 254 7400
+ 255 .LASF11:
+ 256 00bb 443A5C50 .ascii "D:\\Progetti\\ChibiOS-RT\\demos\\ARM7-LPC214x-GCC\000"
+ 256 726F6765
+ 256 7474695C
+ 256 43686962
+ 256 694F532D
+ 257 .ident "GCC: (GNU) 4.3.3"
+ ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp/cc8HqpiL.s page 7
+
+
DEFINED SYMBOLS
*ABS*:00000000 chcore.c
-C:\DOCUME~1\Giovanni\IMPOST~1\Temp/ccjonuJz.s:2 *ABS*:0000003f __SREG__
-C:\DOCUME~1\Giovanni\IMPOST~1\Temp/ccjonuJz.s:3 *ABS*:0000003e __SP_H__
-C:\DOCUME~1\Giovanni\IMPOST~1\Temp/ccjonuJz.s:4 *ABS*:0000003d __SP_L__
-C:\DOCUME~1\Giovanni\IMPOST~1\Temp/ccjonuJz.s:5 *ABS*:00000034 __CCP__
-C:\DOCUME~1\Giovanni\IMPOST~1\Temp/ccjonuJz.s:6 *ABS*:00000000 __tmp_reg__
-C:\DOCUME~1\Giovanni\IMPOST~1\Temp/ccjonuJz.s:7 *ABS*:00000001 __zero_reg__
-C:\DOCUME~1\Giovanni\IMPOST~1\Temp/ccjonuJz.s:20 .text:00000000 port_halt
-C:\DOCUME~1\Giovanni\IMPOST~1\Temp/ccjonuJz.s:39 .text:00000000 L0
-C:\DOCUME~1\Giovanni\IMPOST~1\Temp/ccjonuJz.s:265 .debug_line:00000000 L0
-C:\DOCUME~1\Giovanni\IMPOST~1\Temp/ccjonuJz.s:265 .debug_line:0000001d L0
-C:\DOCUME~1\Giovanni\IMPOST~1\Temp/ccjonuJz.s:265 .debug_line:0000001d L0
-
-UNDEFINED SYMBOLS
-__do_copy_data
-__do_clear_bss
+C:\DOCUME~1\Giovanni\IMPOST~1\Temp/cc8HqpiL.s:15 .text.port_halt:00000000 port_halt
+C:\DOCUME~1\Giovanni\IMPOST~1\Temp/cc8HqpiL.s:24 .text.port_halt:00000000 $a
+C:\DOCUME~1\Giovanni\IMPOST~1\Temp/cc8HqpiL.s:36 .debug_frame:00000000 $d
+C:\DOCUME~1\Giovanni\IMPOST~1\Temp/cc8HqpiL.s:60 .debug_info:00000000 $d
+
+NO UNDEFINED SYMBOLS
diff --git a/os/ports/GCC/ARM7/crt0.lst b/os/ports/GCC/ARM7/crt0.lst
index eed22b391..5fa605d14 100644
--- a/os/ports/GCC/ARM7/crt0.lst
+++ b/os/ports/GCC/ARM7/crt0.lst
@@ -1,218 +1,233 @@
-GAS LISTING /cygdrive/c/DOCUME~1/Giovanni/IMPOST~1/Temp/ccgRWKd6.s page 1
-
-
- 1 # 1 "../../os/ports/GCC/ARM7/crt0.s"
- 2 # 1 "<built-in>"
- 1 /*
- 0
- 0
- 2 ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
- 3
- 4 This file is part of ChibiOS/RT.
- 5
- 6 ChibiOS/RT is free software; you can redistribute it and/or modify
- 7 it under the terms of the GNU General Public License as published by
- 8 the Free Software Foundation; either version 3 of the License, or
- 9 (at your option) any later version.
- 10
- 11 ChibiOS/RT is distributed in the hope that it will be useful,
- 12 but WITHOUT ANY WARRANTY; without even the implied warranty of
- 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- 14 GNU General Public License for more details.
- 15
- 16 You should have received a copy of the GNU General Public License
- 17 along with this program. If not, see <http://www.gnu.org/licenses/>.
- 18 */
- 19
- 20 /**
- 21 * @file ports/ARM7/crt0.s
- 22 * @brief Generic ARM7 startup file for ChibiOS/RT.
- 23 * @addtogroup ARM7_CORE
- 24 * @{
- 25 */
- 26 /** @cond never */
- 27
- 28 .set MODE_USR, 0x10
- 29 .set MODE_FIQ, 0x11
- 30 .set MODE_IRQ, 0x12
- 31 .set MODE_SVC, 0x13
- 32 .set MODE_ABT, 0x17
- 33 .set MODE_UND, 0x1B
- 34 .set MODE_SYS, 0x1F
- 35
- 36 .equ I_BIT, 0x80
- 37 .equ F_BIT, 0x40
- 38
- 39 .text
- 40 .code 32
- 41 .balign 4
- 42
- 43 /*
- 44 * Reset handler.
- 45 */
- 46 .global ResetHandler
- 47 ResetHandler:
- 48 /*
- 49 * Stack pointers initialization.
- 50 */
- 51 ldr r0, =__ram_end__
- 52 /* Undefined */
- 53 msr CPSR_c, #MODE_UND | I_BIT | F_BIT
- GAS LISTING /cygdrive/c/DOCUME~1/Giovanni/IMPOST~1/Temp/ccgRWKd6.s page 2
-
-
- 54 ???? 1040 0000 mov sp, r0
- 55 ldr r1, =__und_stack_size__
- 56 ???? 0080 sub r0, r0, r1
- 57 /* Abort */
- 58 msr CPSR_c, #MODE_ABT | I_BIT | F_BIT
- 59 ???? 1040 0000 mov sp, r0
- 60 ldr r1, =__abt_stack_size__
- 61 ???? 0080 sub r0, r0, r1
- 62 /* FIQ */
- 63 msr CPSR_c, #MODE_FIQ | I_BIT | F_BIT
- 64 ???? 1040 0000 mov sp, r0
- 65 ldr r1, =__fiq_stack_size__
- 66 ???? 0080 sub r0, r0, r1
- 67 /* IRQ */
- 68 msr CPSR_c, #MODE_IRQ | I_BIT | F_BIT
- 69 ???? 1040 0000 mov sp, r0
- 70 ldr r1, =__irq_stack_size__
- 71 ???? 0080 sub r0, r0, r1
- 72 /* Supervisor */
- 73 msr CPSR_c, #MODE_SVC | I_BIT | F_BIT
- 74 ???? 1040 0000 mov sp, r0
- 75 ldr r1, =__svc_stack_size__
- 76 ???? 0080 sub r0, r0, r1
- 77 /* System */
- 78 msr CPSR_c, #MODE_SYS | I_BIT | F_BIT
- 79 ???? 1040 0000 mov sp, r0
- 80 // ldr r1, =__sys_stack_size__
- 81 // sub r0, r0, r1
- 82 /*
- 83 * Early initialization.
- 84 */
- 85 #ifndef THUMB_NO_INTERWORKING
- 86 bl hwinit0
- 87 #else
- 88 add r0, pc, #1
- 89 bx r0
- 90 .code 16
- 91 bl hwinit0
- 92 mov r0, pc
- 93 bx r0
- 94 .code 32
- 95 #endif
- 96 /*
- 97 * Data initialization.
- 98 * NOTE: It assumes that the DATA size is a multiple of 4.
- 99 */
- 100 ldr r1, =_textdata
- 101 ldr r2, =_data
- 102 ldr r3, =_edata
- 103 dataloop:
- 104 ???? 0392 cmp r2, r3
- 105 ldrlo r0, [r1], #4
- 106 strlo r0, [r2], #4
- 107 blo dataloop
- 108 /*
- 109 * BSS initialization.
- 110 * NOTE: It assumes that the BSS size is a multiple of 4.
- GAS LISTING /cygdrive/c/DOCUME~1/Giovanni/IMPOST~1/Temp/ccgRWKd6.s page 3
-
-
- 111 */
- 112 ???? 0340 mov r0, #0
- 113 ldr r1, =_bss_start
- 114 ldr r2, =_bss_end
- 115 bssloop:
- 116 ???? 0291 cmp r1, r2
- 117 strlo r0, [r1], #4
- 118 blo bssloop
- 119 /*
- 120 * Late initialization.
- 121 */
- 122 #ifdef THUMB_NO_INTERWORKING
- 123 add r0, pc, #1
- 124 bx r0
- 125 .code 16
- 126 bl hwinit1
- 127 mov r0, #0
- 128 mov r1, r0
- 129 bl main
- 130 ldr r1, =MainExitHandler
- 131 bx r1
- 132 .code 32
- 133 #else
- 134 bl hwinit1
- 135 ???? 0340 mov r0, #0
- 136 ???? 0041 mov r1, r0
- 137 bl main
- 138 b MainExitHandler
- 139 #endif
- 140
- 141 /*
- 142 * Default main function exit handler.
- 143 */
- 144 .weak MainExitHandler
- 145 .globl MainExitHandler
- 146 MainExitHandler:
- 147
- 148 .loop: b .loop
- 149
- 150 /*
- 151 * Default early initialization code. It is declared weak in order to be
- 152 * replaced by the real initialization code.
- 153 * Early initialization is performed just after reset before BSS and DATA
- 154 * segments initialization.
- 155 */
- 156 #ifdef THUMB_NO_INTERWORKING
- 157 .thumb_func
- 158 .code 16
- 159 #endif
- 160 .weak hwinit0
- 161 hwinit0:
- 162 bx lr
- 163 .code 32
- 164
- 165 /*
- 166 * Default late initialization code. It is declared weak in order to be
- 167 * replaced by the real initialization code.
- GAS LISTING /cygdrive/c/DOCUME~1/Giovanni/IMPOST~1/Temp/ccgRWKd6.s page 4
-
-
- 168 * Late initialization is performed after BSS and DATA segments initialization
- 169 * and before invoking the main() function.
- 170 */
- 171 #ifdef THUMB_NO_INTERWORKING
- 172 .thumb_func
- 173 .code 16
- 174 #endif
- 175 .weak hwinit1
- 176 hwinit1:
- 177 bx lr
- 178 .code 32
- GAS LISTING /cygdrive/c/DOCUME~1/Giovanni/IMPOST~1/Temp/ccgRWKd6.s page 5
-
-
-DEFINED SYMBOLS
- *ABS*:00000000 ../../os/ports/GCC/ARM7/crt0.s
-../../os/ports/GCC/ARM7/crt0.s:28 *ABS*:00000010 MODE_USR
-../../os/ports/GCC/ARM7/crt0.s:29 *ABS*:00000011 MODE_FIQ
-../../os/ports/GCC/ARM7/crt0.s:30 *ABS*:00000012 MODE_IRQ
-../../os/ports/GCC/ARM7/crt0.s:31 *ABS*:00000013 MODE_SVC
-../../os/ports/GCC/ARM7/crt0.s:32 *ABS*:00000017 MODE_ABT
-../../os/ports/GCC/ARM7/crt0.s:33 *ABS*:0000001b MODE_UND
-../../os/ports/GCC/ARM7/crt0.s:34 *ABS*:0000001f MODE_SYS
-../../os/ports/GCC/ARM7/crt0.s:36 *ABS*:00000080 I_BIT
-../../os/ports/GCC/ARM7/crt0.s:37 *ABS*:00000040 F_BIT
-../../os/ports/GCC/ARM7/crt0.s:47 .text:00000000 ResetHandler
-../../os/ports/GCC/ARM7/crt0.s:103 .text:00000000 dataloop
-../../os/ports/GCC/ARM7/crt0.s:115 .text:00000000 bssloop
-../../os/ports/GCC/ARM7/crt0.s:146 .text:00000000 MainExitHandler
-../../os/ports/GCC/ARM7/crt0.s:148 .text:00000000 .loop
-../../os/ports/GCC/ARM7/crt0.s:161 .text:00000000 hwinit0
-../../os/ports/GCC/ARM7/crt0.s:176 .text:00000000 hwinit1
-
-UNDEFINED SYMBOLS
-sp
+ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp/ccUcFP6A.s page 1
+
+
+ 1 # 1 "../../os/ports/GCC/ARM7/crt0.s"
+ 1 /*
+ 0
+ 0
+ 2 ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
+ 3
+ 4 This file is part of ChibiOS/RT.
+ 5
+ 6 ChibiOS/RT is free software; you can redistribute it and/or modify
+ 7 it under the terms of the GNU General Public License as published by
+ 8 the Free Software Foundation; either version 3 of the License, or
+ 9 (at your option) any later version.
+ 10
+ 11 ChibiOS/RT is distributed in the hope that it will be useful,
+ 12 but WITHOUT ANY WARRANTY; without even the implied warranty of
+ 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ 14 GNU General Public License for more details.
+ 15
+ 16 You should have received a copy of the GNU General Public License
+ 17 along with this program. If not, see <http://www.gnu.org/licenses/>.
+ 18 */
+ 19
+ 20 /**
+ 21 * @file ARM7/crt0.s
+ 22 * @brief Generic ARM7 startup file for ChibiOS/RT.
+ 23 * @addtogroup ARM7_CORE
+ 24 * @{
+ 25 */
+ 26 /** @cond never */
+ 27
+ 28 .set MODE_USR, 0x10
+ 29 .set MODE_FIQ, 0x11
+ 30 .set MODE_IRQ, 0x12
+ 31 .set MODE_SVC, 0x13
+ 32 .set MODE_ABT, 0x17
+ 33 .set MODE_UND, 0x1B
+ 34 .set MODE_SYS, 0x1F
+ 35
+ 36 .equ I_BIT, 0x80
+ 37 .equ F_BIT, 0x40
+ 38
+ 39 .text
+ 40 .code 32
+ 41 .balign 4
+ 42
+ 43 /*
+ 44 * Reset handler.
+ 45 */
+ 46 .global ResetHandler
+ 47 ResetHandler:
+ 48 /*
+ 49 * Stack pointers initialization.
+ 50 */
+ 51 0000 AC009FE5 ldr r0, =__ram_end__
+ 52 /* Undefined */
+ 53 0004 DBF021E3 msr CPSR_c, #MODE_UND | I_BIT | F_BIT
+ 54 0008 00D0A0E1 mov sp, r0
+ ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp/ccUcFP6A.s page 2
+
+
+ 55 000c A4109FE5 ldr r1, =__und_stack_size__
+ 56 0010 010040E0 sub r0, r0, r1
+ 57 /* Abort */
+ 58 0014 D7F021E3 msr CPSR_c, #MODE_ABT | I_BIT | F_BIT
+ 59 0018 00D0A0E1 mov sp, r0
+ 60 001c 98109FE5 ldr r1, =__abt_stack_size__
+ 61 0020 010040E0 sub r0, r0, r1
+ 62 /* FIQ */
+ 63 0024 D1F021E3 msr CPSR_c, #MODE_FIQ | I_BIT | F_BIT
+ 64 0028 00D0A0E1 mov sp, r0
+ 65 002c 8C109FE5 ldr r1, =__fiq_stack_size__
+ 66 0030 010040E0 sub r0, r0, r1
+ 67 /* IRQ */
+ 68 0034 D2F021E3 msr CPSR_c, #MODE_IRQ | I_BIT | F_BIT
+ 69 0038 00D0A0E1 mov sp, r0
+ 70 003c 80109FE5 ldr r1, =__irq_stack_size__
+ 71 0040 010040E0 sub r0, r0, r1
+ 72 /* Supervisor */
+ 73 0044 D3F021E3 msr CPSR_c, #MODE_SVC | I_BIT | F_BIT
+ 74 0048 00D0A0E1 mov sp, r0
+ 75 004c 74109FE5 ldr r1, =__svc_stack_size__
+ 76 0050 010040E0 sub r0, r0, r1
+ 77 /* System */
+ 78 0054 DFF021E3 msr CPSR_c, #MODE_SYS | I_BIT | F_BIT
+ 79 0058 00D0A0E1 mov sp, r0
+ 80 // ldr r1, =__sys_stack_size__
+ 81 // sub r0, r0, r1
+ 82 /*
+ 83 * Early initialization.
+ 84 */
+ 85 #ifndef THUMB_NO_INTERWORKING
+ 86 005c FEFFFFEB bl hwinit0
+ 87 #else
+ 88 add r0, pc, #1
+ 89 bx r0
+ 90 .code 16
+ 91 bl hwinit0
+ 92 mov r0, pc
+ 93 bx r0
+ 94 .code 32
+ 95 #endif
+ 96 /*
+ 97 * Data initialization.
+ 98 * NOTE: It assumes that the DATA size is a multiple of 4.
+ 99 */
+ 100 0060 64109FE5 ldr r1, =_textdata
+ 101 0064 64209FE5 ldr r2, =_data
+ 102 0068 64309FE5 ldr r3, =_edata
+ 103 dataloop:
+ 104 006c 030052E1 cmp r2, r3
+ 105 0070 04009134 ldrlo r0, [r1], #4
+ 106 0074 04008234 strlo r0, [r2], #4
+ 107 0078 FBFFFF3A blo dataloop
+ 108 /*
+ 109 * BSS initialization.
+ 110 * NOTE: It assumes that the BSS size is a multiple of 4.
+ 111 */
+ ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp/ccUcFP6A.s page 3
+
+
+ 112 007c 0000A0E3 mov r0, #0
+ 113 0080 50109FE5 ldr r1, =_bss_start
+ 114 0084 50209FE5 ldr r2, =_bss_end
+ 115 bssloop:
+ 116 0088 020051E1 cmp r1, r2
+ 117 008c 04008134 strlo r0, [r1], #4
+ 118 0090 FCFFFF3A blo bssloop
+ 119 /*
+ 120 * Late initialization.
+ 121 */
+ 122 #ifdef THUMB_NO_INTERWORKING
+ 123 add r0, pc, #1
+ 124 bx r0
+ 125 .code 16
+ 126 bl hwinit1
+ 127 mov r0, #0
+ 128 mov r1, r0
+ 129 bl main
+ 130 ldr r1, =MainExitHandler
+ 131 bx r1
+ 132 .code 32
+ 133 #else
+ 134 0094 FEFFFFEB bl hwinit1
+ 135 0098 0000A0E3 mov r0, #0
+ 136 009c 0010A0E1 mov r1, r0
+ 137 00a0 FEFFFFEB bl main
+ 138 00a4 FEFFFFEA b MainExitHandler
+ 139 #endif
+ 140
+ 141 /*
+ 142 * Default main function exit handler.
+ 143 */
+ 144 .weak MainExitHandler
+ 145 .globl MainExitHandler
+ 146 MainExitHandler:
+ 147
+ 148 00a8 FEFFFFEA .loop: b .loop
+ 149
+ 150 /*
+ 151 * Default early initialization code. It is declared weak in order to be
+ 152 * replaced by the real initialization code.
+ 153 * Early initialization is performed just after reset before BSS and DATA
+ 154 * segments initialization.
+ 155 */
+ 156 #ifdef THUMB_NO_INTERWORKING
+ 157 .thumb_func
+ 158 .code 16
+ 159 #endif
+ 160 .weak hwinit0
+ 161 hwinit0:
+ 162 00ac 1EFF2FE1 bx lr
+ 163 .code 32
+ 164
+ 165 /*
+ 166 * Default late initialization code. It is declared weak in order to be
+ 167 * replaced by the real initialization code.
+ 168 * Late initialization is performed after BSS and DATA segments initialization
+ ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp/ccUcFP6A.s page 4
+
+
+ 169 * and before invoking the main() function.
+ 170 */
+ 171 #ifdef THUMB_NO_INTERWORKING
+ 172 .thumb_func
+ 173 .code 16
+ 174 #endif
+ 175 .weak hwinit1
+ 176 hwinit1:
+ 177 00b0 1EFF2FE1 bx lr
+ 178 00b4 00000000 .code 32
+ 178 00000000
+ 178 00000000
+ 178 00000000
+ 178 00000000
+ ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp/ccUcFP6A.s page 5
+
+
+DEFINED SYMBOLS
+../../os/ports/GCC/ARM7/crt0.s:28 *ABS*:00000010 MODE_USR
+../../os/ports/GCC/ARM7/crt0.s:29 *ABS*:00000011 MODE_FIQ
+../../os/ports/GCC/ARM7/crt0.s:30 *ABS*:00000012 MODE_IRQ
+../../os/ports/GCC/ARM7/crt0.s:31 *ABS*:00000013 MODE_SVC
+../../os/ports/GCC/ARM7/crt0.s:32 *ABS*:00000017 MODE_ABT
+../../os/ports/GCC/ARM7/crt0.s:33 *ABS*:0000001b MODE_UND
+../../os/ports/GCC/ARM7/crt0.s:34 *ABS*:0000001f MODE_SYS
+../../os/ports/GCC/ARM7/crt0.s:36 *ABS*:00000080 I_BIT
+../../os/ports/GCC/ARM7/crt0.s:37 *ABS*:00000040 F_BIT
+../../os/ports/GCC/ARM7/crt0.s:40 .text:00000000 $a
+../../os/ports/GCC/ARM7/crt0.s:47 .text:00000000 ResetHandler
+../../os/ports/GCC/ARM7/crt0.s:161 .text:000000ac hwinit0
+../../os/ports/GCC/ARM7/crt0.s:103 .text:0000006c dataloop
+../../os/ports/GCC/ARM7/crt0.s:115 .text:00000088 bssloop
+../../os/ports/GCC/ARM7/crt0.s:176 .text:000000b0 hwinit1
+../../os/ports/GCC/ARM7/crt0.s:146 .text:000000a8 MainExitHandler
+../../os/ports/GCC/ARM7/crt0.s:148 .text:000000a8 .loop
+../../os/ports/GCC/ARM7/crt0.s:178 .text:000000b4 $d
+
+UNDEFINED SYMBOLS
+__ram_end__
+__und_stack_size__
+__abt_stack_size__
+__fiq_stack_size__
+__irq_stack_size__
+__svc_stack_size__
+_textdata
+_data
+_edata
+_bss_start
+_bss_end
+main
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-17 08:36:47 +0000