git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@6294 35acf78f-673a-0410-8e92-d51de3d6d3f4

1 files changed, 29 insertions, 5 deletions

diff --git a/os/rt/ports/ARMCMx/chcore.h b/os/rt/ports/ARMCMx/chcore.h
index de95d8c4d..91231505f 100644
--- a/os/rt/ports/ARMCMx/chcore.h
+++ b/os/rt/ports/ARMCMx/chcore.h
@@ -110,18 +110,32 @@
    asm module.*/

 #if !defined(_FROM_ASM_)

 

-/* The following declarations are there just for Doxygen documentation, the

-   real declarations are inside the sub-headers being specific for the

-   sub-architectures.*/

-#if defined(__DOXYGEN__)

 /**

- * @brief   Stack and memory alignment enforcement.

+ * @brief   Type of system time.

+ */

+#if (CH_CFG_ST_RESOLUTION == 32) || defined(__DOXYGEN__)

+typedef uint32_t systime_t;

+#else

+typedef uint16_t systime_t;

+#endif

+

+/**

+ * @brief   Type of a generic ARM register.

+ */

+typedef void *regarm_t;

+

+/**

+ * @brief   Type of stack and memory alignment enforcement.

  * @note    In this architecture the stack alignment is enforced to 64 bits,

  *          32 bits alignment is supported by hardware but deprecated by ARM,

  *          the implementation choice is to not offer the option.

  */

 typedef uint64_t stkalign_t;

 

+/* The following declarations are there just for Doxygen documentation, the

+   real declarations are inside the sub-headers being specific for the

+   sub-architectures.*/

+#if defined(__DOXYGEN__)

 /**

  * @brief   Interrupt saved context.

  * @details This structure represents the stack frame saved during a

@@ -138,6 +152,16 @@ struct port_extctx {};
 struct port_intctx {};

 #endif /* defined(__DOXYGEN__) */

 

+/**

+ * @brief   Platform dependent part of the @p thread_t structure.

+ * @details In this port the structure just holds a pointer to the

+ *          @p port_intctx structure representing the stack pointer

+ *          at context switch time.

+ */

+struct context {

+  struct port_intctx *r13;

+};

+

 #endif /* !defined(_FROM_ASM_) */

 

 /*===========================================================================*/