diff options
| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-08-31 18:17:11 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-08-31 18:17:11 +0000 |
| commit | ebe5a8020025e7d8747c07e77789a1797a349c99 (patch) | |
| tree | 53e4071c98884b9d77576678596eb81354a8606a /os/ports | |
| parent | 7b11d85a8abe304bdc70a49994e7ce5698336c81 (diff) | |
| download | ChibiOS-ebe5a8020025e7d8747c07e77789a1797a349c99.tar.gz ChibiOS-ebe5a8020025e7d8747c07e77789a1797a349c99.tar.bz2 ChibiOS-ebe5a8020025e7d8747c07e77789a1797a349c99.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2151 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/ports')
| -rw-r--r-- | os/ports/GCC/ARMCMx/old/chcore_v7m.h | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/os/ports/GCC/ARMCMx/old/chcore_v7m.h b/os/ports/GCC/ARMCMx/old/chcore_v7m.h index 150fa41fa..9b92b851a 100644 --- a/os/ports/GCC/ARMCMx/old/chcore_v7m.h +++ b/os/ports/GCC/ARMCMx/old/chcore_v7m.h @@ -164,11 +164,11 @@ struct intctx { #if CH_OPTIMIZE_SPEED
#define port_lock() { \
register uint32_t tmp asm ("r3") = CORTEX_BASEPRI_KERNEL; \
- asm volatile ("msr BASEPRI, %0" : : "r" (tmp)); \
+ asm volatile ("msr BASEPRI, %0" : : "r" (tmp) : "memory"); \
}
#else
#define port_lock() { \
- asm volatile ("bl _port_lock" : : : "r3", "lr"); \
+ asm volatile ("bl _port_lock" : : : "r3", "lr", "memory"); \
}
#endif
@@ -181,11 +181,11 @@ struct intctx { #if CH_OPTIMIZE_SPEED
#define port_unlock() { \
register uint32_t tmp asm ("r3") = CORTEX_BASEPRI_DISABLED; \
- asm volatile ("msr BASEPRI, %0" : : "r" (tmp)); \
+ asm volatile ("msr BASEPRI, %0" : : "r" (tmp) : "memory"); \
}
#else
#define port_unlock() { \
- asm volatile ("bl _port_unlock" : : : "r3", "lr"); \
+ asm volatile ("bl _port_unlock" : : : "r3", "lr", "memory"); \
}
#endif
@@ -213,7 +213,7 @@ struct intctx { * @note In this port it disables all the interrupt sources by raising
* the priority mask to level 0.
*/
-#define port_disable() asm volatile ("cpsid i")
+#define port_disable() asm volatile ("cpsid i" : : : "memory")
/**
* @brief Disables the interrupt sources below kernel-level priority.
@@ -223,7 +223,7 @@ struct intctx { #define port_suspend() { \
register uint32_t tmp asm ("r3") = CORTEX_BASEPRI_KERNEL; \
asm volatile ("msr BASEPRI, %0 \n\t" \
- "cpsie i" : : "r" (tmp)); \
+ "cpsie i" : : "r" (tmp) : "memory"); \
}
/**
@@ -233,7 +233,7 @@ struct intctx { #define port_enable() { \
register uint32_t tmp asm ("r3") = CORTEX_BASEPRI_DISABLED; \
asm volatile ("msr BASEPRI, %0 \n\t" \
- "cpsie i" : : "r" (tmp)); \
+ "cpsie i" : : "r" (tmp) : "memory"); \
}
/**
@@ -246,7 +246,7 @@ struct intctx { */
#if CORTEX_ENABLE_WFI_IDLE || defined(__DOXYGEN__)
#define port_wait_for_interrupt() { \
- asm volatile ("wfi"); \
+ asm volatile ("wfi" : : : "memory"); \
}
#else
#define port_wait_for_interrupt()
|