diff options
| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-08-05 14:08:52 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-08-05 14:08:52 +0000 |
| commit | 56c848ffd63d30d9bd0debcef7f1663e0bfa46c4 (patch) | |
| tree | 31e776eca6af39b069a9716a911840e6a21706de /os/ports | |
| parent | 1d3b6b4198265ebd42a89f5d300c00c83ea4d179 (diff) | |
| download | ChibiOS-56c848ffd63d30d9bd0debcef7f1663e0bfa46c4.tar.gz ChibiOS-56c848ffd63d30d9bd0debcef7f1663e0bfa46c4.tar.bz2 ChibiOS-56c848ffd63d30d9bd0debcef7f1663e0bfa46c4.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@6081 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/ports')
| -rw-r--r-- | os/ports/GCC/ARMCMx/STM32F3xx/chtimer.h | 52 |
1 files changed, 20 insertions, 32 deletions
diff --git a/os/ports/GCC/ARMCMx/STM32F3xx/chtimer.h b/os/ports/GCC/ARMCMx/STM32F3xx/chtimer.h index 060925edf..4f42a1fb3 100644 --- a/os/ports/GCC/ARMCMx/STM32F3xx/chtimer.h +++ b/os/ports/GCC/ARMCMx/STM32F3xx/chtimer.h @@ -45,46 +45,34 @@ /*===========================================================================*/
typedef struct {
- volatile uint16_t CR1;
- uint16_t _resvd0;
- volatile uint16_t CR2;
- uint16_t _resvd1;
- volatile uint16_t SMCR;
- uint16_t _resvd2;
- volatile uint16_t DIER;
- uint16_t _resvd3;
- volatile uint16_t SR;
- uint16_t _resvd4;
- volatile uint16_t EGR;
- uint16_t _resvd5;
- volatile uint16_t CCMR1;
- uint16_t _resvd6;
- volatile uint16_t CCMR2;
- uint16_t _resvd7;
- volatile uint16_t CCER;
- uint16_t _resvd8;
+ volatile uint32_t CR1;
+ volatile uint32_t CR2;
+ volatile uint32_t SMCR;
+ volatile uint32_t DIER;
+ volatile uint32_t SR;
+ volatile uint32_t EGR;
+ volatile uint32_t CCMR1;
+ volatile uint32_t CCMR2;
+ volatile uint32_t CCER;
volatile uint32_t CNT;
- volatile uint16_t PSC;
- uint16_t _resvd9;
+ volatile uint32_t PSC;
volatile uint32_t ARR;
- volatile uint16_t RCR;
- uint16_t _resvd10;
+ volatile uint32_t RCR;
volatile uint32_t CCR[4];
- volatile uint16_t BDTR;
- uint16_t _resvd11;
- volatile uint16_t DCR;
- uint16_t _resvd12;
- volatile uint16_t DMAR;
- uint16_t _resvd13;
- volatile uint16_t OR;
- uint16_t _resvd14;
-} stm32f0_tim_t;
+ volatile uint32_t BDTR;
+ volatile uint32_t DCR;
+ volatile uint32_t DMAR;
+ volatile uint32_t OR;
+ volatile uint32_t CCMR3;
+ volatile uint32_t CCR5;
+ volatile uint32_t CCR6;
+} local_stm32_tim_t;
/*===========================================================================*/
/* Module macros. */
/*===========================================================================*/
-#define STM32F3_TIM2 ((stm32f0_tim_t *)0x40000000)
+#define STM32F3_TIM2 ((local_stm32_tim_t *)0x40000000)
/*===========================================================================*/
/* External declarations. */
|