IAR STM8 port.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4363 35acf78f-673a-0410-8e92-d51de3d6d3f4

5 files changed, 629 insertions, 0 deletions

diff --git a/os/ports/IAR/STM8/chcore.c b/os/ports/IAR/STM8/chcore.c
new file mode 100644
index 000000000..6f7d32b30
--- /dev/null
+++ b/os/ports/IAR/STM8/chcore.c
@@ -0,0 +1,55 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,

+                 2011,2012 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+/**

+ * @file    cosmic/STM8/chcore.c

+ * @brief   STM8 (Cosmic) architecture port code.

+ *

+ * @addtogroup STM8_COSMIC_CORE

+ * @{

+ */

+

+#include "ch.h"

+

+__tiny ReadyList rlist;

+

+/**

+ * @brief   Thread start code.

+ */

+__task void _port_thread_start(void) {

+  chSysUnlock();

+  asm("popw x");

+}

+

+/**

+ * @brief   Halts the system.

+ * @details This function is invoked by the operating system when an

+ *          unrecoverable error is detected (for example because a programming

+ *          error in the application code that triggers an assertion while in

+ *          debug mode).

+ */

+void port_halt(void) {

+

+  port_disable();

+  while (TRUE) {

+  }

+}

+

+/** @} */

diff --git a/os/ports/IAR/STM8/chcore.h b/os/ports/IAR/STM8/chcore.h
new file mode 100644
index 000000000..72bfd4b11
--- /dev/null
+++ b/os/ports/IAR/STM8/chcore.h
@@ -0,0 +1,339 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,

+                 2011,2012 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+/**

+ * @file    cosmic/STM8/chcore.h

+ * @brief   STM8 (Cosmic) architecture port macros and structures.

+ *

+ * @addtogroup STM8_COSMIC_CORE

+ * @{

+ */

+

+#ifndef _CHCORE_H_

+#define _CHCORE_H_

+

+#if CH_DBG_ENABLE_STACK_CHECK

+#error "option CH_DBG_ENABLE_STACK_CHECK not supported by this port"

+#endif

+

+/*===========================================================================*/

+/* Port configurable parameters.                                             */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables the use of the WFI instruction in the idle thread loop.

+ */

+#ifndef STM8_ENABLE_WFI_IDLE

+#define STM8_ENABLE_WFI_IDLE            FALSE

+#endif

+

+/*===========================================================================*/

+/* Port exported info.                                                       */

+/*===========================================================================*/

+

+/**

+ * @brief   Unique macro for the implemented architecture.

+ */

+#define CH_ARCHITECTURE_STM8

+

+/**

+ * @brief   Name of the implemented architecture.

+ */

+#define CH_ARCHITECTURE_NAME            "STM8"

+

+/**

+ * @brief   Name of the compiler supported by this port.

+ */

+#define CH_COMPILER_NAME                "IAR"

+

+/**

+ * @brief   Port-specific information string.

+ */

+#define CH_PORT_INFO                    "None"

+

+/*===========================================================================*/

+/* Port implementation part.                                                 */

+/*===========================================================================*/

+

+/**

+ * @brief   Base type for stack alignment.

+ * @note    No alignment constraints so uint8_t.

+ */

+typedef uint8_t stkalign_t;

+

+/**

+ * @brief   Generic STM8 function pointer.

+ * @note    It is used to allocate the proper size for return addresses in

+ *          context-related structures.

+ */

+typedef void (*stm8func_t)(void);

+

+/**

+ * @brief   Interrupt saved context.

+ * @details This structure represents the stack frame saved during a

+ *          preemption-capable interrupt handler.

+ * @note    The structure requires one dummy field at its start because the

+ *          stack is handled as preincremented/postdecremented.

+ */

+struct extctx {

+  uint8_t       _next;

+  uint16_t      w3;

+  uint16_t      w2;

+  uint16_t      w1;

+  uint16_t      w0;

+  uint8_t       cc;

+  uint8_t       a;

+  uint16_t      x;

+  uint16_t      y;

+  uint8_t       pce;

+  uint8_t       pch;

+  uint8_t       pcl;

+};

+

+/**

+ * @brief   System saved context.

+ * @details This structure represents the inner stack frame during a context

+ *          switching..

+ * @note    The structure requires one dummy field at its start because the

+ *          stack is handled as preincremented/postdecremented.

+ */

+struct intctx {

+  uint8_t       _next;

+  uint16_t      w7;

+  uint16_t      w6;

+  uint16_t      w5;

+  uint16_t      w4;

+  stm8func_t    pc;             /* Function pointer sized return address.   */

+};

+

+/**

+ * @brief   Platform dependent part of the @p Thread structure.

+ * @details This structure usually contains just the saved stack pointer

+ *          defined as a pointer to a @p intctx structure.

+ */

+struct context {

+  struct intctx *sp;

+};

+

+/**

+ * @brief   Start context.

+ * @details This context is the stack organization for the trampoline code

+ *          @p _port_thread_start().

+ */

+struct stm8_startctx {

+  uint8_t       saved_vreg[8];  // saved virtual registers to restore

+  uint8_t       _next;

+  stm8func_t    ts;             /* Trampoline address.                      */

+  void          *arg;           /* Thread argument.                         */

+  stm8func_t    pc;             /* Thread function address.                 */

+  stm8func_t    ret;            /* chThdExit() address.                     */

+};

+

+/**

+ * @brief   Platform dependent part of the @p chThdCreateI() API.

+ * @details This code usually setup the context switching frame represented

+ *          by an @p intctx structure.

+ */

+#define SETUP_CONTEXT(workspace, wsize, pf, arg) {                          \

+  struct stm8_startctx *scp;                                                \

+  scp = (struct stm8_startctx *)((uint8_t *)workspace + wsize -             \

+                                 sizeof(struct stm8_startctx));             \

+  scp->ts   = (stm8func_t)_port_thread_start;                               \

+  scp->arg  = (void *)arg;                                                  \

+  scp->pc   = (stm8func_t)pf;                                               \

+  scp->ret  = (stm8func_t)chThdExit;                                        \

+  tp->p_ctx.sp = (struct intctx *)scp;                                      \

+}

+

+/**

+ * @brief   Stack size for the system idle thread.

+ * @details This size depends on the idle thread implementation, usually

+ *          the idle thread should take no more space than those reserved

+ *          by @p PORT_INT_REQUIRED_STACK.

+ */

+#ifndef PORT_IDLE_THREAD_STACK_SIZE

+#define PORT_IDLE_THREAD_STACK_SIZE     0

+#endif

+

+/**

+ * @brief   Per-thread stack overhead for interrupts servicing.

+ * @details This is a safe value, you may trim it down after reading the

+ *          right size in the map file.

+ */

+#ifndef PORT_INT_REQUIRED_STACK

+#define PORT_INT_REQUIRED_STACK         48

+#endif

+

+/**

+ * @brief   Enforces a correct alignment for a stack area size value.

+ */

+#define STACK_ALIGN(n) ((((n) - 1) | (sizeof(stkalign_t) - 1)) + 1)

+

+/**

+ * @brief   Computes the thread working area global size.

+ */

+#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) +                         \

+                                   (sizeof(struct intctx) - 1) +            \

+                                   (sizeof(struct extctx) - 1) +            \

+                                   (n) + (PORT_INT_REQUIRED_STACK))

+

+/**

+ * @brief   Static working area allocation.

+ * @details This macro is used to allocate a static thread working area

+ *          aligned as both position and size.

+ */

+#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)]

+

+/**

+ * @brief   IRQ prologue code.

+ * @details This macro must be inserted at the start of all IRQ handlers

+ *          enabled to invoke system APIs.

+ */

+#define PORT_IRQ_PROLOGUE()

+

+/**

+ * @brief   IRQ epilogue code.

+ * @details This macro must be inserted at the end of all IRQ handlers

+ *          enabled to invoke system APIs.

+ */

+#define PORT_IRQ_EPILOGUE() {                                               \

+  dbg_check_lock();                                                         \

+  if (chSchIsPreemptionRequired())                                          \

+    chSchDoReschedule();                                                    \

+  dbg_check_unlock();                                                       \

+}

+

+/**

+ * @brief   IRQ handler function declaration.

+ * @note    @p id can be a function name or a vector number depending on the

+ *          port implementation.

+ */

+#define PORT_IRQ_HANDLER(id)                                                \

+  _Pragma(VECTOR_ID((id)+2)) __interrupt void vector##id(void)

+

+/**

+ * @brief   Port-related initialization code.

+ * @note    None in this port.

+ */

+#define port_init()

+

+/**

+ * @brief   Kernel-lock action.

+ * @note    Implemented as global interrupts disable.

+ */

+#define port_lock() asm("sim")

+

+/**

+ * @brief   Kernel-unlock action.

+ * @note    Implemented as global interrupts enable.

+ */

+#define port_unlock() asm("rim")

+

+/**

+ * @brief   Kernel-lock action from an interrupt handler.

+ * @note    This function is empty in this port.

+ */

+#define port_lock_from_isr()

+

+/**

+ * @brief   Kernel-unlock action from an interrupt handler.

+ * @note    This function is empty in this port.

+ */

+#define port_unlock_from_isr()

+

+/**

+ * @brief   Disables all the interrupt sources.

+ * @note    Implemented as global interrupts disable.

+ * @note    Of course non-maskable interrupt sources are not included.

+ */

+#define port_disable() asm("sim")

+

+/**

+ * @brief   Disables the interrupt sources that are not supposed to preempt

+ *          the kernel.

+ * @note    Same as @p port_disable() in this port, there is no difference

+ *          between the two states.

+ */

+#define port_suspend() asm("sim")

+

+/**

+ * @brief   Enables all the interrupt sources.

+ * @note    Implemented as global interrupt enable.

+ */

+#define port_enable() asm("rim")

+

+/**

+ * @brief   Enters an architecture-dependent halt mode.

+ * @note    Implemented with the specific "wfi" instruction.

+ */

+#if STM8_ENABLE_WFI_IDLE || defined(__DOXYGEN__)

+#define port_wait_for_interrupt() asm("wfi")

+#else

+#define port_wait_for_interrupt()

+#endif

+

+/**

+ * @brief   Performs a context switch between two threads.

+ * @details This is the most critical code in any port, this function

+ *          is responsible for the context switch between 2 threads.

+ * @note    Implemented as a call to a low level assembler routine.

+ *

+ * @param ntp   the thread to be switched in

+ * @param otp   the thread to be switched out

+ */

+#define port_switch(ntp, otp) _port_switch(otp)

+

+#ifdef __cplusplus

+extern "C" {

+#endif

+  void _port_switch(Thread *otp);

+  __task void _port_thread_start(void);

+  void port_halt(void);

+#ifdef __cplusplus

+}

+#endif

+

+/*===========================================================================*/

+/* Scheduler captured code.                                                  */

+/*===========================================================================*/

+

+#define PORT_OPTIMIZED_RLIST_VAR

+#define PORT_OPTIMIZED_RLIST_EXT

+#define PORT_OPTIMIZED_READYLIST_STRUCT

+

+typedef struct {

+  ThreadsQueue          r_queue;

+  tprio_t               r_prio;

+  Thread                *r_current;

+#if CH_USE_REGISTRY

+  Thread                *r_newer;

+  Thread                *r_older;

+#endif

+  /* End of the fields shared with the Thread structure.*/

+#if CH_TIME_QUANTUM > 0

+  cnt_t                 r_preempt;

+#endif

+} ReadyList;

+

+extern __tiny ReadyList rlist;

+

+#endif /* _CHCORE_H_ */

+

+/** @} */

diff --git a/os/ports/IAR/STM8/chcore_stm8.s b/os/ports/IAR/STM8/chcore_stm8.s
new file mode 100644
index 000000000..0db99bea5
--- /dev/null
+++ b/os/ports/IAR/STM8/chcore_stm8.s
@@ -0,0 +1,57 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,

+                 2011,2012 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+; Get definitions for virtual registers used by the compiler

+#include "vregs.inc"

+

+	SECTION .near_func.text:code

+	EXTERN rlist

+

+/*

+ * Performs a context switch between two threads.

+ */

+        PUBLIC _port_switch

+_port_switch:

+	push    ?b8

+	push    ?b9

+	push    ?b10

+	push    ?b11

+	push    ?b12

+	push    ?b13

+	push    ?b14

+	push    ?b15

+

+	ldw     y,sp

+	ldw     (5,x),y

+	ldw     x, rlist + 5

+	ldw     x,(5,x)

+	ldw     sp,x

+

+	pop     ?b15

+	pop     ?b14

+	pop     ?b13

+	pop     ?b12

+	pop     ?b11

+	pop     ?b10

+	pop     ?b9

+	pop     ?b8

+	ret

+

+        END

diff --git a/os/ports/IAR/STM8/chtypes.h b/os/ports/IAR/STM8/chtypes.h
new file mode 100644
index 000000000..a7f2d423b
--- /dev/null
+++ b/os/ports/IAR/STM8/chtypes.h
@@ -0,0 +1,83 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,

+                 2011,2012 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+/**

+ * @file    IAR/STM8/chtypes.h

+ * @brief   STM8 (IAR) port system types.

+ *

+ * @addtogroup STM8_IAR_CORE

+ * @{

+ */

+

+#ifndef _CHTYPES_H_

+#define _CHTYPES_H_

+

+#define __need_NULL

+#define __need_size_t

+#include <stddef.h>

+

+#if !defined(_STDINT_H) && !defined(__STDINT_H_)

+#include <stdint.h>

+#endif

+

+typedef int8_t          bool_t;         /**< Fast boolean type.             */

+typedef uint8_t         tmode_t;        /**< Thread flags.                  */

+typedef uint8_t         tstate_t;       /**< Thread state.                  */

+typedef uint8_t         trefs_t;        /**< Thread references counter.     */

+typedef uint8_t         tslices_t;      /**< Thread time slices counter.    */

+typedef uint8_t         tprio_t;        /**< Thread priority.               */

+typedef int16_t         msg_t;          /**< Inter-thread message.          */

+typedef int8_t          eventid_t;      /**< Event Id.                      */

+typedef uint8_t         eventmask_t;    /**< Events mask.                   */

+typedef uint16_t        systime_t;      /**< System time.                   */

+typedef int8_t          cnt_t;          /**< Resources counter.             */

+

+/**

+ * @brief   Inline function modifier.

+ */

+#define INLINE inline

+

+/**

+ * @brief   ROM constant modifier.

+ * @note    Uses the "const" keyword in this port.

+ */

+#define ROMCONST const

+

+/**

+ * @brief   Packed structure modifier (within).

+ * @note    Empty in this port.

+ */

+#define PACK_STRUCT_STRUCT

+

+/**

+ * @brief   Packed structure modifier (before).

+ * @note    Empty in this port.

+ */

+#define PACK_STRUCT_BEGIN

+

+/**

+ * @brief   Packed structure modifier (after).

+ * @note    Empty in this port.

+ */

+#define PACK_STRUCT_END

+

+#endif /* _CHTYPES_H_ */

+

+/** @} */

diff --git a/os/ports/IAR/STM8/port.dox b/os/ports/IAR/STM8/port.dox
new file mode 100644
index 000000000..47fd9d7f4
--- /dev/null
+++ b/os/ports/IAR/STM8/port.dox
@@ -0,0 +1,95 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,

+                 2011,2012 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+/**

+ * @defgroup STM8_IAR STM8

+ * @details STM8 port for the Cosmic C compiler.

+ *

+ * @section STM8_IAR_INTRO Introduction

+ * This port supports all STM8 8 bits MCUs.

+ *

+ * @section STM8_IAR_STATES Mapping of the System States in the STM8 port

+ * The ChibiOS/RT logical @ref system_states are mapped as follow in the STM8

+ * port:

+ * - <b>Init</b>. This state is represented by the startup code and the

+ *   initialization code before @p chSysInit() is executed. It has not a

+ *   special hardware state associated.

+ * - <b>Normal</b>. This is the state the system has after executing

+ *   @p chSysInit(). Interrupts are enabled.

+ * - <b>Suspended</b>. Interrupts are disabled.

+ * - <b>Disabled</b>. Interrupts are disabled. This state is equivalent to the

+ *   Suspended state because there are no fast interrupts in this architecture.

+ * - <b>Sleep</b>. Implemented with "wait" instruction insertion in the idle

+ *   loop.

+ * - <b>S-Locked</b>. Interrupts are disabled.

+ * - <b>I-Locked</b>. This state is equivalent to the SRI state, the

+ *   @p chSysLockI() and @p chSysUnlockI() APIs do nothing (still use them in

+ *   order to formally change state because this may change).

+ * - <b>Serving Regular Interrupt</b>. Normal interrupt service code.

+ * - <b>Serving Fast Interrupt</b>. Not present in this architecture.

+ * - <b>Serving Non-Maskable Interrupt</b>. The STM8 ha non

+ *   maskable interrupt sources that can be associated to this state.

+ * - <b>Halted</b>. Implemented as an infinite loop with interrupts disabled.

+ * .

+ * @section STM8_IAR_NOTES The STM8 port notes

+ * - The STM8 does not have a dedicated interrupt stack, make sure to reserve

+ *     enough stack space for interrupts in each thread stack. This can be done

+ *     by modifying the @p INT_REQUIRED_STACK macro into

+ *     <b>./os/ports/cosmic/STM8/chcore.h</b>.

+ * - The kernel currently supports only the small memory model so the

+ *   kernel files should be loaded in the first 64K. Note that this is not

+ *   a problem because upper addresses can be used by the user code, the

+ *   kernel can context switch code running there.

+ * - The configuration option @p CH_OPTIMIZE_SPEED is not currently supported

+ *   because the missing support of the @p inline "C" keyword in the

+ *   compiler.

+ * .

+ * @ingroup cosmic

+ */

+

+/**

+ * @defgroup STM8_IAR_CONF Configuration Options

+ * @details STM8 Configuration Options. The STM8 port allows some

+ * architecture-specific configurations settings that can be overridden

+ * by redefining them in @p chconf.h. Usually there is no need to change

+ * the default values.

+ * - @p INT_REQUIRED_STACK, this value represent the amount of stack space

+ *   used by the interrupt handlers.<br>

+ *   The default for this value is @p 48, this space is allocated for each

+ *   thread so be careful in order to not waste precious RAM space.

+ * .

+ * @ingroup STM8_IAR

+ */

+

+/**

+ * @defgroup STM8_IAR_CORE Core Port Implementation

+ * @details STM8 specific port code, structures and macros.

+ *

+ * @ingroup STM8_IAR

+ */

+

+ /**

+ * @defgroup STM8_IAR_STARTUP Startup Support

+ * @details ChibiOS/RT doed not provide startup files for the STM8, there

+ * are no special startup requirement so the normal toolchain-provided

+ * startup files can be used.

+ *

+ * @ingroup STM8_IAR

+ */