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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-11-13 11:14:10 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-11-13 11:14:10 +0000 |
| commit | e1f35463ed863f65de82314d0ac06118d095fa7e (patch) | |
| tree | 7f19b896222bb3afe3e3b8c6ca1d6c7e5b49954a /os/ports/IAR/ARMCMx | |
| parent | ec1bf1b741390d7b6128382971b504a3ee9b7111 (diff) | |
| download | ChibiOS-e1f35463ed863f65de82314d0ac06118d095fa7e.tar.gz ChibiOS-e1f35463ed863f65de82314d0ac06118d095fa7e.tar.bz2 ChibiOS-e1f35463ed863f65de82314d0ac06118d095fa7e.zip | |
Cortex-M4 officially supported.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3491 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/ports/IAR/ARMCMx')
| -rw-r--r-- | os/ports/IAR/ARMCMx/LPC11xx/cmparams.h | 5 | ||||
| -rw-r--r-- | os/ports/IAR/ARMCMx/LPC13xx/cmparams.h | 5 | ||||
| -rw-r--r-- | os/ports/IAR/ARMCMx/STM32F1xx/cmparams.h | 5 | ||||
| -rw-r--r-- | os/ports/IAR/ARMCMx/STM32F4xx/cmparams.h | 5 | ||||
| -rw-r--r-- | os/ports/IAR/ARMCMx/STM32L1xx/cmparams.h | 5 | ||||
| -rw-r--r-- | os/ports/IAR/ARMCMx/chcore.h | 7 |
6 files changed, 29 insertions, 3 deletions
diff --git a/os/ports/IAR/ARMCMx/LPC11xx/cmparams.h b/os/ports/IAR/ARMCMx/LPC11xx/cmparams.h index 2b66fbf4a..284d6cecf 100644 --- a/os/ports/IAR/ARMCMx/LPC11xx/cmparams.h +++ b/os/ports/IAR/ARMCMx/LPC11xx/cmparams.h @@ -48,6 +48,11 @@ #define CORTEX_HAS_MPU FALSE
/**
+ * @brief Floating Point unit presence.
+ */
+#define CORTEX_HAS_FPU FALSE
+
+/**
* @brief Number of bits in priority masks.
*/
#define CORTEX_PRIORITY_BITS 2
diff --git a/os/ports/IAR/ARMCMx/LPC13xx/cmparams.h b/os/ports/IAR/ARMCMx/LPC13xx/cmparams.h index 1e970e72a..439768f84 100644 --- a/os/ports/IAR/ARMCMx/LPC13xx/cmparams.h +++ b/os/ports/IAR/ARMCMx/LPC13xx/cmparams.h @@ -48,6 +48,11 @@ #define CORTEX_HAS_MPU FALSE
/**
+ * @brief Floating Point unit presence.
+ */
+#define CORTEX_HAS_FPU FALSE
+
+/**
* @brief Number of bits in priority masks.
*/
#define CORTEX_PRIORITY_BITS 3
diff --git a/os/ports/IAR/ARMCMx/STM32F1xx/cmparams.h b/os/ports/IAR/ARMCMx/STM32F1xx/cmparams.h index 8f9795822..74a7fe232 100644 --- a/os/ports/IAR/ARMCMx/STM32F1xx/cmparams.h +++ b/os/ports/IAR/ARMCMx/STM32F1xx/cmparams.h @@ -48,6 +48,11 @@ #define CORTEX_HAS_MPU FALSE
/**
+ * @brief Floating Point unit presence.
+ */
+#define CORTEX_HAS_FPU FALSE
+
+/**
* @brief Number of bits in priority masks.
*/
#define CORTEX_PRIORITY_BITS 4
diff --git a/os/ports/IAR/ARMCMx/STM32F4xx/cmparams.h b/os/ports/IAR/ARMCMx/STM32F4xx/cmparams.h index 733c952d5..de175091d 100644 --- a/os/ports/IAR/ARMCMx/STM32F4xx/cmparams.h +++ b/os/ports/IAR/ARMCMx/STM32F4xx/cmparams.h @@ -48,6 +48,11 @@ #define CORTEX_HAS_MPU TRUE
/**
+ * @brief Floating Point unit presence.
+ */
+#define CORTEX_HAS_FPU TRUE
+
+/**
* @brief Number of bits in priority masks.
*/
#define CORTEX_PRIORITY_BITS 4
diff --git a/os/ports/IAR/ARMCMx/STM32L1xx/cmparams.h b/os/ports/IAR/ARMCMx/STM32L1xx/cmparams.h index e4012ef82..491417957 100644 --- a/os/ports/IAR/ARMCMx/STM32L1xx/cmparams.h +++ b/os/ports/IAR/ARMCMx/STM32L1xx/cmparams.h @@ -48,6 +48,11 @@ #define CORTEX_HAS_MPU TRUE
/**
+ * @brief Floating Point unit presence.
+ */
+#define CORTEX_HAS_FPU FALSE
+
+/**
* @brief Number of bits in priority masks.
*/
#define CORTEX_PRIORITY_BITS 4
diff --git a/os/ports/IAR/ARMCMx/chcore.h b/os/ports/IAR/ARMCMx/chcore.h index c3e91cc02..9572a48c8 100644 --- a/os/ports/IAR/ARMCMx/chcore.h +++ b/os/ports/IAR/ARMCMx/chcore.h @@ -50,9 +50,10 @@ #include "cmparams.h"
/* Cortex model check, only M0 and M3 supported right now.*/
-#if (CORTEX_MODEL == CORTEX_M0) || (CORTEX_MODEL == CORTEX_M3)
-#elif (CORTEX_MODEL == CORTEX_M1) || (CORTEX_MODEL == CORTEX_M4)
-#error "untested Cortex-M model, manually remove this check in chcore.h"
+#if (CORTEX_MODEL == CORTEX_M0) || (CORTEX_MODEL == CORTEX_M3) || \
+ (CORTEX_MODEL == CORTEX_M4)
+#elif (CORTEX_MODEL == CORTEX_M1)
+#error "untested Cortex-M model"
#else
#error "unknown or unsupported Cortex-M model"
#endif
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