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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-12-14 22:27:09 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-12-14 22:27:09 +0000 |
| commit | 975780704949e2ed551c3e50a81ea5e45d28a0af (patch) | |
| tree | 907eb0a846629c170293426df68162e34adab595 /os/ports/IAR/ARMCMx/cstartup.s | |
| parent | 1b12d62bd78a14c8cf4bf55e342aae5a2c7361f1 (diff) | |
| download | ChibiOS-975780704949e2ed551c3e50a81ea5e45d28a0af.tar.gz ChibiOS-975780704949e2ed551c3e50a81ea5e45d28a0af.tar.bz2 ChibiOS-975780704949e2ed551c3e50a81ea5e45d28a0af.zip | |
Added working prototype Cortex-Mx port for IAR compiler and related demo for STM32.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2479 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/ports/IAR/ARMCMx/cstartup.s')
| -rw-r--r-- | os/ports/IAR/ARMCMx/cstartup.s | 67 |
1 files changed, 67 insertions, 0 deletions
diff --git a/os/ports/IAR/ARMCMx/cstartup.s b/os/ports/IAR/ARMCMx/cstartup.s new file mode 100644 index 000000000..97757362a --- /dev/null +++ b/os/ports/IAR/ARMCMx/cstartup.s @@ -0,0 +1,67 @@ +/**************************************************
+ *
+ * Part one of the system initialization code, contains low-level
+ * initialization, plain thumb variant.
+ *
+ * Copyright 2008 IAR Systems. All rights reserved.
+ *
+ * $Revision: 34775 $
+ *
+ **************************************************/
+
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+ MODULE ?cstartup
+
+CONTROL_MODE_PRIVILEGED SET 0
+CONTROL_MODE_UNPRIVILEGED SET 1
+CONTROL_USE_MSP SET 0
+CONTROL_USE_PSP SET 2
+
+ AAPCS INTERWORK, VFP_COMPATIBLE, ROPI
+ PRESERVE8
+
+ SECTION PSTACK:DATA:NOROOT(3)
+ SECTION .intvec:CODE:NOROOT(3)
+
+ PUBLIC __iar_program_start
+ EXTERN __cmain
+ EXTERN __vector_table
+ EXTWEAK __iar_init_core
+ EXTWEAK __iar_init_vfp
+
+ SECTION .text:CODE:REORDER(2)
+ THUMB
+__iar_program_start:
+ cpsid i
+ ldr r0, =sfe(PSTACK)
+ msr PSP, r0
+ movs r0, #CONTROL_MODE_PRIVILEGED | CONTROL_USE_PSP
+ msr CONTROL, r0
+ isb
+ bl hwinit0
+ bl __iar_init_core
+ bl __iar_init_vfp
+ bl __cmain
+
+ PUBWEAK hwinit0
+hwinit0
+ bx lr
+
+ REQUIRE __vector_table
+
+ END
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