diff options
| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-02-20 11:39:33 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-02-20 11:39:33 +0000 |
| commit | 0fc33d47532b1b7727d576b3814498c8907b3c31 (patch) | |
| tree | 0f4c6e10bc5dae96c0f0212f23ed0674fcfe29ce /os/ports/GCC | |
| parent | ee9a1b480bf34513eaf3494f27f13f2f80ca578c (diff) | |
| download | ChibiOS-0fc33d47532b1b7727d576b3814498c8907b3c31.tar.gz ChibiOS-0fc33d47532b1b7727d576b3814498c8907b3c31.tar.bz2 ChibiOS-0fc33d47532b1b7727d576b3814498c8907b3c31.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1644 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/ports/GCC')
| -rw-r--r-- | os/ports/GCC/ARM7/chcore.h | 7 | ||||
| -rw-r--r-- | os/ports/GCC/ARMCM3/chcore.h | 7 | ||||
| -rw-r--r-- | os/ports/GCC/AVR/chcore.h | 5 | ||||
| -rw-r--r-- | os/ports/GCC/MSP430/chcore.h | 5 | ||||
| -rw-r--r-- | os/ports/GCC/PPC/chcore.h | 7 | ||||
| -rw-r--r-- | os/ports/GCC/SIMIA32/chcore.h | 7 |
6 files changed, 34 insertions, 4 deletions
diff --git a/os/ports/GCC/ARM7/chcore.h b/os/ports/GCC/ARM7/chcore.h index ff96a419c..f32ec0293 100644 --- a/os/ports/GCC/ARM7/chcore.h +++ b/os/ports/GCC/ARM7/chcore.h @@ -43,7 +43,12 @@ /**
* Name of the implemented architecture.
*/
-#define CH_ARCHITECTURE_NAME "ARM7TDMI"
+#define CH_ARCHITECTURE_NAME "ARM"
+
+/**
+ * @brief Name of the architecture variant (optional).
+ */
+#define CH_CORE_VARIANT_NAME "ARM7TDMI"
/**
* 32 bit stack alignment.
diff --git a/os/ports/GCC/ARMCM3/chcore.h b/os/ports/GCC/ARMCM3/chcore.h index c1b9591e0..1b72a454d 100644 --- a/os/ports/GCC/ARMCM3/chcore.h +++ b/os/ports/GCC/ARMCM3/chcore.h @@ -91,7 +91,12 @@ /**
* Name of the implemented architecture.
*/
-#define CH_ARCHITECTURE_NAME "ARM Cortex-M3"
+#define CH_ARCHITECTURE_NAME "ARM"
+
+/**
+ * @brief Name of the architecture variant (optional).
+ */
+#define CH_CORE_VARIANT_NAME "Cortex-M3"
/**
* 32 bit stack alignment.
diff --git a/os/ports/GCC/AVR/chcore.h b/os/ports/GCC/AVR/chcore.h index b452e0227..d37f31899 100644 --- a/os/ports/GCC/AVR/chcore.h +++ b/os/ports/GCC/AVR/chcore.h @@ -48,6 +48,11 @@ #define CH_ARCHITECTURE_NAME "AVR"
/**
+ * @brief Name of the architecture variant (optional).
+ */
+#define CH_CORE_VARIANT_NAME "MegaAVR"
+
+/**
* 8 bit stack alignment.
*/
typedef uint8_t stkalign_t;
diff --git a/os/ports/GCC/MSP430/chcore.h b/os/ports/GCC/MSP430/chcore.h index 8ae84b5c1..63616d287 100644 --- a/os/ports/GCC/MSP430/chcore.h +++ b/os/ports/GCC/MSP430/chcore.h @@ -48,6 +48,11 @@ #define CH_ARCHITECTURE_NAME "MSP430"
/**
+ * @brief Name of the architecture variant (optional).
+ */
+#define CH_CORE_VARIANT_NAME "MSP430"
+
+/**
* 16 bit stack alignment.
*/
typedef uint16_t stkalign_t;
diff --git a/os/ports/GCC/PPC/chcore.h b/os/ports/GCC/PPC/chcore.h index 29ac76b15..3f3ce61af 100644 --- a/os/ports/GCC/PPC/chcore.h +++ b/os/ports/GCC/PPC/chcore.h @@ -47,7 +47,12 @@ /**
* @brief Name of the implemented architecture. */
-#define CH_ARCHITECTURE_NAME "PPC E200Zx"
+#define CH_ARCHITECTURE_NAME "PowerPC"
+
+/**
+ * @brief Name of the architecture variant (optional).
+ */
+#define CH_CORE_VARIANT_NAME "e200zX"
/**
* @brief Base type for stack alignment. diff --git a/os/ports/GCC/SIMIA32/chcore.h b/os/ports/GCC/SIMIA32/chcore.h index 00e33faa1..a65eb9640 100644 --- a/os/ports/GCC/SIMIA32/chcore.h +++ b/os/ports/GCC/SIMIA32/chcore.h @@ -33,7 +33,12 @@ /**
* Name of the implemented architecture.
*/
-#define CH_ARCHITECTURE_NAME "x86 Simulator"
+#define CH_ARCHITECTURE_NAME "Simulator"
+
+/**
+ * @brief Name of the architecture variant (optional).
+ */
+#define CH_CORE_VARIANT_NAME "x86 (integer only)"
/**
* 16 bytes stack alignment.
|