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author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2012-11-21 13:47:59 +0000 |
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committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2012-11-21 13:47:59 +0000 |
commit | 57618ff11dd6e4539ef46f36599db48a40cbb181 (patch) | |
tree | fb7ab58d1ef043bb2cd94d8adc9fbd61efa8121c /os/ports/GCC/PPC/chcore.h | |
parent | 24c823f54822a2abc01a9d4e6f6dcf9c31a4e8e3 (diff) | |
download | ChibiOS-57618ff11dd6e4539ef46f36599db48a40cbb181.tar.gz ChibiOS-57618ff11dd6e4539ef46f36599db48a40cbb181.tar.bz2 ChibiOS-57618ff11dd6e4539ef46f36599db48a40cbb181.zip |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4835 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/ports/GCC/PPC/chcore.h')
-rw-r--r-- | os/ports/GCC/PPC/chcore.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/os/ports/GCC/PPC/chcore.h b/os/ports/GCC/PPC/chcore.h index 0a4476ea4..4fd1cd300 100644 --- a/os/ports/GCC/PPC/chcore.h +++ b/os/ports/GCC/PPC/chcore.h @@ -345,6 +345,15 @@ struct context { #define port_enable() asm volatile ("wrteei 1" : : : "memory")
/**
+ * @brief Writes to a special register.
+ *
+ * @param[in] spr special register number
+ * @param[in] val value to be written
+ */
+#define port_mtspr(spr, val) \
+ asm volatile ("mtspr %0,%1" : : "n" (spr), "r" (val))
+
+/**
* @details This port function is implemented as inlined code for performance
* reasons.
*/
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