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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-02-14 09:42:46 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-02-14 09:42:46 +0000 |
| commit | 6a21d25cb55110ba179ee3ffe9e559102ad470a3 (patch) | |
| tree | b4dff6a8e8ae75e0e0397e62c38cec77c60187a2 /os/ports/GCC/PPC/SPC56ELxx | |
| parent | ec0a1f48ad75964af7486c8a4687202b5cb3853d (diff) | |
| download | ChibiOS-6a21d25cb55110ba179ee3ffe9e559102ad470a3.tar.gz ChibiOS-6a21d25cb55110ba179ee3ffe9e559102ad470a3.tar.bz2 ChibiOS-6a21d25cb55110ba179ee3ffe9e559102ad470a3.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5178 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/ports/GCC/PPC/SPC56ELxx')
| -rw-r--r-- | os/ports/GCC/PPC/SPC56ELxx/bam.s | 8 | ||||
| -rw-r--r-- | os/ports/GCC/PPC/SPC56ELxx/core.s | 184 | ||||
| -rw-r--r-- | os/ports/GCC/PPC/SPC56ELxx/vectors.s | 9 |
3 files changed, 102 insertions, 99 deletions
diff --git a/os/ports/GCC/PPC/SPC56ELxx/bam.s b/os/ports/GCC/PPC/SPC56ELxx/bam.s index 1d9f1c6b5..0760257a2 100644 --- a/os/ports/GCC/PPC/SPC56ELxx/bam.s +++ b/os/ports/GCC/PPC/SPC56ELxx/bam.s @@ -28,14 +28,18 @@ #if !defined(__DOXYGEN__)
- /* BAM info, SWT off, WTE off, VLE from settings.*/
+ /* BAM record.*/
.section .bam, "ax"
+#if PPC_USE_VLE
.long 0x015A0000
+#else
+ .long 0x005A0000
+#endif
.long .init
- /* HW configuration.*/
.init:
bl _coreinit
+ bl _ivinit
b _boot_address
diff --git a/os/ports/GCC/PPC/SPC56ELxx/core.s b/os/ports/GCC/PPC/SPC56ELxx/core.s index 166b62a3d..cb25acf7c 100644 --- a/os/ports/GCC/PPC/SPC56ELxx/core.s +++ b/os/ports/GCC/PPC/SPC56ELxx/core.s @@ -27,26 +27,6 @@ */
/**
- * @name MSR register definitions
- * @{
- */
-#define MSR_UCLE 0x04000000
-#define MSR_SPE 0x02000000
-#define MSR_WE 0x00040000
-#define MSR_CE 0x00020000
-#define MSR_EE 0x00008000
-#define MSR_PR 0x00004000
-#define MSR_FP 0x00002000
-#define MSR_ME 0x00001000
-#define MSR_FE0 0x00000800
-#define MSR_DE 0x00000200
-#define MSR_FE1 0x00000100
-#define MSR_IS 0x00000020
-#define MSR_DS 0x00000010
-#define MSR_RI 0x00000002
-/** @} */
-
-/**
* @name MASx registers definitions
* @{
*/
@@ -115,12 +95,6 @@ /** @} */
/**
- * @name MSR default settings
- */
-#define MSR_DEFAULT (0x00001000)
-/** @} */
-
-/**
* @name TLB default settings
* @{
*/
@@ -158,38 +132,35 @@ #define LICSR1_DEFAULT (LICSR1_ICE)
/** @} */
-#if !defined(__DOXYGEN__)
- .section .handlers, "ax"
+/**
+ * @name MSR register definitions
+ * @{
+ */
+#define MSR_UCLE 0x04000000
+#define MSR_SPE 0x02000000
+#define MSR_WE 0x00040000
+#define MSR_CE 0x00020000
+#define MSR_EE 0x00008000
+#define MSR_PR 0x00004000
+#define MSR_FP 0x00002000
+#define MSR_ME 0x00001000
+#define MSR_FE0 0x00000800
+#define MSR_DE 0x00000200
+#define MSR_FE1 0x00000100
+#define MSR_IS 0x00000020
+#define MSR_DS 0x00000010
+#define MSR_RI 0x00000002
+/** @} */
- /*
- * Unhandled exceptions handler.
- */
- .weak _IVOR0, _IVOR1, _IVOR2, _IVOR3, _IVOR4, _IVOR5
- .weak _IVOR6, _IVOR7, _IVOR8, _IVOR9, _IVOR10, _IVOR11
- .weak _IVOR12, _IVOR13, _IVOR14, _IVOR15, _IVOR32, _IVOR33
- .weak _IVOR34
- .weak _unhandled_exception
-_IVOR0:
-_IVOR1:
-_IVOR2:
-_IVOR3:
-_IVOR5:
-_IVOR6:
-_IVOR7:
-_IVOR8:
-_IVOR9:
-_IVOR11:
-_IVOR12:
-_IVOR13:
-_IVOR14:
-_IVOR15:
-_IVOR32:
-_IVOR33:
-_IVOR34:
- .type _unhandled_exception, @function
-_unhandled_exception:
- b _unhandled_exception
+/**
+ * @name MSR default settings
+ * @{
+ */
+#define MSR_DEFAULT (MSR_ME)
+/** @} */
+
+#if !defined(__DOXYGEN__)
.section .coreinit, "ax"
@@ -287,38 +258,6 @@ _coreinit: mtMSR %r3
/*
- * IVPR initialization.
- */
- lis %r3, __ivpr_base__@h
- ori %r3, %r3, __ivpr_base__@l
- mtIVPR %r3
-
- /*
- * IVORs initialization.
- */
- lis %r3, _unhandled_exception@h
- ori %r3, %r3, _unhandled_exception@l
- mtspr 400, %r3 /* IVOR0-15 */
- mtspr 401, %r3
- mtspr 402, %r3
- mtspr 403, %r3
- mtspr 404, %r3
- mtspr 405, %r3
- mtspr 406, %r3
- mtspr 407, %r3
- mtspr 408, %r3
- mtspr 409, %r3
- mtspr 410, %r3
- mtspr 411, %r3
- mtspr 412, %r3
- mtspr 413, %r3
- mtspr 414, %r3
- mtspr 415, %r3
- mtspr 528, %r3 /* IVOR32-34 */
- mtspr 529, %r3
- mtspr 530, %r3
-
- /*
* TLB0 allocated to flash.
*/
lis %r3, TLB0_MAS0@h
@@ -435,6 +374,75 @@ _coreinit: blr
+ /*
+ * Exception vectors initialization.
+ */
+ .global _ivinit
+ .type _ivinit, @function
+_ivinit:
+ /* MSR initialization.*/
+ lis %r3, MSR_DEFAULT@h
+ ori %r3, %r3, MSR_DEFAULT@l
+ mtMSR %r3
+
+ /* IVPR initialization.*/
+ lis %r3, __ivpr_base__@h
+ ori %r3, %r3, __ivpr_base__@l
+ mtIVPR %r3
+
+ /* IVORs initialization.*/
+ lis %r3, _unhandled_exception@h
+ ori %r3, %r3, _unhandled_exception@l
+ mtspr 400, %r3 /* IVOR0-15 */
+ mtspr 401, %r3
+ mtspr 402, %r3
+ mtspr 403, %r3
+ mtspr 404, %r3
+ mtspr 405, %r3
+ mtspr 406, %r3
+ mtspr 407, %r3
+ mtspr 408, %r3
+ mtspr 409, %r3
+ mtspr 410, %r3
+ mtspr 411, %r3
+ mtspr 412, %r3
+ mtspr 413, %r3
+ mtspr 414, %r3
+ mtspr 415, %r3
+ mtspr 528, %r3 /* IVOR32-34 */
+ mtspr 529, %r3
+ mtspr 530, %r3
+ blr
+
+ /*
+ * Unhandled exceptions handler.
+ */
+ .weak _IVOR0, _IVOR1, _IVOR2, _IVOR3, _IVOR4, _IVOR5
+ .weak _IVOR6, _IVOR7, _IVOR8, _IVOR9, _IVOR10, _IVOR11
+ .weak _IVOR12, _IVOR13, _IVOR14, _IVOR15, _IVOR32, _IVOR33
+ .weak _IVOR34
+ .weak _unhandled_exception
+_IVOR0:
+_IVOR1:
+_IVOR2:
+_IVOR3:
+_IVOR5:
+_IVOR6:
+_IVOR7:
+_IVOR8:
+_IVOR9:
+_IVOR11:
+_IVOR12:
+_IVOR13:
+_IVOR14:
+_IVOR15:
+_IVOR32:
+_IVOR33:
+_IVOR34:
+ .type _unhandled_exception, @function
+_unhandled_exception:
+ b _unhandled_exception
+
#endif /* !defined(__DOXYGEN__) */
/** @} */
diff --git a/os/ports/GCC/PPC/SPC56ELxx/vectors.s b/os/ports/GCC/PPC/SPC56ELxx/vectors.s index 45726c0d4..b12f4a683 100644 --- a/os/ports/GCC/PPC/SPC56ELxx/vectors.s +++ b/os/ports/GCC/PPC/SPC56ELxx/vectors.s @@ -35,15 +35,6 @@ #if !defined(__DOXYGEN__)
- /* BAM info, SWT off, WTE off, VLE from settings.*/
- .section .bam, "ax"
-#if PPC_USE_VLE
- .long 0x015A0000
-#else
- .long 0x005A0000
-#endif
- .long _boot_address
-
/* Software vectors table. The vectors are accessed from the IVOR4
handler only. In order to declare an interrupt handler just create
a function withe the same name of a vector, the symbol will
|