git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1073 35acf78f-673a-0410-8e92-d51de3d6d3f4

10 files changed, 1315 insertions, 0 deletions

diff --git a/os/ports/GCC/MSP430/chcore.c b/os/ports/GCC/MSP430/chcore.c
new file mode 100644
index 000000000..45d52726a
--- /dev/null
+++ b/os/ports/GCC/MSP430/chcore.c
@@ -0,0 +1,90 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+/**

+ * @file ports/MSP430/chcore.c

+ * @brief MSP430 architecture port code.

+ * @addtogroup MSP430_CORE

+ * @{

+ */

+

+#include <ch.h>

+

+/**

+ * Performs a context switch between two threads.

+ * @param otp the thread to be switched out

+ * @param ntp the thread to be switched in

+ * @note The function is declared as a weak symbol, it is possible to redefine

+ *       it in your application code.

+ */

+/** @cond never */

+__attribute__((naked, weak))

+/** @endcond */

+void port_switch(Thread *otp, Thread *ntp) {

+  register struct intctx *sp asm("r1");

+

+  asm volatile ("push    r11                                    \n\t" \

+                "push    r10                                    \n\t" \

+                "push    r9                                     \n\t" \

+                "push    r8                                     \n\t" \

+                "push    r7                                     \n\t" \

+                "push    r6                                     \n\t" \

+                "push    r6                                     \n\t" \

+                "push    r4");

+  otp->p_ctx.sp = sp;

+  sp = ntp->p_ctx.sp;

+  asm volatile ("pop     r4                                     \n\t" \

+                "pop     r5                                     \n\t" \

+                "pop     r6                                     \n\t" \

+                "pop     r7                                     \n\t" \

+                "pop     r8                                     \n\t" \

+                "pop     r9                                     \n\t" \

+                "pop     r10                                    \n\t" \

+                "pop     r11                                    \n\t" \

+                "ret" : : "r" (sp));

+}

+

+/**

+ * Disables the interrupts and halts the system.
+ * @note The function is declared as a weak symbol, it is possible to redefine

+ *       it in your application code.

+ */

+/** @cond never */

+__attribute__((weak))

+/** @endcond */

+void port_halt(void) {

+

+  port_disable();

+  while (TRUE) {

+  }

+}

+

+/**

+ * Start a thread by invoking its work function.

+ * If the work function returns @p chThdExit() is automatically invoked.

+ */

+void threadstart(void) {

+

+  asm volatile ("eint                                           \n\t" \

+                "mov     r11, r15                               \n\t" \

+                "call    r10                                    \n\t" \

+                "call    #chThdExit");

+}

+

+/** @} */

diff --git a/os/ports/GCC/MSP430/chcore.h b/os/ports/GCC/MSP430/chcore.h
new file mode 100644
index 000000000..313108cde
--- /dev/null
+++ b/os/ports/GCC/MSP430/chcore.h
@@ -0,0 +1,238 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+/**

+ * @file ports/MSP430/chcore.h

+ * @brief MSP430 architecture port macros and structures.

+ * @addtogroup MSP430_CORE

+ * @{

+ */

+

+#ifndef _CHCORE_H_

+#define _CHCORE_H_

+

+#include <iomacros.h>

+#include <msp430/common.h>

+

+/**

+ * If enabled allows the idle thread to enter a low power mode.

+ */

+#ifndef ENABLE_WFI_IDLE

+#define ENABLE_WFI_IDLE 0

+#endif

+

+/**

+ * Macro defining the MSP430 architecture.

+ */

+#define CH_ARCHITECTURE_MSP430

+

+/**

+ * Name of the implemented architecture.

+ */

+#define CH_ARCHITECTURE_NAME "MSP430"

+

+/**

+ * 16 bit stack alignment.

+ */

+typedef uint16_t stkalign_t;

+

+/**

+ * Generic MSP430 register.

+ */

+typedef void *regmsp_t;

+

+/** @cond never */

+/**

+ * Interrupt saved context.

+ */

+struct extctx {

+  regmsp_t      r12;

+  regmsp_t      r13;

+  regmsp_t      r14;

+  regmsp_t      r15;

+  regmsp_t      sr;

+  regmsp_t      pc;

+};

+/** @endcond */

+

+/** @cond never */

+/**

+ * This structure represents the inner stack frame during a context switching.

+ */

+struct intctx {

+  regmsp_t      r4;

+  regmsp_t      r5;

+  regmsp_t      r6;

+  regmsp_t      r7;

+  regmsp_t      r8;

+  regmsp_t      r9;

+  regmsp_t      r10;

+  regmsp_t      r11;

+  regmsp_t      pc;

+};

+/** @endcond */

+

+/** @cond never */

+/**

+ * In the MSP430 port this structure just holds a pointer to the @p intctx

+ * structure representing the stack pointer at the time of the context switch.

+ */

+struct context {

+  struct intctx *sp;

+};

+/** @endcond */

+

+/**

+ * Platform dependent part of the @p chThdInit() API.

+ */

+#define SETUP_CONTEXT(workspace, wsize, pf, arg) {                      \

+  tp->p_ctx.sp = (struct intctx *)((uint8_t *)workspace +               \

+                                   wsize -                              \

+                                   sizeof(struct intctx));              \

+  tp->p_ctx.sp->r10 = pf;                                               \

+  tp->p_ctx.sp->r11 = arg;                                              \

+  tp->p_ctx.sp->pc = threadstart;                                       \

+}

+

+/**

+ * The default idle thread implementation requires no extra stack space in

+ * this port.

+ */

+#ifndef IDLE_THREAD_STACK_SIZE

+#define IDLE_THREAD_STACK_SIZE 0

+#endif

+

+/**

+ * Per-thread stack overhead for interrupts servicing, it is used in the

+ * calculation of the correct working area size. In this port the default is

+ * 32 bytes per thread.

+ */

+#ifndef INT_REQUIRED_STACK

+#define INT_REQUIRED_STACK 32

+#endif

+

+/**

+ * Enforces a correct alignment for a stack area size value.

+ */

+#define STACK_ALIGN(n) ((((n) - 1) | (sizeof(stkalign_t) - 1)) + 1)

+

+/**

+ * Computes the thread working area global size.

+ */

+#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) +                     \

+                                   sizeof(struct intctx) +              \

+                                   sizeof(struct extctx) +              \

+                                  (n) + (INT_REQUIRED_STACK))

+

+/**

+ * Macro used to allocate a thread working area aligned as both position and

+ * size.

+ */

+#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)];

+

+/**

+ * IRQ prologue code, inserted at the start of all IRQ handlers enabled to

+ * invoke system APIs.
+ */

+#define PORT_IRQ_PROLOGUE()

+

+/**

+ * IRQ epilogue code, inserted at the end of all IRQ handlers enabled to

+ * invoke system APIs.

+ */

+#define PORT_IRQ_EPILOGUE() {                                           \

+  if (chSchRescRequiredI())                                             \

+    chSchDoRescheduleI();                                               \

+}

+

+/**

+ * IRQ handler function modifier.

+ */

+#define PORT_IRQ_HANDLER(id) interrupt(id) _vect_##id(void)

+

+/**

+ * This function is empty in this port.

+ */

+#define port_init()

+

+/**

+ * Implemented as global interrupt disable.

+ */

+#define port_lock() asm volatile ("dint")

+

+/**

+ * Implemented as global interrupt enable.

+ */

+#define port_unlock() asm volatile ("eint")

+

+/**

+ * This function is empty in this port.

+ */

+#define port_lock_from_isr()

+

+/**

+ * This function is empty in this port.

+ */

+#define port_unlock_from_isr()

+

+/**

+ * Implemented as global interrupt disable.

+ */

+#define port_disable() asm volatile ("dint")

+

+/**

+ * Same as @p port_disable() in this port, there is no difference between the

+ * two states.

+ */

+#define port_suspend() asm volatile ("dint")

+

+/**

+ * Implemented as global interrupt enable.

+ */

+#define port_enable() asm volatile ("eint")

+

+/**

+ * This port function is implemented as inlined code for performance reasons.

+ * @note The port code does not define a low power mode, this macro has to be

+ *       defined externally. The default implementation is a "nop", not a

+ *       real low power mode.

+ */

+#if ENABLE_WFI_IDLE != 0

+#ifndef port_wait_for_interrupt

+#define port_wait_for_interrupt() {                                     \

+  asm volatile ("nop");                                                 \

+}

+#endif

+#else

+#define port_wait_for_interrupt()

+#endif

+

+#ifdef __cplusplus

+extern "C" {

+#endif

+  void port_switch(Thread *otp, Thread *ntp);

+  void port_halt(void);

+  void threadstart(void);

+#ifdef __cplusplus

+}

+#endif

+

+#endif /* _CHCORE_H_ */

+

+/** @} */

diff --git a/os/ports/GCC/MSP430/chtypes.h b/os/ports/GCC/MSP430/chtypes.h
new file mode 100644
index 000000000..f8d7c944a
--- /dev/null
+++ b/os/ports/GCC/MSP430/chtypes.h
@@ -0,0 +1,56 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+/**

+ * @file ports/MSP430/chtypes.h

+ * @brief MSP430 architecture port system types.

+ * @addtogroup MSP430_CORE

+ * @{

+ */

+

+#ifndef _CHTYPES_H_

+#define _CHTYPES_H_

+

+#define __need_NULL

+#define __need_size_t

+#define __need_ptrdiff_t

+#include <stddef.h>

+

+#if !defined(_STDINT_H) && !defined(__STDINT_H_)

+#include <stdint.h>

+#endif

+

+typedef int16_t         bool_t;         /**< Fast boolean type. */

+typedef uint8_t         tmode_t;        /**< Thread flags. */

+typedef uint8_t         tstate_t;       /**< Thread state. */

+typedef uint16_t        tprio_t;        /**< Thread priority. */

+typedef int16_t         msg_t;          /**< Inter-thread message. */

+typedef int16_t         eventid_t;      /**< Event Id. */

+typedef uint16_t        eventmask_t;    /**< Events mask. */

+typedef uint16_t        systime_t;      /**< System time. */

+typedef int16_t         cnt_t;          /**< Resources counter. */

+

+#define INLINE      inline

+#define PACK_STRUCT_STRUCT __attribute__((packed))

+#define PACK_STRUCT_BEGIN

+#define PACK_STRUCT_END

+

+#endif /* _CHTYPES_H_ */

+

+/** @} */

diff --git a/os/ports/GCC/MSP430/msp430_serial.c b/os/ports/GCC/MSP430/msp430_serial.c
new file mode 100644
index 000000000..69351b19d
--- /dev/null
+++ b/os/ports/GCC/MSP430/msp430_serial.c
@@ -0,0 +1,216 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+/**

+ * @file ports/MSP430/msp430_serial.c

+ * @brief MSP430 Serial driver code.

+ * @addtogroup MSP430_SERIAL

+ * @{

+ */

+

+#include <ch.h>

+#include <signal.h>

+

+#include "board.h"

+#include "msp430_serial.h"

+

+static void SetError(uint8_t urctl, FullDuplexDriver *com) {

+  dflags_t sts = 0;

+

+  if (urctl & OE)

+    sts |= SD_OVERRUN_ERROR;

+  if (urctl & PE)

+    sts |= SD_PARITY_ERROR;

+  if (urctl & FE)

+    sts |= SD_FRAMING_ERROR;

+  if (urctl & BRK)

+    sts |= SD_BREAK_DETECTED;

+  chSysLockFromIsr();

+  chFDDAddFlagsI(com, sts);

+  chSysUnlockFromIsr();

+}

+

+#if USE_MSP430_USART0 || defined(__DOXYGEN__)

+

+/** @brief USART0 serial driver identifier.*/

+FullDuplexDriver COM1;

+

+static uint8_t ib1[SERIAL_BUFFERS_SIZE];

+static uint8_t ob1[SERIAL_BUFFERS_SIZE];

+

+CH_IRQ_HANDLER(USART0TX_VECTOR) {

+  msg_t b;

+

+  CH_IRQ_PROLOGUE();

+

+  chSysLockFromIsr();

+  b = chFDDRequestDataI(&COM1);

+  chSysUnlockFromIsr();

+  if (b < Q_OK)

+    U0IE &= ~UTXIE0;

+  else

+    U0TXBUF = b;

+

+  CH_IRQ_EPILOGUE();

+}

+

+CH_IRQ_HANDLER(USART0RX_VECTOR) {

+  uint8_t urctl;

+

+  CH_IRQ_PROLOGUE();

+

+  if ((urctl = U0RCTL) & RXERR)

+    SetError(urctl, &COM1);

+  chSysLockFromIsr();

+  chFDDIncomingDataI(&COM1, U0RXBUF);

+  chSysUnlockFromIsr();

+

+  CH_IRQ_EPILOGUE();

+}

+

+static void OutNotify1(void) {

+

+  if (!(U0IE & UTXIE0)) {

+    chSysLockFromIsr();

+    U0TXBUF = (uint8_t)chFDDRequestDataI(&COM1);

+    chSysUnlockFromIsr();

+    U0IE |= UTXIE0;

+  }

+}

+

+/**

+ * @brief USART0 setup.

+ * @details This function must be invoked with interrupts disabled.

+ * @param div The divider value as calculated by the @p UBR() macro.

+ * @param mod The value for the @p U0MCTL register.

+ * @param ctl The value for the @p U0CTL register.

+ * @note Does not reset the I/O queues.

+ */

+void usart0_setup(uint16_t div, uint8_t mod, uint8_t ctl) {

+

+  U0CTL = SWRST;                /* Resets the USART, it should already be */

+  /* USART init */

+  U0TCTL = SSEL0 | SSEL1;       /* SMCLK as clock source */

+  U0MCTL = mod;                 /* Modulator */

+  U0BR1 = (uint8_t)(div >> 8);  /* Divider high */

+  U0BR0 = (uint8_t)(div >> 0);  /* Divider low */

+  /* Clear USART status */

+  (void)U0RXBUF;

+  U0RCTL = 0;

+  /* USART enable */

+  P3SEL |= BV(4) + BV(5);       /* I/O pins for USART 0 */

+  U0ME |= UTXE0 + URXE0;        /* Enables the USART */

+  U0CTL = ctl & ~SWRST;         /* Various settings, clears reset state */

+  U0IE |= URXIE0;               /* Enables RX interrupt */

+}

+#endif /* USE_MSP430_USART0 */

+

+#if USE_MSP430_USART1 || defined(__DOXYGEN__)

+

+/** @brief USART1 serial driver identifier.*/

+FullDuplexDriver COM2;

+

+static uint8_t ib2[SERIAL_BUFFERS_SIZE];

+static uint8_t ob2[SERIAL_BUFFERS_SIZE];

+

+CH_IRQ_HANDLER(USART1TX_VECTOR) {

+  msg_t b;

+

+  CH_IRQ_PROLOGUE();

+

+  chSysLockFromIsr();

+  b = chFDDRequestDataI(&COM2);

+  chSysUnlockFromIsr();

+  if (b < Q_OK)

+    U1IE &= ~UTXIE1;

+  else

+    U1TXBUF = b;

+

+  CH_IRQ_EPILOGUE();

+}

+

+CH_IRQ_HANDLER(USART1RX_VECTOR) {

+  uint8_t urctl;

+

+  CH_IRQ_PROLOGUE();

+

+  if ((urctl = U1RCTL) & RXERR)

+    SetError(urctl, &COM2);

+  chSysLockFromIsr();

+  chFDDIncomingDataI(&COM2, U1RXBUF);

+  chSysUnlockFromIsr();

+

+  CH_IRQ_EPILOGUE();

+}

+

+static void OutNotify2(void) {

+

+  if (!(U1IE & UTXIE1)) {

+    U1TXBUF = (uint8_t)chFDDRequestDataI(&COM2);

+    U1IE |= UTXIE1;

+  }

+}

+

+/**

+ * @brief USART1 setup.

+ * @details This function must be invoked with interrupts disabled.

+ * @param[in] div the divider value as calculated by the @p UBR() macro

+ * @param[in] mod the value for the @p U1MCTL register

+ * @param[in] ctl the value for the @p U1CTL register.

+ * @note Must be invoked with interrupts disabled.

+ * @note Does not reset the I/O queues.

+ */

+void usart1_setup(uint16_t div, uint8_t mod, uint8_t ctl) {

+

+  U1CTL = SWRST;                /* Resets the USART, it should already be */

+  /* USART init */

+  U1TCTL = SSEL0 | SSEL1;       /* SMCLK as clock source */

+  U1MCTL = mod;                 /* Modulator */

+  U1BR1 = (uint8_t)(div >> 8);  /* Divider high */

+  U1BR0 = (uint8_t)(div >> 0);  /* Divider low */

+  /* Clear USART status */

+  (void)U0RXBUF;

+  U1RCTL = 0;

+  /* USART enable */

+  P3SEL |= BV(6) + BV(7);       /* I/O pins for USART 1 */

+  U1ME |= UTXE0 + URXE0;        /* Enables the USART */

+  U1CTL = ctl & ~SWRST;         /* Various settings, clears reset state */

+  U1IE |= URXIE0;               /* Enables RX interrupt */

+}

+#endif

+

+/**

+ * @brief Serial driver initialization.

+ * @note The serial ports are initialized at @p 38400-8-N-1 by default.
+ */

+void serial_init(void) {

+

+  /* I/O queues setup.*/

+#if USE_MSP430_USART0

+  chFDDInit(&COM1, ib1, sizeof ib1, NULL, ob1, sizeof ob1, OutNotify1);

+  usart0_setup(UBR(DEFAULT_USART_BITRATE), 0, CHAR);

+#endif

+

+#if USE_MSP430_USART1

+  chFDDInit(&COM2, ib2, sizeof ib2, NULL, ob2, sizeof ob2, OutNotify2);

+  usart1_setup(UBR(DEFAULT_USART_BITRATE), 0, CHAR);

+#endif

+}

+

+/** @} */

diff --git a/os/ports/GCC/MSP430/msp430_serial.h b/os/ports/GCC/MSP430/msp430_serial.h
new file mode 100644
index 000000000..2195a6869
--- /dev/null
+++ b/os/ports/GCC/MSP430/msp430_serial.h
@@ -0,0 +1,91 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+/**

+ * @file ports/MSP430/msp430_serial.h

+ * @brief MSP430 Serial driver macros and structures.

+ * @addtogroup MSP430_SERIAL

+ * @{

+ */

+

+#ifndef _MSP430_SERIAL_H_

+#define _MSP430_SERIAL_H_

+

+/**

+ * @brief Serial buffers size.

+ * @details Configuration parameter, you can change the depth of the queue

+ * buffers depending on the requirements of your application.

+ * @note The default is 32 bytes for both the transmission and receive buffers.

+ */

+#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)

+#define SERIAL_BUFFERS_SIZE 32

+#endif

+

+/**

+ * @brief Default bit rate.

+ * @details Configuration parameter, at startup the UARTs are configured at

+ * this speed.

+ * @note It is possible to use @p SetUART() in order to change the working

+ *       parameters at runtime.

+ */

+#if !defined(DEFAULT_USART_BITRATE) || defined(__DOXYGEN__)

+#define DEFAULT_USART_BITRATE 38400

+#endif

+

+/**

+ * @brief USART0 driver enable switch.

+ * @details If set to @p TRUE the support for USART0 is included.

+ * @note The default is @p TRUE.
+ */

+#if !defined(USE_MSP430_USART0) || defined(__DOXYGEN__)

+#define USE_MSP430_USART0 TRUE

+#endif

+

+/**

+ * @brief USART1 driver enable switch.

+ * @details If set to @p TRUE the support for USART1 is included.

+ * @note The default is @p FALSE.

+ */

+#if !defined(USE_MSP430_USART1) || defined(__DOXYGEN__)

+#define USE_MSP430_USART1 FALSE

+#endif

+

+/**

+ * @brief Macro for baud rate computation.

+ * @note Make sure the final baud rate is within tolerance.

+ */

+#define UBR(b) (SMCLK / (b))

+

+#ifdef __cplusplus

+extern "C" {

+#endif

+  void serial_init(void);

+  void usart0_setup(uint16_t div, uint8_t mod, uint8_t ctl);

+  void usart1_setup(uint16_t div, uint8_t mod, uint8_t ctl);

+#ifdef __cplusplus

+}

+#endif

+

+/** @cond never*/

+extern FullDuplexDriver COM1, COM2;

+/** @endcond*/

+

+#endif /* _MSP430_SERIAL_H_ */

+

+/** @} */

diff --git a/os/ports/GCC/MSP430/pal_lld.c b/os/ports/GCC/MSP430/pal_lld.c
new file mode 100644
index 000000000..c5f59c2e9
--- /dev/null
+++ b/os/ports/GCC/MSP430/pal_lld.c
@@ -0,0 +1,115 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+/**

+ * @file ports/MSP430/pal_lld.c

+ * @brief MSP430 Digital I/O low level driver code

+ * @addtogroup MSP430_PAL

+ * @{

+ */

+

+#include <ch.h>

+#include <pal.h>

+

+/**

+ * @brief MSP430 I/O ports configuration.

+ *

+ * @param[in] config the MSP430 ports configuration

+ *

+ * @note The @p PxIFG, @p PxIE and @p PxSEL registers are cleared. @p PxOUT

+ *       and @p PxDIR are configured as specified.

+ */

+void _pal_lld_init(const MSP430DIOConfig *config) {

+

+#if defined(__MSP430_HAS_PORT1__) || defined(__MSP430_HAS_PORT1_R__)

+  IOPORT_A->iop_full.ie.reg_p = 0;

+  IOPORT_A->iop_full.ifg.reg_p = 0;

+  IOPORT_A->iop_full.sel.reg_p = 0;

+  IOPORT_A->iop_common.out = config->P1Data.out;

+  IOPORT_A->iop_common.dir = config->P1Data.dir;

+#endif

+

+#if defined(__MSP430_HAS_PORT2__) || defined(__MSP430_HAS_PORT2_R__)

+  IOPORT_B->iop_full.ie.reg_p = 0;

+  IOPORT_B->iop_full.ifg.reg_p = 0;

+  IOPORT_B->iop_full.sel.reg_p = 0;

+  IOPORT_B->iop_common.out = config->P2Data.out;

+  IOPORT_B->iop_common.dir = config->P2Data.dir;

+#endif

+

+#if defined(__MSP430_HAS_PORT3__) || defined(__MSP430_HAS_PORT3_R__)

+  IOPORT_C->iop_simple.sel.reg_p = 0;

+  IOPORT_C->iop_common.out = config->P3Data.out;

+  IOPORT_C->iop_common.dir = config->P3Data.dir;

+#endif

+

+#if defined(__MSP430_HAS_PORT4__) || defined(__MSP430_HAS_PORT4_R__)

+  IOPORT_D->iop_simple.sel.reg_p = 0;

+  IOPORT_D->iop_common.out = config->P4Data.out;

+  IOPORT_D->iop_common.dir = config->P4Data.dir;

+#endif

+

+#if defined(__MSP430_HAS_PORT5__) || defined(__MSP430_HAS_PORT5_R__)

+  IOPORT_E->iop_simple.sel.reg_p = 0;

+  IOPORT_E->iop_common.out = config->P5Data.out;

+  IOPORT_E->iop_common.dir = config->P5Data.dir;

+#endif

+

+#if defined(__MSP430_HAS_PORT6__) || defined(__MSP430_HAS_PORT6_R__)

+  IOPORT_F->iop_simple.sel.reg_p = 0;

+  IOPORT_F->iop_common.out = config->P6Data.out;

+  IOPORT_F->iop_common.dir = config->P6Data.dir;

+#endif

+}

+

+/**

+ * @brief Pads mode setup.

+ * @details This function programs a pads group belonging to the same port

+ *          with the specified mode.

+ *

+ * @param[in] port the port identifier

+ * @param[in] mask the group mask

+ * @param[in] mode the mode

+ *

+ * @note This function is not meant to be invoked directly by the application

+ *       code.

+ * @note @p PAL_MODE_UNCONNECTED is implemented as output as recommended by

+ *       the MSP430x1xx Family User's Guide. Unconnected pads are set to

+ *       high logic state by default.

+ * @note This function does not alter the @p PxSEL registers. Alternate

+ *       functions setup must be handled by device-specific code.

+ */

+void _pal_lld_setgroupmode(ioportid_t port,

+                           ioportmask_t mask,

+                           uint_fast8_t mode) {

+

+  switch (mode) {

+  case PAL_MODE_RESET:

+  case PAL_MODE_INPUT:

+    port->iop_common.dir.reg_p &= ~mask;

+    break;

+  case PAL_MODE_UNCONNECTED:

+    port->iop_common.out.reg_p |= mask;

+  case PAL_MODE_OUTPUT_PUSHPULL:

+    port->iop_common.dir.reg_p |= mask;

+    break;

+  }

+}

+

+/** @} */

diff --git a/os/ports/GCC/MSP430/pal_lld.h b/os/ports/GCC/MSP430/pal_lld.h
new file mode 100644
index 000000000..c82b9a80f
--- /dev/null
+++ b/os/ports/GCC/MSP430/pal_lld.h
@@ -0,0 +1,292 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+/**

+ * @file ports/MSP430/pal_lld.h

+ * @brief MSP430 Digital I/O low level driver header

+ * @addtogroup MSP430_PAL

+ * @{

+ */

+

+#ifndef _PAL_LLD_H_

+#define _PAL_LLD_H_

+

+#include <msp430x16x.h>

+

+/*===========================================================================*/

+/* Unsupported modes and specific modes                                      */

+/*===========================================================================*/

+

+#undef PAL_MODE_INPUT_PULLUP

+#undef PAL_MODE_INPUT_PULLDOWN

+#undef PAL_MODE_OUTPUT_OPENDRAIN

+

+/*===========================================================================*/

+/* I/O Ports Types and constants.                                            */

+/*===========================================================================*/

+

+/**

+ * @brief Simplified MSP430 I/O port representation.

+ * @details This structure represents the common part of all the MSP430 I/O

+ *          ports.
+ */

+struct port_common_t {

+  ioregister_t  in;

+  ioregister_t  out;

+  ioregister_t  dir;

+};

+

+/**

+ * @brief Generic MSP430 I/O port.
+ */

+union __ioport {

+  struct port_common_t iop_common;

+  struct port_simple_t iop_simple;

+  struct port_full_t iop_full;

+};

+

+/**

+ * @brief Setup registers common to all the MSP430 ports.
+ */

+typedef struct  {

+  ioregister_t  out;

+  ioregister_t  dir;

+} msp430_dio_setup_t;

+

+/**

+ * @brief MSP430 I/O ports static initializer.

+ * @details An instance of this structure must be passed to @p palInit() at

+ *          system startup time in order to initialized the digital I/O

+ *          subsystem. This represents only the initial setup, specific pads

+ *          or whole ports can be reprogrammed at later time.
+ */

+typedef struct {

+#if defined(__MSP430_HAS_PORT1__) ||                                    \

+    defined(__MSP430_HAS_PORT1_R__) ||                                  \

+    defined(__DOXYGEN__)

+  /** @brief Port 1 setup data.*/

+  msp430_dio_setup_t    P1Data;

+#endif

+#if defined(__MSP430_HAS_PORT2__) ||                                    \

+    defined(__MSP430_HAS_PORT2_R__) ||                                  \

+    defined(__DOXYGEN__)

+  /** @brief Port 2 setup data.*/

+  msp430_dio_setup_t    P2Data;

+#endif

+#if defined(__MSP430_HAS_PORT3__) ||                                    \

+    defined(__MSP430_HAS_PORT3_R__) ||                                  \

+    defined(__DOXYGEN__)

+  /** @brief Port 3 setup data.*/

+  msp430_dio_setup_t    P3Data;

+#endif

+#if defined(__MSP430_HAS_PORT4__) ||                                    \

+    defined(__MSP430_HAS_PORT4_R__) ||                                  \

+    defined(__DOXYGEN__)

+  /** @brief Port 4 setup data.*/

+  msp430_dio_setup_t    P4Data;

+#endif

+#if defined(__MSP430_HAS_PORT5__) ||                                    \

+    defined(__MSP430_HAS_PORT5_R__) ||                                  \

+    defined(__DOXYGEN__)

+  /** @brief Port 5 setup data.*/

+  msp430_dio_setup_t    P5Data;

+#endif

+#if defined(__MSP430_HAS_PORT6__) ||                                    \

+    defined(__MSP430_HAS_PORT6_R__) ||                                  \

+    defined(__DOXYGEN__)

+  /** @brief Port 6 setup data.*/

+  msp430_dio_setup_t    P6Data;

+#endif

+} MSP430DIOConfig;

+

+/**

+ * @brief Width, in bits, of an I/O port.
+ */

+#define PAL_IOPORTS_WIDTH 8

+

+/**

+ * @brief Whole port mask.

+ * @brief This macro specifies all the valid bits into a port.

+ */

+#define PAL_WHOLE_PORT ((ioportmask_t)0xFF)

+

+/**

+ * @brief Digital I/O port sized unsigned type.
+ */

+typedef uint8_t ioportmask_t;

+

+/**

+ * @brief Port Identifier.

+ * @details This type can be a scalar or some kind of pointer, do not make

+ *          any assumption about it, use the provided macros when populating

+ *          variables of this type.
+ */

+typedef union __ioport * ioportid_t;

+

+/*===========================================================================*/

+/* I/O Ports Identifiers.                                                    */

+/*===========================================================================*/

+

+/**

+ * @brief I/O port A identifier.

+ * @details This port identifier is mapped on the MSP430 port 1 (P1).

+ */

+#if defined(__MSP430_HAS_PORT1__) ||                                    \

+    defined(__MSP430_HAS_PORT1_R__) ||                                  \

+    defined(__DOXYGEN__)

+#define IOPORT_A        ((ioportid_t)0x0020)

+#endif

+

+/**

+ * @brief I/O port B identifier.

+ * @details This port identifier is mapped on the MSP430 port 2 (P2).

+ */

+#if defined(__MSP430_HAS_PORT2__) ||                                    \

+    defined(__MSP430_HAS_PORT2_R__) ||                                  \

+    defined(__DOXYGEN__)

+#define IOPORT_B        ((ioportid_t)0x0028)

+#endif

+

+/**

+ * @brief I/O port C identifier.

+ * @details This port identifier is mapped on the MSP430 port 3 (P3).

+ */

+#if defined(__MSP430_HAS_PORT3__) ||                                    \

+    defined(__MSP430_HAS_PORT3_R__) ||                                  \

+    defined(__DOXYGEN__)

+#define IOPORT_C        ((ioportid_t)0x0018)

+#endif

+

+/**

+ * @brief I/O port D identifier.

+ * @details This port identifier is mapped on the MSP430 port 4 (P4).

+ */

+#if defined(__MSP430_HAS_PORT4__) ||                                    \

+    defined(__MSP430_HAS_PORT4_R__) ||                                  \

+    defined(__DOXYGEN__)

+#define IOPORT_D        ((ioportid_t)0x001c)

+#endif

+

+/**

+ * @brief I/O port E identifier.

+ * @details This port identifier is mapped on the MSP430 port 5 (P5).

+ */

+#if defined(__MSP430_HAS_PORT5__) ||                                    \

+    defined(__MSP430_HAS_PORT5_R__) ||                                  \

+    defined(__DOXYGEN__)

+#define IOPORT_E        ((ioportid_t)0x0030)

+#endif

+

+/**

+ * @brief I/O port F identifier.

+ * @details This port identifier is mapped on the MSP430 port 6 (P6).

+ */

+#if defined(__MSP430_HAS_PORT6__) ||                                    \

+    defined(__MSP430_HAS_PORT6_R__) ||                                  \

+    defined(__DOXYGEN__)

+#define IOPORT_F        ((ioportid_t)0x0034)

+#endif

+

+/*===========================================================================*/

+/* Implementation, some of the following macros could be implemented as      */

+/* functions, if so please put them in a file named pal_lld.c.               */

+/*===========================================================================*/

+

+/**

+ * @brief Low level PAL subsystem initialization.

+ * @details In MSP430 programs all the ports as input.

+ *

+ * @param[in] config the MSP430 ports configuration

+ */

+#define pal_lld_init(config) _pal_lld_init(config)

+

+/**

+ * @brief Reads the physical I/O port states.

+ * @details This function is implemented by reading the PxIN register, the

+ *          implementation has no side effects.

+ *

+ * @param[in] port the port identifier

+ * @return The port bits.

+ *

+ * @note This function is not meant to be invoked directly by the application

+ *       code.

+ */

+#define pal_lld_readport(port) ((port)->iop_common.in.reg_p)

+

+/**

+ * @brief Reads the output latch.

+ * @details This function is implemented by reading the PxOUT register, the

+ *          implementation has no side effects.

+ *

+ * @param[in] port the port identifier

+ * @return The latched logical states.

+ *

+ * @note This function is not meant to be invoked directly by the application

+ *       code.

+ */

+#define pal_lld_readlatch(port) ((port)->iop_common.out.reg_p)

+

+/**

+ * @brief Writes a bits mask on a I/O port.

+ * @details This function is implemented by writing the PxOUT register, the

+ *          implementation has no side effects.

+ *

+ * @param[in] port the port identifier

+ * @param[in] bits the bits to be written on the specified port

+ *

+ * @note This function is not meant to be invoked directly by the application

+ *       code.

+ */

+#define pal_lld_writeport(port, bits) {                                 \

+  (port)->iop_common.out.reg_p = (bits);                                \

+}

+

+/**

+ * @brief Pads group mode setup.

+ * @details This function programs a pads group belonging to the same port

+ *          with the specified mode.

+ *

+ * @param[in] port the port identifier

+ * @param[in] mask the group mask

+ * @param[in] mode the mode

+ *

+ * @note This function is not meant to be invoked directly by the application

+ *       code.

+ * @note @p PAL_MODE_UNCONNECTED is implemented as output as recommended by

+ *       the MSP430x1xx Family User's Guide.

+ * @note This function does not alter the @p PxSEL registers. Alternate

+ *       functions setup must be handled by device-specific code.

+ */

+#define pal_lld_setgroupmode(port, mask, mode) \

+  _pal_lld_setgroupmode(port, mask, mode)

+

+#ifdef __cplusplus

+extern "C" {

+#endif

+  void _pal_lld_init(const MSP430DIOConfig *config);

+  void _pal_lld_setgroupmode(ioportid_t port,

+                             ioportmask_t mask,

+                             uint_fast8_t mode);

+#ifdef __cplusplus

+}

+#endif

+

+#endif /* _PAL_LLD_H_ */

+

+/** @} */

diff --git a/os/ports/GCC/MSP430/port.dox b/os/ports/GCC/MSP430/port.dox
new file mode 100644
index 000000000..1d0216d3c
--- /dev/null
+++ b/os/ports/GCC/MSP430/port.dox
@@ -0,0 +1,124 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+/**

+ * @defgroup MSP430 MSP430

+ * @details MSP430 port details. This section how the ChibiOS/RT features are

+ * implemented on this architecture.

+ *

+ * @section MSP430_STATES Mapping of the System States in the MSP430 port

+ * The ChibiOS/RT logical @ref system_states are mapped as follow in the MSP430

+ * port:

+ * - <b>Init</b>. This state is represented by the startup code and the

+ *   initialization code before @p chSysInit() is executed. It has not a

+ *   special hardware state associated.

+ * - <b>Normal</b>. This is the state the system has after executing

+ *   @p chSysInit(). Interrupts are enabled.

+ * - <b>Suspended</b>. Interrupts are disabled.

+ * - <b>Disabled</b>. Interrupts are enabled. This state is equivalent to the

+ *   Suspended state because there are no fast interrupts in this architecture.

+ * - <b>Sleep</b>. Not yet implemented.

+ * - <b>S-Locked</b>. Interrupts are disabled.

+ * - <b>I-Locked</b>. This state is equivalent to the SRI state, the

+ *   @p chSysLockI() and @p chSysUnlockI() APIs do nothing (still use them in

+ *   order to formally change state because this may change).

+ * - <b>Serving Regular Interrupt</b>. Normal interrupt service code.

+ * - <b>Serving Fast Interrupt</b>. Not present in this architecture.

+ * - <b>Serving Non-Maskable Interrupt</b>. The MSP430 has several non

+ *   maskable interrupt sources that can be associated to this state.

+ * - <b>Halted</b>. Implemented as an infinite loop with interrupts disabled.

+ * .

+ * @section MSP430_NOTES The MSP430 port notes

+ * - The MSP430 does not have a dedicated interrupt stack, make sure to reserve

+ *     enough stack space for interrupts in each thread stack. This can be done

+ *     by modifying the @p INT_REQUIRED_STACK macro into

+ *     <b>./ports/MSP430/chcore.h</b>.

+ * - The state of the hardware multiplier is not saved in the thread context,

+ *   make sure to use it in <b>Suspended</b> state (interrupts masked).

+ * - The port code does not define the switch to a low power mode for the

+ *   idle thread because the MSP430 has several low power modes. You can

+ *   select the proper low power mode for you application by defining the

+ *   macro @p port_wait_for_interrupt().

+ * .

+ * @ingroup Ports

+ */

+

+/**

+ * @defgroup MSP430_CONF Configuration Options

+ * @brief MSP430 Configuration Options.

+ * @details The MSP430 port allows some architecture-specific configurations

+ * settings that can be specified externally, as example on the compiler

+ * command line:

+ * - @p INT_REQUIRED_STACK, this value represent the amount of stack space

+ *   used by the interrupt handlers.<br>

+ *   The default for this value is @p 32, this space is allocated for each

+ *   thread so be careful in order to not waste precious RAM space.<br>

+ *   The default value is set into <b>./ports/MSP430/chcore.h</b>.

+ * .

+ * @ingroup MSP430

+ */

+

+/**

+ * @defgroup MSP430_CORE Core Port Implementation

+ * @brief MSP430 specific port code, structures and macros.

+ *

+ * @ingroup MSP430

+ */

+

+/**

+ * @defgroup MSP430_DRIVERS MSP430 Drivers

+ * @brief Device drivers included in the MSP430 support.

+ *

+ * @ingroup MSP430

+ */

+

+/**

+ * @defgroup MSP430_PAL I/O Ports Support

+ * @brief I/O Ports peripherals support.

+ * @details This module supports the MSP430 Digital I/O controller. The

+ * controller supports the following features (see @ref PAL):

+ * - 8 bits wide ports.

+ * - Atomic set/reset/toggle functions because special MSP430 instruction set.

+ * - Output latched regardless of the pad setting.

+ * - Direct read of input pads regardless of the pad setting.

+ * .

+ * <h2>Supported Setup Modes</h2>

+ * - @p PAL_MODE_RESET.

+ * - @p PAL_MODE_UNCONNECTED.

+ * - @p PAL_MODE_INPUT.

+ * - @p PAL_MODE_OUTPUT_PUSHPULL.

+ * .

+ * Any attempt to setup an invalid mode is ignored.

+ *

+ * <h2>Suboptimal Behavior</h2>

+ * Some MSP430 I/O ports features are less than optimal:

+ * - Bus/group writing is not atomic.

+ * - Pad/group mode setup is not atomic.

+ * .

+ * @ingroup MSP430_DRIVERS

+ */

+

+/**

+ * @defgroup MSP430_SERIAL USART Support

+ * @brief USART support.

+ * @details The serial driver supports both the MSP430 USARTs in asynchronous

+ * mode.

+ *

+ * @ingroup MSP430_DRIVERS

+ */

diff --git a/os/ports/GCC/MSP430/port.mk b/os/ports/GCC/MSP430/port.mk
new file mode 100644
index 000000000..14fe0d646
--- /dev/null
+++ b/os/ports/GCC/MSP430/port.mk
@@ -0,0 +1,6 @@
+# List of the ChibiOS/RT Cortex-M3 port files.

+PORTSRC = ../../os/ports/GCC/MSP430/chcore.c

+

+PORTASM = 

+

+PORTINC = ../../os/ports/GCC/MSP430

diff --git a/os/ports/GCC/MSP430/rules.mk b/os/ports/GCC/MSP430/rules.mk
new file mode 100644
index 000000000..219eef4ac
--- /dev/null
+++ b/os/ports/GCC/MSP430/rules.mk
@@ -0,0 +1,87 @@
+# MSP430 makefile scripts and rules.

+

+# Automatic compiler options

+OPT = $(USE_OPT)

+CPPOPT = $(USE_CPPOPT)

+ifeq ($(USE_CURRP_CACHING),yes)

+  OPT += -ffixed-r7 -DCH_CURRP_REGISTER_CACHE='"r7"'

+endif

+ifeq ($(USE_LINK_GC),yes)

+  OPT += -ffunction-sections -fdata-sections

+endif

+

+# Source files groups

+SRC	     = $(CSRC)$(CPPSRC)

+

+# Object files groups

+COBJS   = $(CSRC:.c=.o)

+CPPOBJS = $(CPPSRC:.cpp=.o)

+ASMOBJS = $(ASMSRC:.s=.o)

+OBJS	= $(ASMOBJS) $(COBJS) $(CPPOBJS)

+

+# Paths

+IINCDIR = $(patsubst %,-I%,$(INCDIR) $(DINCDIR) $(UINCDIR))

+LLIBDIR = $(patsubst %,-L%,$(DLIBDIR) $(ULIBDIR))

+

+# Macros

+DEFS    = $(DDEFS) $(UDEFS)

+ADEFS   = $(DADEFS) $(UADEFS)

+

+# Libs

+LIBS    = $(DLIBS) $(ULIBS)

+

+MCFLAGS = -mmcu=$(MCU)

+ODFLAGS	= -x --syms

+ASFLAGS = $(MCFLAGS) -Wa,-amhls=$(<:.s=.lst) $(ADEFS)

+CPFLAGS = $(MCFLAGS) $(OPT) $(WARN) -Wa,-alms=$(<:.c=.lst) $(DEFS)

+ifeq ($(LINK_GC),yes)

+  LDFLAGS = $(MCFLAGS) -T$(LDSCRIPT) -Wl,-Map=$(PROJECT).map,--cref,--no-warn-mismatch,--gc-sections $(LLIBDIR)

+else

+  LDFLAGS = $(MCFLAGS) -T$(LDSCRIPT) -Wl,-Map=$(PROJECT).map,--cref,--no-warn-mismatch $(LLIBDIR)

+endif

+

+# Generate dependency information

+CPFLAGS += -MD -MP -MF .dep/$(@F).d

+

+#

+# Makefile rules

+#

+all: $(OBJS) $(PROJECT).elf $(PROJECT).hex $(PROJECT).bin $(PROJECT).dmp

+

+$(CPPOBJS) : %.o : %.cpp

+	@echo

+	$(CPPC) -c $(CPPFLAGS) -I . $(IINCDIR) $< -o $@

+

+$(COBJS) : %.o : %.c

+	@echo

+	$(CC) -c $(CPFLAGS) -I . $(IINCDIR) $< -o $@

+

+$(ASMOBJS) : %.o : %.s

+	@echo

+	$(AS) -c $(ASFLAGS) -I . $(IINCDIR) $< -o $@

+

+%elf: $(OBJS)

+	@echo

+	$(LD) $(OBJS) $(LDFLAGS) $(LIBS) -o $@

+

+%hex: %elf

+	$(HEX) $< $@

+

+%bin: %elf

+	$(BIN) $< $@

+

+%dmp: %elf

+	$(OD) $(ODFLAGS) $< > $@

+

+clean:

+	-rm -f $(OBJS)

+	-rm -f $(CSRC:.c=.lst) $(CPPSRC:.cpp=.lst) $(ASMSRC:.s=.lst)

+	-rm -f $(PROJECT).elf $(PROJECT).dmp $(PROJECT).map $(PROJECT).hex $(PROJECT).bin

+	-rm -fR .dep

+

+#

+# Include the dependency files, should be the last of the makefile

+#

+-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)

+

+# *** EOF ***