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author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-04-02 08:59:10 +0000 |
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committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-04-02 08:59:10 +0000 |
commit | 876463f7215f0166ef9b7cafca77c7dca966d632 (patch) | |
tree | bb486f6db2520670b2c6bb512a18d606418105e4 /os/ports/GCC/ARMCMx | |
parent | ee8e0c61f9fd4e8c496b13ac47179c9621206db6 (diff) | |
download | ChibiOS-876463f7215f0166ef9b7cafca77c7dca966d632.tar.gz ChibiOS-876463f7215f0166ef9b7cafca77c7dca966d632.tar.bz2 ChibiOS-876463f7215f0166ef9b7cafca77c7dca966d632.zip |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1827 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/ports/GCC/ARMCMx')
-rw-r--r-- | os/ports/GCC/ARMCMx/port.dox | 65 |
1 files changed, 30 insertions, 35 deletions
diff --git a/os/ports/GCC/ARMCMx/port.dox b/os/ports/GCC/ARMCMx/port.dox index a47ba1ad5..b59624fab 100644 --- a/os/ports/GCC/ARMCMx/port.dox +++ b/os/ports/GCC/ARMCMx/port.dox @@ -22,24 +22,7 @@ * @details This port supports the ARMv6-M and ARMv7-M architectures (all the
* Cortex-Mx cores).
*
- * @section ARMCMx_STATES Mapping of the System States in the ARM Cortex-Mx port
- * This port supports two IRQ handling modes:
- * - <b>IRQ disabling</b>. This is the simplest and most efficient way to
- * implement kernel locks, this is done by globally disabling interrupts.
- * This mode is available to both the ARMv6-M and ARMv7-M architectures.
- * - <b>IRQ priority masking</b>. In this mode kernel locks are implemented by
- * raising the priority mask to the @p CORTEX_BASEPRI_KERNEL level. Using
- * priority masking it is possible to reserve one or more priority levels
- * for use as fast interrupt handlers. This mode is slightly less efficient
- * because the lock/unlock code requires two instructions instead of just
- * one and is available to the ARMv7-M architecture only (Cortex-M3 and
- * Cortex-M4). The advantage in this mode is the availability of very low
- * latency priority levels unaffected by the RTOS activity.
- * .
- * The mapping of the @ref system_states changes depending on the chosen IRQ
- * handling mode.
- *
- * @subsection ARMCMx_STATES_A System logical states in IRQ disabling mode
+ * @section ARMCMx_STATES_A System logical states in ARMv6-M
* - <b>Init</b>. This state is represented by the startup code and the
* initialization code before @p chSysInit() is executed. It has not a
* special hardware state associated.
@@ -62,7 +45,8 @@ * not globally masked but only interrupts with higher priority can preempt
* the current handler. The processor is running in exception-privileged
* mode.
- * - <b>Serving Fast Interrupt</b>. This state is not implemented in this mode.
+ * - <b>Serving Fast Interrupt</b>. This state is not implemented in the
+ * ARMv6-M implementation.
* - <b>Serving Non-Maskable Interrupt</b>. The Cortex-M3 has a specific
* asynchronous NMI vector and several synchronous fault vectors that can
* be considered belonging to this category.
@@ -70,7 +54,7 @@ * the maskable interrupt sources. The ARM state is whatever the processor
* was running when @p chSysHalt() was invoked.
*
- * @subsection ARMCMx_STATES_B System logical states in IRQ priority masking mode
+ * @section ARMCMx_STATES_B System logical states in ARMv7-M
* The ChibiOS/RT logical @ref system_states are mapped as follow in the ARM
* Cortex-M3 port:
* - <b>Init</b>. This state is represented by the startup code and the
@@ -124,30 +108,27 @@ /**
* @defgroup ARMCMx_CONF Configuration Options
* @brief ARM Cortex-Mx Configuration Options.
- * @details The ARMCM3 port allows some architecture-specific configurations
- * settings that can be specified externally, as example on the compiler
- * command line:
+ * @details The ARMCMx port allows some architecture-specific configurations
+ * settings that can be overridden externally. Usually there is no need to
+ * change the default values.
* - @p INT_REQUIRED_STACK, this value represent the amount of stack space used
* by an interrupt handler between the @p extctx and @p intctx
* structures.<br>
* In the current implementation this value is guaranteed to be zero so
* there is no need to modify this value unless changes are done at the
* interrupts handling code.
- * - @p CORTEX_BASEPRI_USER, this is the @p BASEPRI value for the user threads.
- * The default value is @p 0 (disabled).<br>
- * Usually there is no need to change this value, please refer to the
- * Cortex-M3 technical reference manual for a detailed description.
* - @p CORTEX_BASEPRI_KERNEL, this is the @p BASEPRI value for the kernel lock
- * code.<br>
- * Code running at higher priority levels must not invoke any OS API.<br>
- * Usually there is no need to change this value, please refer to the
- * Cortex-M3 technical reference manual for a detailed description.
- * - @p CORTEX_ENABLE_WFI_IDLE, if set to @p 1 enables the use of the
+ * code. Code running at higher priority levels must not invoke any OS API.
+ * This setting is specific to the ARMv7-M architecture.
+ * - @p CORTEX_PRIORITY_SYSTICK, priority of the SYSTICK handler.
+ * - @p CORTEX_PRIORITY_SVCALL, priority of the SVCALL handler.
+ * - @p CORTEX_PRIORITY_PENDSV, priority of the PENDSV handler.
+ * - @p CORTEX_ENABLE_WFI_IDLE, if set to @p TRUE enables the use of the
* @p <b>wfi</b> instruction from within the idle loop. This is defaulted to
- * 0 because it can create problems with some debuggers. Setting this option
- * to 1 reduces the system power requirements.
+ * FALSE because it can create problems with some debuggers. Setting this
+ * option to TRUE reduces the system power requirements.
* .
- * @ingroup ARMCM3
+ * @ingroup ARMCMx
*/
/**
@@ -158,6 +139,20 @@ */
/**
+ * @defgroup ARMCMx_V6M_CORE ARMv6-M Specific Implementation
+ * @brief ARMv6-M specific port code, structures and macros.
+ *
+ * @ingroup ARMCMx_CORE
+ */
+
+/**
+ * @defgroup ARMCMx_V7M_CORE ARMv7-M Specific Implementation
+ * @brief ARMv7-M specific port code, structures and macros.
+ *
+ * @ingroup ARMCMx_CORE
+ */
+
+/**
* @defgroup ARMCMx_STARTUP Startup Support
* @brief ARM Cortex-Mx startup code support.
* @details ChibiOS/RT provides its own generic startup file for the ARM
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