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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-06-02 12:05:56 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-06-02 12:05:56 +0000 |
| commit | 5df4a20cbbfd99054582c127963ff0671d9eac62 (patch) | |
| tree | d480b673c5840af48a124372c0247d40569b2c5e /os/ports/GCC/ARMCMx/chcore_v6m.h | |
| parent | 58cf0fbdc6676bdde7baa6e8f01ab5018b616794 (diff) | |
| download | ChibiOS-5df4a20cbbfd99054582c127963ff0671d9eac62.tar.gz ChibiOS-5df4a20cbbfd99054582c127963ff0671d9eac62.tar.bz2 ChibiOS-5df4a20cbbfd99054582c127963ff0671d9eac62.zip | |
Alternate preemption mode implemented in ARMv6-M GCC port.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3011 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/ports/GCC/ARMCMx/chcore_v6m.h')
| -rw-r--r-- | os/ports/GCC/ARMCMx/chcore_v6m.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/os/ports/GCC/ARMCMx/chcore_v6m.h b/os/ports/GCC/ARMCMx/chcore_v6m.h index e6aeabc2d..2141ee468 100644 --- a/os/ports/GCC/ARMCMx/chcore_v6m.h +++ b/os/ports/GCC/ARMCMx/chcore_v6m.h @@ -45,6 +45,15 @@ /* Port configurable parameters. */
/*===========================================================================*/
+/**
+ * @brief Alternate preemption method.
+ * @details Activating this option will make the Kernel use the PendSV
+ * handler for preemption instead of the NMI handler.
+ */
+#ifndef CORTEX_ALTERNATE_SWITCH
+#define CORTEX_ALTERNATE_SWITCH FALSE
+#endif
+
/*===========================================================================*/
/* Port derived parameters. */
/*===========================================================================*/
@@ -72,6 +81,15 @@ #define CH_CORE_VARIANT_NAME "Cortex-M1"
#endif
+/**
+ * @brief Port-specific information string.
+ */
+#if !CORTEX_ALTERNATE_SWITCH || defined(__DOXYGEN__)
+#define CH_PORT_INFO "Preemption through NMI"
+#else
+#define CH_PORT_INFO "Preemption through PendSV"
+#endif
+
/*===========================================================================*/
/* Port implementation part. */
/*===========================================================================*/
|