git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7755 35acf78f-673a-0410-8e92-d51de3d6d3f4

3 files changed, 64 insertions, 54 deletions

diff --git a/os/nil/ports/ARMCMx/nilcore_v6m.c b/os/nil/ports/ARMCMx/nilcore_v6m.c
index 7fe92711d..791062db3 100644
--- a/os/nil/ports/ARMCMx/nilcore_v6m.c
+++ b/os/nil/ports/ARMCMx/nilcore_v6m.c
@@ -51,13 +51,15 @@
 /* Module interrupt handlers.                                                */

 /*===========================================================================*/

 

-#if !CORTEX_ALTERNATE_SWITCH || defined(__DOXYGEN__)

+#if (CORTEX_ALTERNATE_SWITCH == FALSE) || defined(__DOXYGEN__)

 /**

  * @brief   NMI vector.

  * @details The NMI vector is used for exception mode re-entering after a

  *          context switch.

  */

+/*lint -save -e9075 [8.4] All symbols are invoked from asm context.*/

 void NMI_Handler(void) {

+/*lint -restore*/

 

   /* The port_extctx structure is pointed by the PSP register.*/

   struct port_extctx *ctxp = (struct port_extctx *)__get_PSP();

@@ -74,13 +76,15 @@ void NMI_Handler(void) {
 }

 #endif /* !CORTEX_ALTERNATE_SWITCH */

 

-#if CORTEX_ALTERNATE_SWITCH || defined(__DOXYGEN__)

+#if (CORTEX_ALTERNATE_SWITCH == TRUE) || defined(__DOXYGEN__)

 /**

  * @brief   PendSV vector.

  * @details The PendSV vector is used for exception mode re-entering after a

  *          context switch.

  */

+/*lint -save -e9075 [8.4] All symbols are invoked from asm context.*/

 void PendSV_Handler(void) {

+/*lint -restore*/

 

   /* The port_extctx structure is pointed by the PSP register.*/

   struct port_extctx *ctxp = (struct port_extctx *)__get_PSP();

@@ -105,7 +109,7 @@ void PendSV_Handler(void) {
  */

 void _port_irq_epilogue(regarm_t lr) {

 

-  if (lr != (regarm_t)0xFFFFFFF1) {

+  if (lr != (regarm_t)0xFFFFFFF1U) {

     struct port_extctx *ctxp;

 

     port_lock_from_isr();

diff --git a/os/nil/ports/ARMCMx/nilcore_v6m.h b/os/nil/ports/ARMCMx/nilcore_v6m.h
index b47dc2d2f..a03e3c900 100644
--- a/os/nil/ports/ARMCMx/nilcore_v6m.h
+++ b/os/nil/ports/ARMCMx/nilcore_v6m.h
@@ -33,42 +33,6 @@
 /*===========================================================================*/

 

 /**

- * @name    Architecture and Compiler

- * @{

- */

-#if (CORTEX_MODEL == CORTEX_M0) || defined(__DOXYGEN__)

-/**

- * @brief   Macro defining the specific ARM architecture.

- */

-#define PORT_ARCHITECTURE_ARM_v6M

-

-/**

- * @brief   Name of the implemented architecture.

- */

-#define PORT_ARCHITECTURE_NAME          "ARMv6-M"

-

-/**

- * @brief   Name of the architecture variant.

- */

-#define PORT_CORE_VARIANT_NAME          "Cortex-M0"

-

-#elif (CORTEX_MODEL == CORTEX_M0PLUS)

-#define PORT_ARCHITECTURE_ARM_v6M

-#define PORT_ARCHITECTURE_NAME          "ARMv6-M"

-#define PORT_CORE_VARIANT_NAME          "Cortex-M0+"

-#endif

-

-/**

- * @brief   Port-specific information string.

- */

-#if !CORTEX_ALTERNATE_SWITCH || defined(__DOXYGEN__)

-#define PORT_INFO                       "Preemption through NMI"

-#else

-#define PORT_INFO                       "Preemption through PendSV"

-#endif

-/** @} */

-

-/**

  * @brief   This port does not support a realtime counter.

  */

 #define PORT_SUPPORTS_RT                FALSE

@@ -132,9 +96,45 @@
 /*===========================================================================*/

 

 /**

+ * @name    Architecture and Compiler

+ * @{

+ */

+#if (CORTEX_MODEL == CORTEX_M0) || defined(__DOXYGEN__)

+/**

+ * @brief   Macro defining the specific ARM architecture.

+ */

+#define PORT_ARCHITECTURE_ARM_v6M

+

+/**

+ * @brief   Name of the implemented architecture.

+ */

+#define PORT_ARCHITECTURE_NAME          "ARMv6-M"

+

+/**

+ * @brief   Name of the architecture variant.

+ */

+#define PORT_CORE_VARIANT_NAME          "Cortex-M0"

+

+#elif (CORTEX_MODEL == CORTEX_M0PLUS)

+#define PORT_ARCHITECTURE_ARM_v6M

+#define PORT_ARCHITECTURE_NAME          "ARMv6-M"

+#define PORT_CORE_VARIANT_NAME          "Cortex-M0+"

+#endif

+

+/**

+ * @brief   Port-specific information string.

+ */

+#if (CORTEX_ALTERNATE_SWITCH == FALSE) || defined(__DOXYGEN__)

+#define PORT_INFO                       "Preemption through NMI"

+#else

+#define PORT_INFO                       "Preemption through PendSV"

+#endif

+/** @} */

+

+/**

  * @brief   Maximum usable priority for normal ISRs.

  */

-#if CORTEX_ALTERNATE_SWITCH || defined(__DOXYGEN__)

+#if (CORTEX_ALTERNATE_SWITCH == TRUE) || defined(__DOXYGEN__)

 #define CORTEX_MAX_KERNEL_PRIORITY      1

 #else

 #define CORTEX_MAX_KERNEL_PRIORITY      0

@@ -183,11 +183,11 @@ struct port_intctx {
  *          by an @p port_intctx structure.

  */

 #define PORT_SETUP_CONTEXT(tp, wend, pf, arg) {                             \

-  (tp)->ctxp = (struct port_intctx *)(((uint8_t *)(wend)) -                 \

+  (tp)->ctxp = (struct port_intctx *)((uint8_t *)(wend) -                   \

                                       sizeof(struct port_intctx));          \

   (tp)->ctxp->r4 = (regarm_t)(pf);                                          \

   (tp)->ctxp->r5 = (regarm_t)(arg);                                         \

-  (tp)->ctxp->lr = (regarm_t)(_port_thread_start);                          \

+  (tp)->ctxp->lr = (regarm_t)_port_thread_start;                            \

 }

 

 /**

@@ -196,16 +196,23 @@ struct port_intctx {
  */

 #define PORT_WA_SIZE(n) (sizeof(struct port_intctx) +                       \

                          sizeof(struct port_extctx) +                       \

-                         (n) + (PORT_INT_REQUIRED_STACK))

+                         ((size_t)(n)) + ((size_t)(PORT_INT_REQUIRED_STACK)))

 

 /**

  * @brief   IRQ prologue code.

  * @details This macro must be inserted at the start of all IRQ handlers

  *          enabled to invoke system APIs.

  */

+#if defined(__GNUC__) || defined(__DOXYGEN__)

+#define PORT_IRQ_PROLOGUE()                                                 \

+  regarm_t _saved_lr = (regarm_t)__builtin_return_address(0)

+#elif defined(__ICCARM__)

 #define PORT_IRQ_PROLOGUE()                                                 \

-  regarm_t _saved_lr;                                                       \

-  asm volatile ("mov     %0, lr" : "=r" (_saved_lr) : : "memory")

+  regarm_t _saved_lr = (regarm_t)__get_LR()

+#elif defined(__CC_ARM)

+#define PORT_IRQ_PROLOGUE()                                                 \

+  regarm_t _saved_lr = (regarm_t)__return_address()

+#endif

 

 /**

  * @brief   IRQ epilogue code.

@@ -238,13 +245,14 @@ struct port_intctx {
  * @param[in] ntp       the thread to be switched in

  * @param[in] otp       the thread to be switched out

  */

-#if !NIL_CFG_ENABLE_STACK_CHECK || defined(__DOXYGEN__)

+#if (NIL_CFG_ENABLE_STACK_CHECK == FALSE) || defined(__DOXYGEN__)

 #define port_switch(ntp, otp) _port_switch(ntp, otp)

 #else

 #define port_switch(ntp, otp) {                                             \

   struct port_intctx *r13 = (struct port_intctx *)__get_PSP();              \

-  if ((stkalign_t *)(r13 - 1) < (otp)->stklim)                              \

+  if ((stkalign_t *)(r13 - 1) < (otp)->stklim) {                            \

     chSysHalt("stack overflow");                                            \

+  }                                                                         \

   _port_switch(ntp, otp);                                                   \

 }

 #endif

@@ -298,7 +306,7 @@ static inline syssts_t port_get_irq_status(void) {
  */

 static inline bool port_irq_enabled(syssts_t sts) {

 

-  return (sts & 1) == 0;

+  return (sts & (syssts_t)1) == (syssts_t)0;

 }

 

 /**

@@ -310,7 +318,7 @@ static inline bool port_irq_enabled(syssts_t sts) {
  */

 static inline bool port_is_isr_context(void) {

 

-  return (bool)((__get_IPSR() & 0x1FF) != 0);

+  return (bool)((__get_IPSR() & 0x1FFU) != 0U);

 }

 

 /**

@@ -385,8 +393,8 @@ static inline void port_enable(void) {
  */

 static inline void port_wait_for_interrupt(void) {

 

-#if CORTEX_ENABLE_WFI_IDLE

-  __WFI;

+#if CORTEX_ENABLE_WFI_IDLE == TRUE

+  __WFI();

 #endif

 }

 

diff --git a/os/nil/ports/ARMCMx/nilcore_v7m.h b/os/nil/ports/ARMCMx/nilcore_v7m.h
index 4a92fd704..603ff8d7a 100644
--- a/os/nil/ports/ARMCMx/nilcore_v7m.h
+++ b/os/nil/ports/ARMCMx/nilcore_v7m.h
@@ -282,13 +282,11 @@ struct port_intctx {
  *          by an @p port_intctx structure.

  */

 #define PORT_SETUP_CONTEXT(tp, wend, pf, arg) {                             \

-  /*lint -save -e611 -e9074 -e9087 [11.1, 11.3] Casts are planned here.*/   \

   (tp)->ctxp = (struct port_intctx *)((uint8_t *)(wend) -                   \

                                       sizeof(struct port_intctx));          \

   (tp)->ctxp->r4 = (regarm_t)(pf);                                          \

   (tp)->ctxp->r5 = (regarm_t)(arg);                                         \

-  (tp)->ctxp->lr = (regarm_t)(_port_thread_start);                          \

-  /*lint -restore*/                                                         \

+  (tp)->ctxp->lr = (regarm_t)_port_thread_start;                            \

 }

 

 /**