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author | barthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-07-03 18:02:55 +0000 |
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committer | barthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-07-03 18:02:55 +0000 |
commit | ccb28114da9485c5e3f950fd31dfb67be1b8a173 (patch) | |
tree | a9645e52236f59fb69d4995ee9c121acaeb50808 /os/hal | |
parent | af0e40079ded13b8842e8d129fa6ed2f37fdf678 (diff) | |
download | ChibiOS-ccb28114da9485c5e3f950fd31dfb67be1b8a173.tar.gz ChibiOS-ccb28114da9485c5e3f950fd31dfb67be1b8a173.tar.bz2 ChibiOS-ccb28114da9485c5e3f950fd31dfb67be1b8a173.zip |
I2C. Driver looks working, but sometimes hangs up. I don't know, my big project cause troubles in it, or driver cause troubles in my project.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/i2c_dev@3116 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal')
-rw-r--r-- | os/hal/include/i2c.h | 35 | ||||
-rw-r--r-- | os/hal/platforms/STM32/i2c_lld.c | 95 | ||||
-rw-r--r-- | os/hal/platforms/STM32/i2c_lld.h | 2 | ||||
-rw-r--r-- | os/hal/src/i2c.c | 42 |
4 files changed, 130 insertions, 44 deletions
diff --git a/os/hal/include/i2c.h b/os/hal/include/i2c.h index 0a4ba8b53..774c0cf22 100644 --- a/os/hal/include/i2c.h +++ b/os/hal/include/i2c.h @@ -165,9 +165,9 @@ struct I2CSlaveConfig{ * @notapi
*/
#define _i2c_wait_s(i2cp) { \
- chDbgAssert((i2cp)->id_thread == NULL, \
+ chDbgAssert((i2cp)->id_thread == NULL, \
"_i2c_wait(), #1", "already waiting"); \
- (i2cp)->id_thread = chThdSelf(); \
+ (i2cp)->id_thread = chThdSelf(); \
chSchGoSleepS(THD_STATE_SUSPENDED); \
}
@@ -179,9 +179,9 @@ struct I2CSlaveConfig{ * @notapi
*/
#define _i2c_wakeup_isr(i2cp) { \
- if ((i2cp)->id_thread != NULL) { \
- Thread *tp = (i2cp)->id_thread; \
- (i2cp)->id_thread = NULL; \
+ if ((i2cp)->id_thread != NULL) { \
+ Thread *tp = (i2cp)->id_thread; \
+ (i2cp)->id_thread = NULL; \
chSysLockFromIsr(); \
chSchReadyI(tp); \
chSysUnlockFromIsr(); \
@@ -218,6 +218,31 @@ struct I2CSlaveConfig{ _i2c_wakeup_isr(i2cp); \
}
+/**
+ * @brief Error ISR code.
+ * @details This code handles the portable part of the ISR code:
+ * - Error callback invocation.
+ * - Waiting thread wakeup, if any.
+ * - Driver state transitions.
+ *
+ * @note This macro is meant to be used in the low level drivers
+ * implementation only.
+ *
+ * @param[in] i2cp pointer to the @p I2CDriver object
+ *
+ * @notapi
+ */
+#define _i2c_isr_err_code(i2cp, i2cscfg) { \
+ (i2cp)->id_state = I2C_COMPLETE; \
+ if(((i2cp)->id_slave_config)->id_err_callback) { \
+ ((i2cp)->id_slave_config)->id_err_callback(i2cp, i2cscfg); \
+ if((i2cp)->id_state == I2C_COMPLETE) \
+ (i2cp)->id_state = I2C_READY; \
+ } \
+ else \
+ (i2cp)->id_state = I2C_READY; \
+ _i2c_wakeup_isr(i2cp); \
+}
/*===========================================================================*/
/* External declarations. */
diff --git a/os/hal/platforms/STM32/i2c_lld.c b/os/hal/platforms/STM32/i2c_lld.c index a4aa2927d..30352f3c4 100644 --- a/os/hal/platforms/STM32/i2c_lld.c +++ b/os/hal/platforms/STM32/i2c_lld.c @@ -94,20 +94,20 @@ static void i2c_serve_event_interrupt(I2CDriver *i2cp) { } break; case I2C_EV8_2_MASTER_BYTE_TRANSMITTED: + /* Disable ITEVT In order to not have again a BTF IT */ + dp->CR2 &= (uint16_t)~I2C_CR2_ITEVTEN; /* if nothing to read then generate stop */ if (i2cp->rxbytes == 0){ dp->CR1 |= I2C_CR1_STOP; - /* Disable ITEVT In order to not have again a BTF IT */ - dp->CR2 &= (uint16_t)~I2C_CR2_ITEVTEN; /* Portable I2C ISR code defined in the high level driver, * note, it is a macro.*/ _i2c_isr_code(i2cp, i2cp->id_slave_config); } else{ - /* Disable ITEVT In order to not have again a BTF IT */ - dp->CR2 &= (uint16_t)~I2C_CR2_ITEVTEN; /* send restart and begin reading operations */ - i2c_lld_master_receive(i2cp, i2cp->slave_addr, i2cp->rxbuf, i2cp->rxbytes); + chSysLockFromIsr(); + i2c_lld_master_transceive(i2cp); + chSysUnlockFromIsr(); } break; @@ -242,10 +242,10 @@ static void i2c_serve_error_interrupt(I2CDriver *i2cp) { if(flags != I2CD_NO_ERROR) { /* send communication end signal */ - _i2c_isr_code(i2cp, i2cp->id_slave_config); chSysLockFromIsr(); i2cAddFlagsI(i2cp, flags); chSysUnlockFromIsr(); + _i2c_isr_err_code(i2cp, i2cp->id_slave_config); } } @@ -539,10 +539,6 @@ void i2c_lld_master_transmit(I2CDriver *i2cp, uint16_t slave_addr, i2cp->txbuf = txbuf; i2cp->rxbuf = rxbuf; - /* enable ERR, EVT & BUF ITs */ - i2cp->id_i2c->CR2 |= (I2C_CR2_ITERREN|I2C_CR2_ITEVTEN|I2C_CR2_ITBUFEN); - i2cp->id_i2c->CR1 &= ~I2C_CR1_POS; - if(slave_addr & 0x8000){/* 10-bit mode used */ /* add the two msb of 10-bit address to the header */ i2cp->slave_addr1 = ((slave_addr >>7) & 0x0006); @@ -568,9 +564,18 @@ void i2c_lld_master_transmit(I2CDriver *i2cp, uint16_t slave_addr, // while((i2cp->id_i2c->CR1 & I2C_CR1_START) && timeout--) // ; //#endif /* I2C_USE_WAIT */ - uint32_t timeout = 0xfffff; - while((i2cp->id_i2c->CR1 & I2C_CR1_START) && timeout--) - ; + + + uint32_t timeout = I2C_START_TIMEOUT; + while((i2cp->id_i2c->CR1 & I2C_CR1_START) && timeout--) + ; + /* is timeout overflows? */ + chDbgAssert(timeout < I2C_START_TIMEOUT, + "i2c_lld_master_transmit(), #1", "time is out"); + + /* enable ERR, EVT & BUF ITs */ + i2cp->id_i2c->CR2 |= (I2C_CR2_ITERREN|I2C_CR2_ITEVTEN|I2C_CR2_ITBUFEN); + i2cp->id_i2c->CR1 &= ~I2C_CR1_POS; } @@ -593,11 +598,6 @@ void i2c_lld_master_receive(I2CDriver *i2cp, uint16_t slave_addr, i2cp->rxbytes = rxbytes; i2cp->rxbuf = rxbuf; - /* enable ERR, EVT & BUF ITs */ - i2cp->id_i2c->CR2 |= (I2C_CR2_ITERREN|I2C_CR2_ITEVTEN|I2C_CR2_ITBUFEN); - i2cp->id_i2c->CR1 |= I2C_CR1_ACK; /* acknowledge returned */ - i2cp->id_i2c->CR1 &= ~I2C_CR1_POS; - if(slave_addr & 0x8000){/* 10-bit mode used */ /* add the two msb of 10-bit address to the header */ i2cp->slave_addr1 = ((slave_addr >>7) & 0x0006); @@ -633,9 +633,62 @@ void i2c_lld_master_receive(I2CDriver *i2cp, uint16_t slave_addr, // while((i2cp->id_i2c->CR1 & I2C_CR1_START) && timeout--) // ; //#endif /* I2C_USE_WAIT */ - uint32_t timeout = 0xfffff; - while((i2cp->id_i2c->CR1 & I2C_CR1_START) && timeout--) - ; + + + uint32_t timeout = I2C_START_TIMEOUT; + while((i2cp->id_i2c->CR1 & I2C_CR1_START) && timeout--) + ; + /* is timeout overflows? */ + chDbgAssert(timeout < I2C_START_TIMEOUT, + "i2c_lld_master_receive(), #1", "time is out"); + + /* enable ERR, EVT & BUF ITs */ + i2cp->id_i2c->CR2 |= (I2C_CR2_ITERREN|I2C_CR2_ITEVTEN|I2C_CR2_ITBUFEN); + i2cp->id_i2c->CR1 |= I2C_CR1_ACK; /* acknowledge returned */ + i2cp->id_i2c->CR1 &= ~I2C_CR1_POS; +} + + + +void i2c_lld_master_transceive(I2CDriver *i2cp){ + + i2cp->flags = I2C_FLG_MASTER_RECEIVER; + i2cp->errors = 0; + + i2cp->slave_addr1 |= 0x01; + + /* Only one byte to be received */ + if(i2cp->rxbytes == 1) { + i2cp->flags |= I2C_FLG_1BTR; + } + /* Only two bytes to be received */ + else if(i2cp->rxbytes == 2) { + i2cp->flags |= I2C_FLG_2BTR; + i2cp->id_i2c->CR1 |= I2C_CR1_POS; /* Acknowledge Position */ + } + + i2cp->id_i2c->CR1 |= I2C_CR1_START; /* send start bit */ + +//#if !I2C_USE_WAIT +// /* Wait until the START condition is generated on the bus: +// * the START bit is cleared by hardware */ +// uint32_t timeout = 0xfffff; +// while((i2cp->id_i2c->CR1 & I2C_CR1_START) && timeout--) +// ; +//#endif /* I2C_USE_WAIT */ + + + uint32_t timeout = I2C_START_TIMEOUT; + while((i2cp->id_i2c->CR1 & I2C_CR1_START) && timeout--) + ; + /* is timeout overflows? */ + chDbgAssert(timeout < I2C_START_TIMEOUT, + "i2c_lld_master_receive(), #1", "time is out"); + + /* enable ERR, EVT & BUF ITs */ + i2cp->id_i2c->CR2 |= (I2C_CR2_ITERREN|I2C_CR2_ITEVTEN|I2C_CR2_ITBUFEN); + i2cp->id_i2c->CR1 |= I2C_CR1_ACK; /* acknowledge returned */ + i2cp->id_i2c->CR1 &= ~I2C_CR1_POS; } diff --git a/os/hal/platforms/STM32/i2c_lld.h b/os/hal/platforms/STM32/i2c_lld.h index 0b95a893d..2659e4475 100644 --- a/os/hal/platforms/STM32/i2c_lld.h +++ b/os/hal/platforms/STM32/i2c_lld.h @@ -13,6 +13,7 @@ /*===========================================================================*/ /* Driver constants. */ /*===========================================================================*/ +#define I2C_START_TIMEOUT 0xFFFF /*===========================================================================*/ /* Driver pre-compile time settings. */ @@ -233,6 +234,7 @@ void i2c_lld_master_transmit(I2CDriver *i2cp, uint16_t slave_addr, uint8_t *txbuf, size_t txbytes, uint8_t *rxbuf, size_t rxbytes); void i2c_lld_master_receive(I2CDriver *i2cp, uint16_t slave_addr, uint8_t *rxbuf, size_t rxbytes); +void i2c_lld_master_transceive(I2CDriver *i2cp); #ifdef __cplusplus } diff --git a/os/hal/src/i2c.c b/os/hal/src/i2c.c index 3f4095aa3..93d00bcae 100644 --- a/os/hal/src/i2c.c +++ b/os/hal/src/i2c.c @@ -165,15 +165,18 @@ void i2cMasterTransmit(I2CDriver *i2cp, /* init slave config field in driver */
i2cp->id_slave_config = i2cscfg;
-//#if I2C_USE_WAIT
-// i2c_lld_wait_bus_free(i2cp);
-// if(i2c_lld_bus_is_busy(i2cp)) {
-//#ifdef PRINTTRACE
-// print("I2C Bus busy!\n");
-//#endif
-// return;
-// };
-//#endif
+#if I2C_USE_WAIT
+ i2c_lld_wait_bus_free(i2cp);
+ if(i2c_lld_bus_is_busy(i2cp)) {
+#ifdef PRINTTRACE
+ print("I2C Bus busy!\n");
+ return;
+#else
+ /* the time is out */
+ chDbgAssert(FALSE, "i2cMasterTransmit(), #1", "time is out");
+#endif
+ };
+#endif
chSysLock();
chDbgAssert(i2cp->id_state == I2C_READY,
@@ -211,15 +214,18 @@ void i2cMasterReceive(I2CDriver *i2cp, /* init slave config field in driver */
i2cp->id_slave_config = i2cscfg;
-//#if I2C_USE_WAIT
-// i2c_lld_wait_bus_free(i2cp);
-// if(i2c_lld_bus_is_busy(i2cp)) {
-//#ifdef PRINTTRACE
-// print("I2C Bus busy!\n");
-//#endif
-// return;
-// };
-//#endif
+#if I2C_USE_WAIT
+ i2c_lld_wait_bus_free(i2cp);
+ if(i2c_lld_bus_is_busy(i2cp)) {
+#ifdef PRINTTRACE
+ print("I2C Bus busy!\n");
+ return;
+#else
+ /* the time is out */
+ chDbgAssert(FALSE, "i2cMasterReceive(), #1", "time is out");
+#endif
+ };
+#endif
chSysLock();
chDbgAssert(i2cp->id_state == I2C_READY,
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