diff options
| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2017-07-01 20:30:23 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2017-07-01 20:30:23 +0000 |
| commit | ca841be38745f735407c73c76dbc447b0974ab64 (patch) | |
| tree | 3df3cf7546048a05e4918dd8bb11d3eb68fa0d56 /os/hal | |
| parent | 3588ac33a33bb10d22cd6a30ab22ea28514943a0 (diff) | |
| download | ChibiOS-ca841be38745f735407c73c76dbc447b0974ab64.tar.gz ChibiOS-ca841be38745f735407c73c76dbc447b0974ab64.tar.bz2 ChibiOS-ca841be38745f735407c73c76dbc447b0974ab64.zip | |
Fixed bug #847.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10275 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal')
| -rw-r--r-- | os/hal/ports/STM32/STM32F0xx/stm32_registry.h | 26 |
1 files changed, 10 insertions, 16 deletions
diff --git a/os/hal/ports/STM32/STM32F0xx/stm32_registry.h b/os/hal/ports/STM32/STM32F0xx/stm32_registry.h index 2f6f8224c..016d3a651 100644 --- a/os/hal/ports/STM32/STM32F0xx/stm32_registry.h +++ b/os/hal/ports/STM32/STM32F0xx/stm32_registry.h @@ -1332,11 +1332,9 @@ /* I2C attributes.*/
#define STM32_HAS_I2C1 TRUE
-#define STM32_I2C1_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 3) |\
- STM32_DMA_STREAM_ID_MSK(1, 7))
+#define STM32_I2C1_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 3)
#define STM32_I2C1_RX_DMA_CHN 0x00000000
-#define STM32_I2C1_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 2) |\
- STM32_DMA_STREAM_ID_MSK(1, 6))
+#define STM32_I2C1_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 2)
#define STM32_I2C1_TX_DMA_CHN 0x00000000
#define STM32_HAS_I2C2 TRUE
@@ -1375,11 +1373,9 @@ #define STM32_HAS_SPI2 TRUE
#define STM32_SPI2_SUPPORTS_I2S FALSE
-#define STM32_SPI2_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 4) |\
- STM32_DMA_STREAM_ID_MSK(1, 6))
+#define STM32_SPI2_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 4)
#define STM32_SPI2_RX_DMA_CHN 0x00000000
-#define STM32_SPI2_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 5) |\
- STM32_DMA_STREAM_ID_MSK(1, 7))
+#define STM32_SPI2_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 5)
#define STM32_SPI2_TX_DMA_CHN 0x00000000
#define STM32_HAS_SPI3 FALSE
@@ -1447,23 +1443,21 @@ #define STM32_USART1_TX_DMA_CHN 0x00000000
#define STM32_HAS_USART2 TRUE
-#define STM32_USART2_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 5) |\
- STM32_DMA_STREAM_ID_MSK(1, 6))
+#define STM32_USART2_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 5)
#define STM32_USART2_RX_DMA_CHN 0x00000000
-#define STM32_USART2_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 4) |\
- STM32_DMA_STREAM_ID_MSK(1, 7))
+#define STM32_USART2_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 4)
#define STM32_USART2_TX_DMA_CHN 0x00000000
#define STM32_HAS_USART3 TRUE
-#define STM32_USART3_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 6)
+#define STM32_USART3_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 3)
#define STM32_USART3_RX_DMA_CHN 0x00000000
-#define STM32_USART3_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 7)
+#define STM32_USART3_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 2)
#define STM32_USART3_TX_DMA_CHN 0x00000000
#define STM32_HAS_UART4 TRUE
-#define STM32_UART4_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 6)
+#define STM32_UART4_RX_DMA_MSK 0
#define STM32_UART4_RX_DMA_CHN 0x00000000
-#define STM32_UART4_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 7)
+#define STM32_UART4_TX_DMA_MSK 0
#define STM32_UART4_TX_DMA_CHN 0x00000000
#define STM32_HAS_UART5 FALSE
|