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authorliamstask <liamstask@35acf78f-673a-0410-8e92-d51de3d6d3f4>2010-07-05 21:24:09 +0000
committerliamstask <liamstask@35acf78f-673a-0410-8e92-d51de3d6d3f4>2010-07-05 21:24:09 +0000
commit801490880c8b54542c637c66e0fc535229ef179c (patch)
tree41f937068eaefdf24ad198e266c43b81898450d5 /os/hal
parent646ff1e1d915261b7403bccf28264127bdedf6cc (diff)
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* user-friendly vector names for STM32 family
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2057 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal')
-rw-r--r--os/hal/platforms/STM32/hal_lld_f103.h54
-rw-r--r--os/hal/platforms/STM32/hal_lld_f105_f107.h80
2 files changed, 132 insertions, 2 deletions
diff --git a/os/hal/platforms/STM32/hal_lld_f103.h b/os/hal/platforms/STM32/hal_lld_f103.h
index 50dc8cf0a..def6007ad 100644
--- a/os/hal/platforms/STM32/hal_lld_f103.h
+++ b/os/hal/platforms/STM32/hal_lld_f103.h
@@ -79,6 +79,60 @@
#define STM32_MCO_HSE (6 << 24) /**< HSE clock on MCO pin. */
#define STM32_MCO_PLLDIV2 (7 << 24) /**< PLL/2 clock on MCO pin. */
+/* Platform specific friendly IRQ names */
+#define WWDG_IRQHandler Vector40 // Window Watchdog
+#define PVD_IRQHandler Vector44 // PVD through EXTI Line detect
+#define TAMPER_IRQHandler Vector48 // Tamper
+#define RTC_IRQHandler Vector4C // RTC
+#define FLASH_IRQHandler Vector50 // Flash
+#define RCC_IRQHandler Vector54 // RCC
+#define EXTI0_IRQHandler Vector58 // EXTI Line 0
+#define EXTI1_IRQHandler Vector5C // EXTI Line 1
+#define EXTI2_IRQHandler Vector60 // EXTI Line 2
+#define EXTI3_IRQHandler Vector64 // EXTI Line 3
+#define EXTI4_IRQHandler Vector68 // EXTI Line 4
+#define DMA1_Channel1_IRQHandler Vector6C // DMA1 Channel 1
+#define DMA1_Channel2_IRQHandler Vector70 // DMA1 Channel 2
+#define DMA1_Channel3_IRQHandler Vector74 // DMA1 Channel 3
+#define DMA1_Channel4_IRQHandler Vector78 // DMA1 Channel 4
+#define DMA1_Channel5_IRQHandler Vector7C // DMA1 Channel 5
+#define DMA1_Channel6_IRQHandler Vector80 // DMA1 Channel 6
+#define DMA1_Channel7_IRQHandler Vector84 // DMA1 Channel 7
+#define ADC1_2_IRQHandler Vector88 // ADC1_2
+#define USB_HP_CAN1_TX_IRQHandler Vector8C // USB High Priority or CAN1 TX
+#define USB_LP_CAN1_RX0_IRQHandler Vector90 // USB Low Priority or CAN1 RX0
+#define CAN1_RX1_IRQHandler Vector94 // CAN1 RX1
+#define CAN1_SCE_IRQHandler Vector98 // CAN1 SCE
+#define EXTI9_5_IRQHandler Vector9C // EXTI Line 9..5
+#define TIM1_BRK_IRQHandler VectorA0 // TIM1 Break
+#define TIM1_UP_IRQHandler VectorA4 // TIM1 Update
+#define TIM1_TRG_COM_IRQHandler VectorA8 // TIM1 Trigger and Commutation
+#define TIM1_CC_IRQHandler VectorAC // TIM1 Capture Compare
+#define TIM2_IRQHandler VectorB0 // TIM2
+#define TIM3_IRQHandler VectorB4 // TIM3
+#if defined(STM32F10X_MD)
+#define TIM4_IRQHandler VectorB8 // TIM4
+#endif
+#define I2C1_EV_IRQHandler VectorBC // I2C1 Event
+#define I2C1_ER_IRQHandler VectorC0 // I2C1 Error
+#if defined(STM32F10X_MD)
+#define I2C2_EV_IRQHandler VectorC4 // I2C2 Event
+#define I2C2_ER_IRQHandler VectorC8 // I2C2 Error
+#endif
+#define SPI1_IRQHandler VectorCC // SPI1
+#if defined(STM32F10X_MD)
+#define SPI2_IRQHandler VectorD0 // SPI2
+#endif
+#define USART1_IRQHandler VectorD4 // USART1
+#define USART2_IRQHandler VectorD8 // USART2
+#if defined(STM32F10X_MD)
+#define USART3_IRQHandler VectorDC // USART3
+#endif
+#define EXTI15_10_IRQHandler VectorE0 // EXTI Line 15..10
+#define RTCAlarm_IRQHandler VectorE4 // RTC Alarm through EXTI Line
+#define USBWakeUp_IRQHandler VectorE8 // USB Wakeup from suspend
+
+
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
diff --git a/os/hal/platforms/STM32/hal_lld_f105_f107.h b/os/hal/platforms/STM32/hal_lld_f105_f107.h
index 1e2b6f62f..ac15c3894 100644
--- a/os/hal/platforms/STM32/hal_lld_f105_f107.h
+++ b/os/hal/platforms/STM32/hal_lld_f105_f107.h
@@ -88,6 +88,82 @@
#define STM32_PREDIV1SRC_HSE (0 << 16) /**< PREDIV1 source is HSE. */
#define STM32_PREDIV1SRC_PLL2 (1 << 16) /**< PREDIV1 source is PLL2. */
+/* Platform specific friendly IRQ vector names */
+#define WWDG_IRQHandler Vector40 // Window Watchdog
+#define PVD_IRQHandler Vector44 // PVD through EXTI Line detect
+#define TAMPER_IRQHandler Vector48 // Tamper
+#define RTC_IRQHandler Vector4C // RTC
+#define FLASH_IRQHandler Vector50 // Flash
+#define RCC_IRQHandler Vector54 // RCC
+#define EXTI0_IRQHandler Vector58 // EXTI Line 0
+#define EXTI1_IRQHandler Vector5C // EXTI Line 1
+#define EXTI2_IRQHandler Vector60 // EXTI Line 2
+#define EXTI3_IRQHandler Vector64 // EXTI Line 3
+#define EXTI4_IRQHandler Vector68 // EXTI Line 4
+#define DMA1_Channel1_IRQHandler Vector6C // DMA1 Channel 1
+#define DMA1_Channel2_IRQHandler Vector70 // DMA1 Channel 2
+#define DMA1_Channel3_IRQHandler Vector74 // DMA1 Channel 3
+#define DMA1_Channel4_IRQHandler Vector78 // DMA1 Channel 4
+#define DMA1_Channel5_IRQHandler Vector7C // DMA1 Channel 5
+#define DMA1_Channel6_IRQHandler Vector80 // DMA1 Channel 6
+#define DMA1_Channel7_IRQHandler Vector84 // DMA1 Channel 7
+#define ADC1_2_IRQHandler Vector88 // ADC1 and ADC2
+#define CAN1_TX_IRQHandler Vector8C // CAN1 TX
+#define CAN1_RX0_IRQHandler Vector90 // CAN1 RX0
+#define CAN1_RX1_IRQHandler Vector94 // CAN1 RX1
+#define CAN1_SCE_IRQHandler Vector98 // CAN1 SCE
+#define EXTI9_5_IRQHandler Vector9C // EXTI Line 9..5
+#define TIM1_BRK_IRQHandler VectorA0 // TIM1 Break
+#define TIM1_UP_IRQHandler VectorA4 // TIM1 Update
+#define TIM1_TRG_COM_IRQHandler VectorA8 // TIM1 Trigger and Commutation
+#define TIM1_CC_IRQHandler VectorAC // TIM1 Capture Compare
+#define TIM2_IRQHandler VectorB0 // TIM2
+#define TIM3_IRQHandler VectorB4 // TIM3
+#define TIM4_IRQHandler VectorB8 // TIM4
+#define I2C1_EV_IRQHandler VectorBC // I2C1 Event
+#define I2C1_ER_IRQHandler VectorC0 // I2C1 Error
+#define I2C2_EV_IRQHandler VectorC4 // I2C2 Event
+#define I2C2_ER_IRQHandler VectorC8 // I2C1 Error
+#define SPI1_IRQHandler VectorCC // SPI1
+#define SPI2_IRQHandler VectorD0 // SPI2
+#define USART1_IRQHandler VectorD4 // USART1
+#define USART2_IRQHandler VectorD8 // USART2
+#define USART3_IRQHandler VectorDC // USART3
+#define EXTI15_10_IRQHandler VectorE0 // EXTI Line 15..10
+#define RTCAlarm_IRQHandler VectorE4 // RTC alarm through EXTI line
+#define OTG_FS_WKUP_IRQHandler VectorE8 // USB OTG FS Wakeup through EXTI line
+#if defined(STM32F10X_HD)
+#define TIM8_BRK_IRQHandler VectorEC // TIM8 Break
+#define TIM8_UP_IRQHandler VectorF0 // TIM8 Update
+#define TIM8_TRG_COM_IRQHandler VectorF4 // TIM8 Trigger and Commutation
+#define TIM8_CC_IRQHandler VectorF8 // TIM8 Capture Compare
+#define ADC3_IRQHandler VectorFC // ADC3
+#define FSMC_IRQHandler Vector100 // FSMC
+#define SDIO_IRQHandler Vector104 // SDIO
+#endif
+#define TIM5_IRQHandler Vector108 // TIM5
+#define SPI3_IRQHandler Vector10C // SPI3
+#define UART4_IRQHandler Vector110 // UART4
+#define UART5_IRQHandler Vector114 // UART5
+#define TIM6_IRQHandler Vector118 // TIM6
+#define TIM7_IRQHandler Vector11C // TIM7
+#define DMA2_Channel1_IRQHandler Vector120 // DMA2 Channel1
+#define DMA2_Channel2_IRQHandler Vector124 // DMA2 Channel2
+#define DMA2_Channel3_IRQHandler Vector128 // DMA2 Channel3
+#if defined(STM32F10X_HD)
+#define DMA2_Channel4_5_IRQHandler Vector12C // DMA2 Channel4 & Channel5
+#elif defined(STM32F10X_CL)
+#define DMA2_Channel4_IRQHandler Vector12C // DMA2 Channel4
+#define DMA2_Channel5_IRQHandler Vector130 // DMA2 Channel5
+#define ETH_IRQHandler Vector134 // Ethernet
+#define ETH_WKUP_IRQHandler Vector138 // Ethernet Wakeup through EXTI line
+#define CAN2_TX_IRQHandler Vector13C // CAN2 TX
+#define CAN2_RX0_IRQHandler Vector140 // CAN2 RX0
+#define CAN2_RX1_IRQHandler Vector144 // CAN2 RX1
+#define CAN2_SCE_IRQHandler Vector148 // CAN2 SCE
+#define OTG_FS_IRQHandler Vector14C // USB OTG FS
+#endif
+
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
@@ -160,7 +236,7 @@
#endif
/**
- * @brief PLL2 multiplier value.
+ * @brief PLL2 multiplier value.
* @note The default value is calculated for a 72MHz system clock from
* a 25MHz crystal using both PLL and PLL2.
*/
@@ -257,7 +333,7 @@
for the PLL clock */
#if (STM32_PREDIV1SRC == STM32_PREDIV1SRC_PLL2) || defined(__DOXYGEN__)
/**
- * @brief PLL2 input frequency.
+ * @brief PLL2 input frequency.
*/
#define STM32_PLL2CLKIN (STM32_HSECLK / STM32_PREDIV2_VALUE)